Shekhar Borkar

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Muhammad M. Khellah

> Home > Persons > Shekhar Borkar

Publications

2009
[j30]
- view
  authority control:
- export record
  dblp key:
  - journals/jssc/SomasekharYALKH09
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/SomasekharYALKH09
Dinesh Somasekhar, Yibin Ye, Paolo A. Aseron, Shih-Lien Lu, Muhammad M. Khellah, Jason Howard, Gregory Ruhl, Tanay Karnik, Shekhar Borkar, Vivek K. De, Ali Keshavarzi:
2 GHz 2 Mb 2T Gain Cell Memory Macro With 128 GBytes/sec Bandwidth in a 65 nm Logic Process Technology. IEEE J. Solid State Circuits 44(1): 174-185 (2009)
2008
[c43]
- view
  authority control:
- export record
  dblp key:
  - conf/isscc/SomasekharYALKHRKBDK08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/SomasekharYALKHRKBDK08
Dinesh Somasekhar, Yibin Ye, Paolo A. Aseron, Shih-Lien Lu, Muhammad M. Khellah, Jason Howard, Gregory Ruhl, Tanay Karnik, Shekhar Y. Borkar, Vivek De, Ali Keshavarzi:
2GHz 2Mb 2T Gain-Cell Memory Macro with 128GB/s Bandwidth in a 65nm Logic Process. ISSCC 2008: 274-275

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.