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2020 – today
- 2020
[j1]Matej Bartík
, Tomás Benes, Pavel Kubalík:
An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs. IEEE Access 8: 183101-183116 (2020)- [c11]Matej Bartík:
Reverse Engineering of Arrow USB Programmer2 JTAG Adapter for Intel/Altera FPGAs. MECO 2020: 1-6
2010 – 2019
- 2019
- [c10]Matej Bartik, Tomás Benes, Pavel Kubalík:
Design of a High-Throughput Match Search Unit for Lossless Compression Algorithms. CCWC 2019: 732-738 - [c9]Karel Hynek, Tomás Benes, Matej Bartik, Pavel Kubalík:
Ultra High Resolution Jitter Measurement Method for Ethernet Based Networks. CCWC 2019: 847-851 - [c8]Tomás Benes, Matej Bartík, Pavel Kubalík:
High Throughput and Low Latency LZ4 Compressor on FPGA. ReConFig 2019: 1-5 - 2018
- [c7]Matej Bartík, Sven Ubik, Pavel Kubalík, Tomás Benes:
Performance Comparison of Multiple Approaches of Status Register for Medium Density Memory Suitable for Implementation of a Lossless Compression Dictionary: (Abstract Only). FPGA 2018: 290 - [c6]Matej Bartik:
Clock domain crossing - An advanced course for future digital design engineers. MECO 2018: 1-5 - [c5]Petr Socha, Jan Brejník, Matej Bartik:
Attacking AES implementations using correlation power analysis on ZYBO Zynq-7000 SoC board. MECO 2018: 1-4 - 2016
- [c4]Matej Bartík, Dominika Pichlová, Hana Kubátová:
Hardware-software co-design: A practical course for future embedded engineers. MECO 2016: 347-350 - [c3]Matej Bartik, Sven Ubik, Pavel Kubalík:
A novel and efficient method to initialize FPGA embedded memory content in asymptotically constant time. ReConFig 2016: 1-6 - 2015
- [c2]Matej Bartik, Sven Ubik, Pavel Kubalík:
LZ4 compression algorithm on FPGA. ICECS 2015: 179-182 - [c1]Matej Bartik, Martin Novotný:
Advanced control unit for linear motor for precise measurements in biomechanics. MECO 2015: 129-133
Coauthor Index
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