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ORCIDIEEE Transactions on Computers, Volume 33
Volume 33, Number 1, January 1984
- D. T. Lee, Joseph Y.-T. Leung:
On the 2-Dimensional Channel Assignment Problem. 2-6 - Henk J. Sips:
Bit-Sequential Arithmetic for Parallel Processors. 7-20 - Israel Koren, Melvin A. Breuer:
On Area and Yield Considerations for Fault-Tolerant VLSI Processor Arrays. 21-27 - Svetlana P. Kartashev, Steven I. Kartashev:
Memory Allocations for Multiprocessor Systems That Incorporate Content-Addressable Memories. 28-44 - Vasilii Zhakarov:
Parallelism and Array Processing. 45-78 - Jacob Savir, Gary S. Ditlow, Paul H. Bardell:
Random Pattern Testability. 79-90
- Giuseppe Caruso:
A Local Selection Algorithm for Switching Function Minimization. 91-97 - Corina Reischer, Dan A. Simovici:
Graph Functions of Boolean Functions. 97-99 - Carla D. Savage:
A Systolic Design for Connectivity Problems. 99-104 - Dan Gordon, Israel Koren, Gabriel M. Silberman:
Embedding Tree Stuctures in VLlSI Hexagonal Arrays. 104-107
Volume 33, Number 2, February 1984
- Yann-Hang Lee, Kang G. Shin:
Design and Evaluation of a Fault-Tolerant Multiprocessur Using Hardware Recovery Blocks. 113-124 - Makoto Kobayashi:
Dynamic Characteristics of Loops. 125-132 - Shahid H. Bokhari:
Finding Maximum on an Array Processor with a Global Bus. 133-139 - Steven W. White, Noel R. Strader II, Tom Rhyne:
A VLSI-Based I/O Formatting Device. 140-149 - Carol A. Niznik:
Performance Evaluation of the Computer Network Dynamic Congestion Table Algorithm. 150-159 - Randal E. Bryant:
A Switch-Level Model and Simulator for MOS Digital Systems. 160-177 - Kuang Yung Liu:
Architecture for VLSI Design of Reed-Solomon Decoders. 178-189
- Mark Jerrum, Sven Skyum:
Families of Fixed Degree Graphs for Processor Interconnection. 190-194 - Pramod K. Varshney, Carlos R. P. Hartmann:
Sequential Fault Diagnosis of Modular Systems. 194-197 - Ravishankar K. Iyer:
Reliability Evaluation of Fault-Tolerant Systems - Effect of Variability in Failure Rates. 197-200
Volume 33, Number 3, March 1984
- Janice E. Cuny, Lawrence Snyder:
Testing the Coordination Predicate. 201-208 - Kyu-Young Whang, Gio Wiederhold, Daniel Sagalowicz:
Separability - An Approach to Physical Database Design. 209-222 - Seyed H. Hosseini, Jon G. Kuhl, Sudhakar M. Reddy:
A Diagnosis Algorithm for Distributed Computing Systems with Dynamic Failure and Repair. 223-233 - S. Louis Hakimi, Kazuo Nakajima:
On Adaptive System Diagnosis. 234-240 - John Paul Shen, John P. Hayes:
Fault-Tolerance of Dynamic-Full-Access Interconnection Networks. 241-248 - William R. Franta, John R. Heath:
Measurement and Analysis of HYPERchannel Networks. 249-260 - Benjamin W. Wah, Kuo-Liang Chen:
A Partitioning Approach to the Design of Selection Networks. 261-268 - Guang Xing Wang, G. Robert Redinbo:
Probability of State Transition Errors in a Finite State Machine Containing Soft Failures. 269-277
- F. Warren Burton, Matthew M. Huntbach:
Virtual Tree Machines. 278-280 - Pauline Markenscoff:
A Deterministic Model for Evaluating the Performance of a Multiple Processor with a Shared Bus. 281-285 - Petr Golan:
Design of Totally Self-Checking Checker for 1-out-of-3 Code. 285 - Dana Richards:
Complexity of Single-Layer Routing. 286-288
Volume 33, Number 4, April 1984
- André Thayse:
A Matrix Formalism for Asynchronous Implementation of Algorithms. 289-300 - Fred U. Rosenberger, Donald F. Wann:
A Computer Aided Procedure for Performing Static Loading Validation of Digital Logic Systems. 301-313 - Robert Michael Tanner:
Fault-Tolerant 256K Memory Designs. 314-322 - Laxmi N. Bhuyan, Dharma P. Agrawal:
Generalized Hypercube and Hyperbus Structures for a Computer Network. 323-333 - Vijay K. Vaishnavi:
Multidimensional Height-Balanced Trees. 334-343 - Norman H. Christ, Anthony E. Terrano:
A Very Fast Parallel Processor. 344-350 - Ashok K. Agrawala, Edward G. Coffman Jr., M. R. Garey, Satish K. Tripathi:
A Stochastic Optimization Algorithm Minimizing Expected Flow Times on Uniform Processors. 351-356 - C.-S. Yeh, Irving S. Reed, Trieu-Kien Truong:
Systolic Multipliers for Finite Fields GF(2m). 357-360
- Alberto Apostolico, Alberto Negro:
Systolic Algorithms for String Manipulations. 361-364 - Kunio Fukunaga, Shoichiro Yamada, Harold S. Stone, Tamotsu Kasai:
A Representation of Hypergraphs in the Euclidean Space. 364-367 - Douglas Stott Parker Jr., Cauligi S. Raghavendra:
The Gamma Network. 367-373 - Tom Rhyne:
Limitations on Carry Lookahead Networks. 373-374 - Raul Mendez:
Benchmarks on Japanese and American Supercomputers - Preliminary Results. 374
Volume 33, Number 5, May 1984
- Benjamin W. Wah, Y. W. Eva Ma:
MANIP - A Multicomputer Architecture for Solving Combinatorial Extremum-Search Problems. 377-390 - Hector Garcia-Molina, Richard J. Lipton, Jacobo Valdes:
A Massive Memory Machine. 391-399 - Miguel Angel Fiol, J. Luis A. Yebra, Ignacio Alegre de Miquel:
Line Digraph Iterations and the (d, k) Digraph Problem. 400-403 - Ehud D. Karnin:
A Parallel Algorithm for the Knapsack Problem. 404-408 - Robert A. Whiteside, Neil S. Ostlund, Peter G. Hibbard:
A Parallel Jacobi Diagonalization Algorithm for a Loop Multiple Processor System. 409-413 - Erling Wold, Alvin M. Despain:
Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations. 414-426 - Franco P. Preparata, Witold Lipski Jr.:
Optimal Three-Layer Channel Routing. 427-437 - Balakrishnan Krishnamurthy:
An Improved Min-Cut Algorithm for Partitioning VLSI Networks. 438-446
- Karl W. Doty:
New Designs for Dense Processor Interconnection Networks. 447-450 - F. S. Wong, Mabo Robert Ito:
A Loop-Structured Switching Network. 450-455 - Kouichi Wada, Kenichi Hagihara, Nobuki Tokura:
Area-Time Optimal Fast Implementation of Several Functions in a VLSI Model. 455-462 - Alan H. Karp:
Exponential and Logarithm by Sequential Squaring. 462-464
Volume 33, Number 6, June 1984
- Jacob Savir, Paul H. Bardell:
On Random Pattern Test Length. 467-474 - Dhananjay Brahme, Jacob A. Abraham:
Functional Testing of Microprocessors. 475-485 - Anton T. Dahbura, Gerald M. Masson:
An O(n2.5) Fault Identification Algorithm for Diagnosable Systems. 486-492 - Yuval Tamir, Carlo H. Séquin:
Design and Application of Self-Testing Comparators Implemented with MOS PLA's. 493-506 - T. S. Liu:
The Role of a Maintenance Processor for a General-Purpose Computer System. 507-517 - Kuang-Hua Huang, Jacob A. Abraham:
Algorithm-Based Fault Tolerance for Matrix Operations. 518-528 - Kang G. Shin, Yann-Hang Lee:
Error Detection Process - Model, Design, and Its Impact on Computer Performance. 529-540
- Edward J. McCluskey:
Verification Testing - A Pseudoexhaustive Test Technique. 541-546 - Joseph L. A. Hughes, Edward J. McCluskey, David J. Lu:
Design of Totally Self-Checking Comparators with an Arbitrary Number of Inputs. 546-550 - David G. Furchtgott, John F. Meyer:
A Performability Solution Method for Degradable Nonrepairable Systems. 550-554 - John Paul Shen, F. Joel Ferguson:
The Design of Easily Tastabel VLSI Array Multipliers. 554-560 - El Mostapha Aboulhamid, Eduard Cerny:
Built-In Testing of One-Dimensional Unilateral Iterative Arrays. 560-564 - Paola Velardi
, Ravishankar K. Iyer:
A Study of Software Failures and Recovery in the MVS Operating System. 564-568 - Cauligi S. Raghavendra, Algirdas Avizienis, Milos D. Ercegovac:
Fault Tolerance in Binary Tree Architectures. 568-572 - Hao Dong:
Modified Berger Codes for Detection of Unidirectional Errors. 572-575 - Bella Bose, T. R. N. Rao:
Unidirectional Error Codes for Shift-Register Memories. 575-578 - Eiji Fujiwara, Nobuo Mutoh, Kohji Matsuoka:
A Self-Testing Group-Parity Prediction Checker and Its Use for Built-In Testing. 578-583 - Bella Bose, Der Jei Lin:
PLA Implementation of k-out-of-n Code TSC Checker. 583-588
Volume 33, Number 7, July 1984
- Jack B. Dennis, Guang R. Gao, Kenneth W. Todd:
Modeling the Weather with a Data Flow Supercomputer. 592-603 - Harold S. Stone:
Database Applications ot the FETCH-AND-ADD Instruction. 604-612 - Wael Adi:
Fast Burst Error-Correction Scheme with Fire Code. 613-618 - Robert R. Seban, Howard Jay Siegel:
Shuffling with the Illiac and PM21 SIMD Networks. 619-625 - Reinhard Männer:
Hardware Task/Processor Scheduling in a Polyprocessor Environment. 626-636 - Sartaj Sahni:
Scheduling Multipipeline and Multiprocessor Computers. 637-645 - Gianfranco Bilardi, Franco P. Preparata:
An Architecture for Bitonic Sorting with Optimal VLSI Performance. 646-651 - Per-Erik Danielsson:
Serial/Parallel Convolvers. 652-667
- Joseph F. JáJá, Robert Michael Owens:
VLSI Sorting with Reduced Hardware. 668-671 - Ralf Hartmut Güting, Derick Wood:
Finding Rectangle Intersections by Divide-and Conquer. 671-675 - Farhad Hemmati, Donald L. Schilling, George Eichmann:
Adjacencies Between the Cycles of a Shift Register with Characteristic Polynomial (1 + x)n. 675-677 - Richard R. Shively, W. V. Robinson Jr., D. E. Orton:
Cascading Transmission Gates to Enhance Multiplier Performance. 677-679 - Zhiwei Xu:
Multivalued Logic and Fuzzy Logic - Their Relationship, Minimization, and Application to Fault Diagnosis. 679-681 - Arne A. Nilsson:
Comments on "The Reliability of Periodically Repaired n - 1/n Parallel Redundant Systems". 681
Volume 33, Number 8, August 1984
- Oliver Aberth:
Precise Scientific Computation with a Microprocessor. 685-690 - Wesley W. Chu, Min-Tsung Lan, Joseph L. Hellerstein:
Estimation of Intermodule Communication (IMC) and Its Applications in Distributed Processing Systems. 691-699 - Benjamin W. Wah:
A Comparative Study of Distributed Resource Sharing on Multiprocessors. 700-711 - Butler W. Lampson:
Gene McDaniel, Severo M. Ornstein: An Instruction Fetch Unit for a High-Performance Personal Conmputer. 712-730 - Richard P. Brent, H. T. Kung:
Systolic VLSI Arrays for Polynomial GCD Computation. 731-736
- Shigeo Kaneda:
A Class of Odd-Weight-Column SEC-DED-SbED Codes for Memory System Applications. 737-741 - James E. Smith:
On Separable Unordered Codes. 741-743 - Javad Khakbaz:
A Testable PLA Design with Low Overhead and High Fault Coverage. 743-745 - Hideo Fujiwara:
A New PLA Design for Universal Testability. 745-750 - Balakrishnan Krishnamurthy, Sheldon B. Akers Jr.:
On the Complexity of Estimating the Size of a Test Set. 750-753 - Javad Khakbaz, Edward J. McCluskey:
Self-Testing Embedded Parity Checkers. 753-756 - Gerard G. L. Meyer:
A Diagnosis Algorithm for the BGM System Level Fault Model. 756-758 - Teruhiko Yamada, Takashi Nanya:
Stuck-At Fault Tests in the Presence of Undetectable Bridging Faults. 758-761 - Syed Zahoor Hassan:
Signature Testing of Sequential Machines. 762-764 - D. Michael Miller, Jon C. Muzio:
Spectral Fault Signatures for Single Stuck-At Faults in Combinational Networks. 765-769 - A. Yavuz Oruç:
A Classification of Cube-Connected Networks with a Simple Control Scheme. 769-772
Volume 33, Number 9, September 1984
- Bernard Chazelle:
Computational Geometry on a Systolic Chip. 774-785 - Lanfranco Lopriore:
Capability Based Tagged Architectures. 786-803 - Peter Scheuermann, Geoffrey Wu:
Heuristic Algorithms for Broadcasting in Point-to-Point Computer Networks. 804-811 - Stephen S. Yau, Wonmo Hong:
Performance Optimization of a CSMA Protocol for Local Computer Networks. 812-817 - Ernst L. Leiss:
Data Integrity in Digital Optical Disks. 818-827 - John G. Cleary:
Compact Hash Tables Using Bidirectional Linear Probing. 828-834 - André M. Van Tilborg, Larry D. Wittie:
Wave Scheduling - Decentralized Scheduling of Task Forces in Multicomputers. 835-844 - Donald T. Tang, Chin-Long Chen:
Logic Test Pattern Generation Using Linear Codes. 845-850
- Kei Hiraki, Kenji Nishida, Toshio Shimada:
Evaluation of Associative Memory Using Parallel Chained Hashing. 851-855 - Gopal Lakhani:
An Improved Distribution Algorithm for Shortest Paths Problem. 855-857 - Charles Delorme, G. Farhi:
Large Graphs with Given Degree and Diameter - Part I. 857-860
Volume 33, Number 10, October 1984
- André Thayse:
Synthesis and Asynchronous Implementation of Algorithms Using a Generalized P-Function Concept. 861-868 - Hubert D. Kirrmann, Felix Kaufmann:
Poolpo - A Pool of Processors for Process Control Applications. 869-878 - Tsutomu Sasao:
Input Variable Assignment and Output Phase Optimization of PLA's. 879-894 - David Lee Tuomenoksa, Howard Jay Siegel:
Task Preloading Schemes for Reconfigurable Parallel Processing Systems. 895-905 - In-Shek Hsu, Irving S. Reed, Trieu-Kien Truong, Ke Wang, Chiunn-Shyong Ye, Leslie J. Deutsch:
The VLSI Implementation of a Reed-Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm. 906-911
- Joep L. W. Kessels:
Two Designs of a Fault-Tolerant Clocking System. 912-919 - Peter J. Varman, I. V. Ramakrishnan, Donald S. Fussell:
A Robust Matrix-Multiplication Array. 919-922 - Balakrishna R. Iyer, J. Bartlett Sinclair:
Dynamic Memory Interconnections for Rapid Access. 923-927 - C. C. Guest, M. M. Mirsalehi, Thomas K. Gaylord:
Residue Number System Truth-Table Look-Up Processing - Moduli Selection and Logical Minimization. 927-931 - Maurizio A. Bonuccelli, Elena Lodi, Linda Pagli:
External Sorting in VLSI. 931-934 - Ten-Chuan Hsiao, Sharad C. Seth:
An Analysis of the Use of Rademacher-Walsh Spectrum in Compact Testing. 934-937 - Robert A. Mueller, Vicki H. Allan, Joseph Varghese:
The Complexity of Horizontal Word Encoding in Microprogrammed Machines. 938-939 - A. Yavuz Oruç, Deepak Prakash:
Routing Algorithms for Cellular Interconnection Arrays. 939-942 - John A. McPherson, Charles R. Kime:
Diagnosis in the Presence of Known Faults. 943-947 - Kuang-Wei Chiang, Zvonko G. Vranesic:
Comments on "Fault Diagnosis of MOS Combinational Networks". 947
Volume 33, Number 11, November 1984
- I. V. Ramakrishnan, Peter J. Varman:
Modular Matrix Multiplication on a Linear Array. 952-958 - Arbee L. P. Chen, Victor O. K. Li:
Improvement Algorithms for Semijoin Query Processing Programs in Distributed Database Systems. 959-967 - Alexandru Nicolau, Joseph A. Fisher:
Measuring the Parallelism Available for Very Long Instruction Word Architectures. 968-976 - Svetlana P. Kartashev, Steven I. Kartashev:
Efficient Internode Commucations in Reconfigurable Binary Trees. 977-990 - Chi-Yuan Chin, Kai Hwang:
Packet Switching Networks for Multiprocessors and Data Flow Computers. 991-1003 - Keki B. Irani, Ibrahim H. Önyüksel:
A Closed-Form Solution for the Performance Analysis of Multiple-Bus Multiprocessor Systems. 1004-1012 - Shlomo Weiss, James E. Smith:
Instruction Issue Logic in Pipelined Supercomputers. 1013-1022 - Hironori Kasahara, Seinosuke Narita:
Practical Multiprocessor Scheduling Algorithms for Efficient Parallel Processing. 1023-1029
- Utpal Banerjee, Daniel Gajski:
Fast Execution of Loops with IF Statements. 1030-1033 - Trevor N. Mudge, Humoud B. Al-Sadoun:
Memory Interference Models with Variable Connection Time. 1033-1038 - Michael J. Carey, Clark D. Thompson:
An Efficient Implementation of Search Trees on (lg N + 1) Processors. 1038-1041 - Stephen L. Stepoway, David L. Wells, Gerald R. Kane:
A Multiprocessor Architecture for Generating Fractal Surfaces. 1041-1045 - Daniel A. Reed:
The Performance of Multimicrocomputer Networks Supporting Dynamic Workloads. 1045-1048
Volume 33, Number 12, December 1984
- Steven R. Vegdahl:
A Survey of Proposed Architectures for the Execution of Functional Languages. 1050-1072 - D. T. Lee, Franco P. Preparata:
Computational Geometry - A Survey. 1072-1101 - John A. Stankovic:
A Perspective on Distributed Computer Systems. 1102-1115 - David A. Rennels:
Fault-Tolerant Computing - Concepts and Examples. 1116-1129 - Michael Fine, Fouad A. Tobagi:
Demand Assignment Multiple Access Schemes in Broadcast Bus Local Area Networks. 1130-1159 - Stanley L. Hurst:
Multiple-Valued Logic - Its Status and Its Future. 1160-1179 - Dennis Gannon, John Van Rosendale:
On the Impact of Communication Complexity on the Design of Parallel Numerical Algorithms. 1180-1194 - Philip Heidelberger, Stephen S. Lavenberg:
Computer Performance Evaluation Methodology. 1195-1220 - John L. Hennessy:
VLSI Processor Architecture. 1221-1246 - Charles L. Seitz:
Concurrent VLSI Architectures. 1247-1265
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