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ORCIDSIGARCH Computer Architecture News, Volume 42
Volume 42, Number 1, March 2014
- Rajeev Balasubramonian, Al Davis, Sarita V. Adve:
Architectural Support for Programming Languages and Operating Systems, ASPLOS 2014, Salt Lake City, UT, USA, March 1-5, 2014. ACM 2014, ISBN 978-1-4503-2305-5 [contents]
Volume 42, Number 2, May 2014
- Subijit Mondal, Subhashis Maitra:
Data security-modified AES algorithm and its applications. 1-8 - Soumik Sen, Subhashis Maitra:
Three levels three dimensional compact coding. 9-14 - Alexander Thomasian, Bingxing Liu, Yuhui Deng:
Balancing disk access times in RAID5 disk arrays in degraded mode by conditionally prioritizing fork/join requests. 15-19 - Jayneel Gandhi
, Arkaprava Basu, Mark D. Hill, Michael M. Swift:
BadgerTrap: a tool to instrument x86-64 TLB misses. 20-23
- Mark Thorson:
Internet nuggets. 24-36
Volume 42, Number 3, June 2014
- ACM/IEEE 41st International Symposium on Computer Architecture, ISCA 2014, Minneapolis, MN, USA, June 14-18, 2014. IEEE Computer Society 2014, ISBN 978-1-4799-4396-8 [contents]
Volume 42, Number 4, September 2014
- Yuetsu Kodama, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato:
PEACH2: An FPGA-based PCIe network device for Tightly Coupled Accelerators. 3-8 - Shimpei Nomura, Takuji Mitsuishi, Jun Suzuki, Yuki Hayashi, Masaki Kan, Hideharu Amano:
Performance Analysis of the Multi-GPU System with ExpEther. 9-14 - Tsuyoshi Watanabe, Naohito Nakasato:
GPU Accelerated Hybrid Tree Algorithm for Collision Less N-body Simulations. 15-20 - Haruhisa Tsuyama, Tsutomu Maruyama:
GPU and FPGA Acceleration of Level Set Method. 21-25 - Yu Tanabe, Tsutomu Maruyama:
Fast and Accurate Optical Flow Estimation using FPGA. 27-32 - César Torres-Huitzil, Marco Aurelio Nuño-Maganda:
Areatime Efficient Implementation of Local Adaptive Image Thresholding in Reconfigurable Hardware. 33-38 - Diana Göhringer:
Reconfigurable Multiprocessor Systems: Handling Hydras Heads - A Survey. 39-44 - Kentaro Sano, Ryotaro Chiba, Tomoya Ueno, Hayato Suzuki, Ryo Ito, Satoru Yamamoto:
FPGA-based Custom Computing Architecture for Large-Scale Fluid Simulation with Building Cube Method. 45-50 - Tao Wang, Guangyu Sun, Jiahua Chen, Jian Gong, Haoyang Wu, Xiaoguang Li, Songwu Lu, Jason Cong:
GRT: A Reconfigurable SDR Platform with High Performance and Usability. 51-56 - Yuki Ando, Masataka Ogawa, Yuya Mizoguchi, Kouta Kumagai, Miaw Torng-Der, Shinya Honda:
A Case Study of FPGA Blokus Duo Solver by System-Level Design. 57-62 - Mioara Joldes, Valentina Popescu, Warwick Tucker:
Searching for Sinks for the Hénon Map using a Multipleprecision GPU Arithmetic Library. 63-68 - Rie Soejima, Koji Okina, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri:
A Memory Profiling Framework for Stencil Computation on an FPGA Accelerator with High Level Synthesis. 69-74 - Shin Morishima, Hiroki Matsutani:
Performance Evaluations of Graph Database using CUDA and OpenMP Compatible Libraries. 75-80 - Takuji Mitsuishi, Shimpei Nomura, Jun Suzuki, Yuki Hayashi, Masaki Kan, Hideharu Amano:
Accelerating Breadth First Search on GPU-BOX. 81-86 - José L. Núñez-Yáñez:
Energy efficient Reconfigurable Computing with Adaptive Voltage and Logic scaling. 87-92
- Mark Thorson:
Internet Nuggets. 93-101
Volume 42, Number 5, December 2014
- Atin Mukherjee, Amitabha Sinha, Debesh Choudhury:
A Novel Architecture of Area Efficient FFT Algorithm for FPGA Implementation. 1-6 - Jean-Louis Lafitte:
Entangled-Coupling. 7-15
- Mark Thorson:
Internet Nuggets. 16-25
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