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International Journal of High Performance Systems Architecture, Volume 1
Volume 1, Number 1, 2007
- Jurij Silc, Theo Ungerer, Borut Robic:
Dynamic branch prediction and control speculation. 2-13 - Arnaud Tisserand:
High-performance hardware operators for polynomial evaluation. 14-23 - Kyriakos Stavrou, Costas Kyriacou, Paraskevas Evripidou, Pedro Trancoso:
Chip multiprocessor based on data-driven multithreading model. 34-43 - Nadia Nedjah, Luiza de Macedo Mourelle:
Parallel computation of modular exponentiation for fast cryptography. 44-49 - Enrique Alba, Guillermo Leguizamón, Guillermo Ordoñez:
Two models of parallel ACO algorithms for the minimum tardy task problem. 50-59 - Javier Díaz, Eduardo Ros, Alberto Prieto, Francisco J. Pelayo:
Fine grain pipeline systems for real-time motion and stereo-vision computation. 60-68 - Maurício L. Pilla, Bruce R. Childers, Felipe Maia Galvão França, Amarildo T. da Costa, Philippe Olivier Alexandre Navaux:
Limits for a feasible speculative trace reuse implementation. 69-76
Volume 1, Number 2, 2007
- Robert Ronan, Colin C. Murphy, Tim Kerins, Colm O'hEigeartaigh, Paulo S. L. M. Barreto:
A flexible processor for the characteristic 3 ηT pairing. 79-88 - Hongyan Yang, Sotirios G. Ziavras, Jie S. Hu:
Reconfiguration support for vector operations. 89-97 - Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh:
Design of a router for network-on-chip. 98-105 - Bijan Ansari, Huapeng Wu:
Efficient finite field processor for GF(2163) and its implementation. 106-112 - Muhammad Ali, Michael Welzl, Sven Hessler, Sybille Hellebrand:
An efficient fault tolerant mechanism to deal with permanent and transient failures in a network on chip. 113-123 - Griselda Saldaña, Miguel Arias-Estrada:
Compact FPGA-based systolic array architecture suitable for vision systems. 124-132 - Andrew Byrne, Francis M. Crowe, William P. Marnane, Nicolas Méloni, Arnaud Tisserand, Emanuel M. Popovici:
SPA resistant elliptic curve cryptosystem using addition chains. 133-142
Volume 1, Number 3, 2008
- Mitchell Loeb, Alan L. Tharp:
Gray code chaining: a high performance hashing algorithm for limited storage applications. 143-149 - Venka Palaniappan, Shahram Latifi:
A combinatorial study of substar reliability of the star network. 150-154 - Fadi N. Sibai:
Area-efficient floorplans and interconnects for homogeneous multi-core architectures. 155-162 - Santanu Kundu, Santanu Chattopadhyay:
Network-on-chip architecture design based on mesh-of-tree deterministic routing topology. 163-182 - Apan Qasem, Ken Kennedy:
Model-guided empirical tuning of loop fusion. 183-198 - Rodrigo Martins da Silva, Nadia Nedjah, Luiza de Macedo Mourelle:
Efficient hardware for modular exponentiation using the sliding-window method. 199-206
Volume 1, Number 4, 2008
- José L. Risco-Martín, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, David Atienza:
Particle swarm optimisation of memory usage in embedded systems. 209-219 - Earl B. Foxwell, Beatrice M. Ombuki-Berman:
Particle swarm optimisation for the design of two-connected networks with bounded rings. 220-230 - Simon Harding, Wolfgang Banzhaf:
Genetic programming on GPUs for image processing. 231-240 - Mario Cámara, Julio Ortega, Francisco de Toro:
High performance computing for dynamic multi-objective optimisation. 241-250 - Jose Luis Guisado, Francisco Fernández de Vega, Francisco Jiménez-Morales, K. A. Iskra, Peter M. A. Sloot:
Using cellular automata for parallel simulation of laser dynamics with dynamic load balancing. 251-259 - Juan Luis Jiménez Laredo, Pedro A. Castillo, Antonio Miguel Mora, Juan Julián Merelo Guervós, Carlos M. Fernandes:
Resilience to churn of a peer-to-peer evolutionary algorithm. 260-268 - Alberto Guillén, Dusan Sovilj, Amaury Lendasse, Fernando Mateo, Ignacio Rojas:
Minimising the delta test for variable selection in regression problems. 269-281
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