default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID30th MICRO 1997: Research Triangle Park, North Carolina, USA
- Mark Smotherman, Tom Conte:
Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997. ACM/IEEE Computer Society 1997, ISBN 0-8186-7977-8 - Chih-Chieh Lee, I-Cheng K. Chen, Trevor N. Mudge:
The bi-Mode Branch Predictor. 4-13 - Quinn Jacobson, Eric Rotenberg, James E. Smith:
Path-Based Next Trace Prediction. 14-23 - Daniel H. Friendly, Sanjay J. Patel, Yale N. Patt:
Alternative Fetch and Issue Policies for the Trace Cache Fetch Mechanism. 24-33 - Jared Stark, Paul Racunas, Yale N. Patt:
Reducing the Performance Impact of Instruction Cache Misses by Writing Instructions into the Reservation Stations Out-of-Order. 34-43 - Jude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin:
On High-Bandwidth Data Cache Design for Multi-Issue Processors. 46-56 - Teresa L. Johnson, Matthew C. Merten, Wen-mei W. Hwu:
Run-Time Spatial Locality Detection and Optimization. 57-64 - Graham P. Jones, Nigel P. Topham:
A Comparison of Data Prefetching on an Access Decoupled and Superscalar Machine. 65-70 - Nigel P. Topham, Antonio González, José González:
The Design and Performance of a Conflict-Avoiding Cache. 71-80 - James E. Bennett, Michael J. Flynn:
Prediction Caches for Superscalar Processors. 81-90 - David I. August, Wen-mei W. Hwu, Scott A. Mahlke:
A Framework for Balancing Control Flow and Predication. 92-103 - Seongbae Park, SangMin Shim, Soo-Mook Moon:
Evaluation of Scheduling Techniques on a SPARC-based VLIW Testbed. 104-113 - Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay S. Parekh, Dean M. Tullsen
:
Tuning Compiler Optimizations for Simultaneous Multithreading. 114-124 - Milo M. K. Martin, Amir Roth, Charles N. Fischer:
Exploiting Dead Value Information. 125-135 - Eric Rotenberg, Quinn Jacobson, Yiannakis Sazeides, James E. Smith:
Trace Processors. 138-148 - Keith I. Farkas, Paul Chow, Norman P. Jouppi, Zvonko G. Vranesic:
The Multicluster Architecture: Reducing Cycle Time Through Partitioning. 149-159 - Roger Espasa, Mateo Valero, James E. Smith:
Out-of-Order Vector Architectures. 160-170 - Corinna G. Lee, Derek J. DeVries:
Initial Results on the Performance and Cost of Vector Microprocessors. 171-182 - Johnson Kin, Munish Gupta, William H. Mangione-Smith:
The Filter Cache: An Energy Efficient Memory Structure. 184-193 - Charles Lefurgy, Peter L. Bird, I-Cheng K. Chen, Trevor N. Mudge:
Improving Code Density Using Compression Techniques. 194-203 - Darko Kirovski, Johnson Kin, William H. Mangione-Smith:
Procedure Based Program Compression. 204-213 - Gary S. Tyson, Todd M. Austin:
Improving the Accuracy and Performance of Memory Communication Through Renaming. 218-227 - Chung-Ho Chen, Akida Wu:
Microarchitecture Support for Improving the Performance of Load Target Prediction. 228-234 - Andreas Moshovos, Gurindar S. Sohi:
Streamlining Inter-Operation Memory Communication via Data Dependence Prediction. 235-245 - Yiannakis Sazeides, James E. Smith:
The Predictability of Data Values. 248-258 - Brad Calder, Peter Feller, Alan Eustace:
Value Profiling. 259-269 - Freddy Gabbay, Avi Mendelson:
Can Program Profiling Support Value Prediction? 270-280 - Kai Wang, Manoj Franklin:
Highly Accurate Data Value Prediction Using Hybrid Predictors. 281-290 - Jeffrey Dean, James E. Hicks, Carl A. Waldspurger, William E. Weihl, George Z. Chrysos:
ProfileMe: Hardware Support for Instruction-Level Profiling on Out-of-Order Processors. 292-302 - Nicholas C. Gloy, Trevor Blackwell, Michael D. Smith, Brad Calder:
Procedure Placement Using Temporal Ordering Information. 303-313 - Todd C. Mowry, Chi-Keung Luk:
Predicting Data Cache Misses in Non-Numeric Applications through Correlation Profiling. 314-320 - Heng Liao, Andrew Wolfe:
Available Parallelism in Video Applications. 321-329 - Chunho Lee, Miodrag Potkonjak, William H. Mangione-Smith:
MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communicatons Systems. 330-335 - F. Jesús Sánchez, Antonio González:
Cache Sensitive Modulo Scheduling. 338-348 - Steve Carr, Yiping Guan:
Unroll-and-Jam Using Uniformly Generated Sets. 349-357 - Rajiv Gupta, David A. Berson, Jesse Zhixi Fang:
Resource-Sensitive Profile-Directed Data Flow Analysis for Code Optimization. 358-368
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-10-04 20:06 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
