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ORCID51st ISMVL 2021: Nur-Sultan, Kazakhstan
- 51st IEEE International Symposium on Multiple-Valued Logic, ISMVL 2021, Nur-Sultan, Kazakhstan, May 25-27, 2021. IEEE 2021, ISBN 978-1-7281-9224-6
- Milena Stankovic, Claudio Moraga, Radomir S. Stankovic:
Construction of Ternary Plateaued Functions from Quadratic Forms for Ternary Bent Functions. 1-6 - Radomir S. Stankovic, Milena Stankovic, Claudio Moraga, Jaakko T. Astola:
Remarks on Particular Properties of Ternary Bent Functions and Construction Algorithms. 7-12 - Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler:
Improvement in the Quality of Solutions of a Heuristic Linear Decomposer for Index Generation Functions. 13-18 - Tsutomu Sasao, Jon T. Butler:
Linear Decompositions for Multi-Valued Input Classification Functions. 19-25 - Norihiro Kamide:
Symmetric Paraconsistent Quantum Logic. 26-32 - Kadir Emir, David Kruml, Jan Paseka
, Thomas Vetterlein:
Linear orthogonality spaces as a new approach to quantum logic. 33-38 - Patrik Eklund:
Quantales in Circuit Design. 39-42 - Norihiro Kamide:
Notes on Avron's Self-extensional Four-valued Paradefinite Logic. 43-49 - Yang Song, Hitoshi Omori, Satoshi Tojo:
A two-valued semantics for infectious logics. 50-55 - Mike Behrisch:
Centralising monoids with conservative majority operations as witnesses. 56-61 - Lucien Haddad, Masahiro Miyakawa, Maurice Pouzet, Hisayuki Tatsumi:
Hereditary rigidity, separation and density: In memory of Professor I.G. Rosenberg. 62-67 - Arnon Avron:
Proof Systems for Gödel Logics with an Involution. 68-73 - Hitoshi Omori, Daniel Skurt:
Untruth, falsity and non-deterministic semantics. 74-80 - Miroslav Kvassay, Elena Zaitseva, Peter Sedlacek, Patrik Rusnak:
Multi-valued Decision Diagrams in Reliability Analysis of Consecutive k-out-of-(2k-1) Systems. 81-86 - Thomas Grurl, Jürgen Fuß, Robert Wille:
Lessons Learnt in the Implementation of Quantum Circuit Simulation Using Decision Diagrams. 87-92 - Marek A. Perkowski, Kyle Liu:
Binary, Multi-Valued and Quantum Board and Computer Games to Teach Synthesis of Classical and Quantum Logic Circuits. 93-100 - Claudio Moraga:
Ternary Toffoli-type Reversible Gates: Control Alternatives and Quantum Models. 101-106 - D. Michael Miller, Gerhard W. Dueck:
Descending Order Transformation-based Synthesis of MVL Reversible Circuits. 107-112 - Martin Lukac, Khaled El-Fakih:
On Distinguishing Sequences of Several Classes of Reversible Finite State Machines. 113-119 - Maggie Bao, Cole Powers, Marek A. Perkowski:
Quantum Algorithm for Machine Learning and Circuit Design Based on Optimization of Ternary - Input, Binary-Output Kronecker-Reed-Muller Forms. 120-127 - Saad Al-Askaar, Marek A. Perkowski:
A New Approach to Machine Learning Based on Functional Decomposition of Multi -Valued Functions. 128-135 - Parisa Abdolrahim Poorheravi, Vincent C. Gaudet:
Hierarchical Subspace Learning for Dimensionality Reduction to Improve Classification Accuracy in Large Data Sets. 136-141 - Naoto Soga, Ryosuke Kuramochi, Hiroki Nakahara:
A High-Throughput Detection Circuit based on 2q+1-Valued Deep Neural Networks. 142-147 - Tsutomu Sasao, Yuto Horikawa, Yukihiro Iguchi:
A Design Method for Multiclass Classifiers. 148-153 - Akira Ito, Rei Ueno, Naofumi Homma:
A Formal Approach to Identifying Hardware Trojans in Cryptographic Hardware. 154-159 - Can Aknesil, Elena Dubrova:
An FPGA Implementation of 4×4 Arbiter PUF. 160-165 - Ayokunle Fadamiro, Pouyan Rezaie, Spencer K. Millican, Christoper B. Harris:
A Pragmatic Quaternary FPGA Implemented with Floating Gate Memories. 166-171 - Abdolah Amirany, Mohammad Hossein Moaiyeri, Kian Jafari:
MTMR-SNQM: Multi-Tunnel Magnetoresistance Spintronic Non-volatile Quaternary Memory. 172-177 - Philipp Niemann, Rolf Drechsler:
Synthesis of Asymptotically Optimal Adders for Multiple-Valued Logic. 178-182 - Jeonggyu Yang, Hyundong Lee, Jaehoon Jeong, Taehak Kim, Sin-Hyung Lee, Taigon Song:
A Practical Implementation of the Ternary Logic Using Memristors and MOSFETs. 183-188 - JongHyun Ko, KwanWoo Park, Suhyeong Yong, TaeGam Jeong, Taehak Kim, Taigon Song:
An Optimal Design Methodology of Ternary Logic in Iso-device Ternary CMOS. 189-194 - Yosuke Iijima, Yasushi Yuminaka:
Efficient PAM-4 Data Transmission with Closed Eye Using Symbol Distribution Estimation. 195-200 - Takao Waho, Tomoaki Koizumi, Hitoshi Hayashi:
A multi-level cascaded delta-sigma modulator with reduced quantization noise leakage. 201-206 - Richard Deng, Yuchen Huang, Marek A. Perkowski:
Quantum Motions and Emotions for a Humanoid Robot Actor. 207-214
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