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ORCIDIFIP PACT 1994: Montréal, Canada
- Michel Cosnard, Guang R. Gao, Gabriel M. Silberman:
Parallel Architectures and Compilation Techniques, Proceedings of the IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques, PACT'94, Montréal, Canada, 24-26 August, 1994. IFIP Transactions A-50, North-Holland 1994, ISBN 0-444-81926-6
Part 1 - High-Performance Architectures
- Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
EM-C: Programming with Explicit Parallelism and Locality for EM-4 Multiprocessor. 3-14 - Jesper Vasell:
A Fine-Grain Threaded Abstract Machine. 15-24 - David H. Albonesi, Israel Koren:
Tradeoffs in the Design of Single Chip Multiprocessors. 25-34
Part 2 - Code Generation for Multithreaded and Dataflow Architectures
- Lucas Roh, Walid A. Najjar, Bhanu Shankar, A. P. Wim Böhm:
An Evaluation of Optimized Threaded Code Generation. 37-46 - Sumit Sur, A. P. Wim Böhm:
Functional I-structure, and M-structure Implementations of NAS Benchmark FT. 47-56 - Masahiro Yasugi, Satoshi Matsuoka, Akinori Yonezawa:
The Plan-Du Style Compilation Technique for Eager Data Transfer in Thread-Based Execution. 57-66
Part 3 - Memory and Cache Issues
- Trung N. Nguyen, Farnaz Mounes-Toussi, David J. Lilja, Zhiyuan Li:
A Compiler-Assisted Scheme for Adaptive Cache Coherence Enforcement. 69-78 - David Glasco, Bruce Delagi, Michael J. Flynn:
The Impact of Cache Coherence Protocols on Systems using Fine-Grain Data Synchronization. 79-88 - Abhaya Asthana, Mark Cravatts, Paul Krzyzanowski:
Towards a Programming Environment for a Computer with Intelligent Memory. 89-98
Part 4 - Distributed Memory Machines
- Inkyu Kim, Michael Wolfe:
Communication Analysis for Multicomputer Compilers. 101-110 - Robert E. Bixby, Ken Kennedy, Ulrich Kremer:
Automatic Data Layout Using 0-1 Integer Programming. 111-122 - Ernesto Su, Daniel J. Palermo, Prithviraj Banerjee:
Processor Tagged Descriptors: A Data Structure for Compiling for Distributed-Memory Multicomputers. 123-132
Part 5 - Multi-Level Parallelism
- David A. Berson, Rajiv Gupta, Mary Lou Soffa:
Resource Spackling: A Framework for Integrating Register Allocation in Local and Global Schedulers. 135-146 - Mantipragada Srinivas, Alexandru Nicolau, Vicki H. Allan:
An Approach to Combine Predicated/Speculative Execution for Programs with Unpredictable Branches. 147-156 - Chris J. Newburn, Derek B. Noonburg, John Paul Shen:
A PDG-based Tool and its Use in Analyzing Program Control Dependences. 157-168
Part 6 - Compiling for Parallel Machines
- Tor E. Jeremiassen, Susan J. Eggers:
Static Analysis of Barrier Synchronization in Explicitly Parallel Programs. 171-180 - Rajeev J. Surati, Andrew A. Berlin:
Exploiting the Parallelism Exposed by Partial Evaluation. 181-192 - Mayez A. Al-Mouhamed, Lubomir Bic:
Effects of Loop Fusion and Statement Migration on the Speedup of Vector Multiprocessors. 193-202
Part 7 - Logic Languages
- Evan Tick:
Practical Static Mode Analyses of Concurrent Logic Languages. 205-214 - Barton C. Massey, Evan Tick:
Demand-Driven Dataflow for Concurrent Committed-Choice Code. 215-224 - Hiecheol Kim, Jean-Luc Gaudiot:
Exploitation of Fine-grain Parallelism in Logic Languages on Massively Parallel Architectures. 225-234
Part 8 - Application Specific Architectures
- Olivier Maffeïs, Paul Le Guernic:
From SIGNAL to fine-grain parallel implementations. 237-246 - Rainer Leupers, Wolfgang Schenk, Peter Marwedel:
Microcode Generation for Flexible Parallel Target Architectures. 247-256 - Hidemoto Nakada, Takuya Araki, Hanpei Koike, Hidehiko Tanaka:
A Fleng Compiler for PIE64. 257-266
Part 9 - Functional Languages, Dataflow Models and Implementation
- Panos Rondogiannis, William W. Wadge:
Compiling Higher-Order Functions for Tagged-Dataflow. 269-278 - Shigeru Kusakabe, Eiichi Takahashi, Rin-Ichiro Taniguchi, Makoto Amamiya:
Dataflow-Based Lenient Implementation of a Functional Language, Valid, on Conventional Multi-processors. 279-288 - Péter Kacsuk:
Dataflow and Logicflow Models for Defining a Parallel Prolog Abstract Machine. 289-298 - John Sargeant, Chris C. Kirkham, Steve Anderson:
Towards a Computational Model for UFO. 299-308
Part 10 - Short Papers
- Vicki H. Allan, M. R. O'Neill:
Software pipelining: A Genetic Algorithm Approach. 311-314 - Chandra R. Asthagiri, Jerry L. Potter:
Parallel Compilation on Associative Computers. 315-318 - Andrea Capitanio, Nikil D. Dutt
, Alexandru Nicolau:
Partitioning of Variables for Multiple-Register-File Architectures via Hypergraph Coloring. 319-322 - Scott M. Denton, John Feo, Patrick Miller:
Realizing Parallel Reduction Operations in Sisal 1.2. 323-326 - Benoît Dupont de Dinechin:
An Introduction to Simplex Scheduling. 327-330 - James S. Mattson Jr., William G. Griswold:
Speculative Evaluation for Parallel Graph Reduction. 331-334 - Avi Mendelson, Bilha Mendelson:
Toward a General-Purpose Multi-Stream System. 335-338 - Cyril Meurillon, Ciaran O'Donnell:
Representing Control Flow Behaviour of Programs. 339-342 - Ron Sass, Matt W. Mutka:
Transformations on Doubly Nested Loops. 343-346 - David F. Snelling, Gregory K. Egan:
A Comparative Study of Data-Flow Architectures. 347-350 - Andrew Sohn, Lingmian Kong, Mitsuhisa Sato:
Progress Report on Porting Sisal to the EM-4 Multiprocessor. 351-354 - Jonas Vasell:
Static vs. Dynamic Strategies for Fine-Grain Dataflow Synchronization. 355-358 - Jian Wang, Andreas Krall, M. Anton Ertl, Christine Eisenbeis:
Trace Software Pipelining: A Novel Technique for Parallelization of Loops with Branches. 359-362
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