DFT 2016: Storrs, CT, USA

Session 1: Aging

Session 2: Fault Tolerance in Latches & Approximate Computing

Session 3: System-level Approaches

Session 4: Special Session on Fault-tolerant Realtime Systems

Session 5: FPGA & CMOS Technologies

Session 6: Architecture-level Techniques

Session 7: Fault Tolerance in NoC & SoC

Session 8: Special Session on the use of VLSI Techniques for Securing ICs against Attacks

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