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ORCIDISVLSI 2010: Lixouri Kefalonia, Greece
- Nikolaos S. Voros, Amar Mukherjee, Nicolas Sklavos, Konstantinos Masselos, Michael Hübner:
VLSI 2010 Annual Symposium - Selected papers. Lecture Notes in Electrical Engineering 105, Springer 2011, ISBN 978-94-007-1487-8
Architecture - Level Design Solutions
- Elena Kakoulli
, Vassos Soteriou, Theocharis Theocharides:
Intelligent NOC Hotspot Prediction. 3-16 - Naoya Onizawa, Tomoyoshi Funazaki, Atsushi Matsumoto, Takahiro Hanyu:
Accurate Asynchronous Network-on-Chip Simulation Based on a Delay-Aware Model. 17-30 - Apostolos P. Fournaris, Daniel M. Hein:
Trust Management Through Hardware Means: Design Concerns and Optimizations. 31-45 - Cristina Silvano, William Fornaciari, Gianluca Palermo, Vittorio Zaccaria, Fabrizio Castro, Marcos Martínez, Sara Bocchio, Roberto Zafalon, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Maryse Wouters, Carlos Kavka, Luka Onesti, Alessandro Turco, Umberto Bondi, Giovanni Mariani, Hector Posadas, Eugenio Villar, Chris Wu, Dongrui Fan, Hao Zhang, Shibin Tang:
MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures. 47-63 - Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Andrea Di Biagio, Ettore Speziale, Michele Tartara, Diego Melpignano, J. M. Zins, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Sotirios Xydis, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout:
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures. 65-79
Embedded System Design
- David Cuesta, José Luis Ayala, José Ignacio Hidalgo, David Atienza, Andrea Acquaviva, Enrico Macii:
Adaptive Task Migration Policies for Thermal Control in MPSoCs. 83-115 - Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos:
A High Level Synthesis Exploration Framework with Iterative Design Space Partitioning. 117-131 - Vikram Sampath Kumar, Kevin M. Irick, Ahmed Al-Maashri, Vijaykrishnan Narayanan:
A Scalable Bandwidth-Aware Architecture for Connected Component Labeling. 133-149 - Wolfgang Müller, Da He, Fabian Mischkalla, Arthur Wegele, Adrian Larkham, Paul Whiston, Pablo Peñil, Eugenio Villar, Nikolaos Mitas, Dimitrios Kritharidis, Florent Azcarate, Manuel Carballeda:
The SATURN Approach to SysML-Based HW/SW Codesign. 151-164 - Christos Baloukas, Lazaros Papadopoulos, Dimitrios Soudris, Sander Stuijk, Olivera Jovanovic, Florian Schmoll, Peter Marwedel, Daniel Cordes, Robert Pyka, Arindam Mallik, Stylianos Mamagkakis, François Capman, Séverin Collet, Nikolaos Mitas, Dimitrios Kritharidis:
Mapping Embedded Applications on MPSoCs: The MNEMEE Approach. 165-179 - Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin:
The MOSART Mapping Optimization for Multi-Core ARchiTectures. 181-195
Emerging Devices and Nanocomputing
- Theodoros Lioris, Grigoris Dimitroulakos, Kostas Masselos:
XMSIM: Extensible Memory Simulator for Early Memory Hierarchy Evaluation. 199-216 - Vasileios Tenentes, Xrysovalantis Kavousianos:
Self-Freeze Linear Decompressors: Test Pattern Generators for Low Power Scan Testing. 217-230 - Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos:
SUT-RNS Forward and Reverse Converters. 231-244 - Khaldon Hassan, Marcello Coppola:
Off-Chip SDRAM Access Through Spidergon STNoC. 245-261 - Krishnendu Chakrabarty, Yang Zhao:
Digital Microfluidic Biochips: A Vision for Functional Diversity and More than Moore. 263-285
Reconfigurable Systems
- Joachim Meyer, Michael Hübner, Lars Braun, Oliver Sander, Juanjo Noguera, Rodney Stewart, Jürgen Becker:
FPGA Startup Through Sequential Partial and Dynamic Reconfiguration. 289-302 - Lars Braun, Jürgen Becker:
Two Dimensional Dynamic Multigrained Reconfigurable Hardware. 303-318 - Paul Brelet, Philippe Millet, Arnaud Grasset, Philippe Bonnot, Frank Ieromnimon, Dimitrios Kritharidis, Nikolaos S. Voros:
Design for Embedded Reconfigurable Systems Using MORPHEUS Platform. 319-333 - Diana Göhringer, Jürgen Becker:
New Dimensions in Design Space and Runtime Adaptivity for Multiprocessor Systems Through Dynamic and Partial Reconfiguration: The RAMPSoC Approach. 335-346
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