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Publication search results
found 26 matches
- 2009
- Nicolas Beucher, Normand Bélanger, Yvon Savaria, Guy Bois:
High Acceleration for Video Processing Applications Using Specialized Instruction Set Based on Parallelism and Data Reuse. J. Signal Process. Syst. 56(2-3): 155-165 (2009) - Vanderlei Bonato, Eduardo Marques, George A. Constantinides:
A Floating-point Extended Kalman Filter Implementation for Autonomous Mobile Robots. J. Signal Process. Syst. 56(1): 41-50 (2009) - Jun Cai, Mohamed S. Shehata, Wael M. Badawy:
A Robust Video-Based Algorithm for Detecting Snow Movement in Traffic Scenes. J. Signal Process. Syst. 56(2-3): 307-326 (2009) - Hoseok Chang, Junho Cho, Wonyong Sung:
Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit. J. Signal Process. Syst. 56(2-3): 249-260 (2009) - Rafal Dlugosz, Krzysztof Iniewski:
Programmable Switched Capacitor Finite Impulse Response Filter with Circular Memory Implemented in CMOS 0.18 µm Technology. J. Signal Process. Syst. 56(2-3): 295-306 (2009) - Bo Fu, Paul Ampadu:
An Area Efficient FFT/IFFT Processor for MIMO-OFDM WLAN 802.11n. J. Signal Process. Syst. 56(1): 59-68 (2009) - Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Spyridon Toulatos, Gauthier Lafruit, Thanos Stouraitis, Rudy Lauwereins, Diederik Verkest:
Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution Environments. J. Signal Process. Syst. 56(2-3): 125-139 (2009) - Theodoros Giannopoulos, Vassilis Paliouras:
A Low-Complexity PTS-based PAPR Reduction Technique for OFDM Signals without Transmission of Side Information. J. Signal Process. Syst. 56(2-3): 141-153 (2009) - Mustafa Gök, Metin Mete Özbilen:
Evaluation of Sticky-Bit Generation Methods for Floating-Point Multipliers. J. Signal Process. Syst. 56(1): 51-57 (2009) - Roberto Gutierrez, Javier Valls:
Low-Power FPGA-Implementation of atan(Y/X) Using Look-Up Table Methods for Communication Applications. J. Signal Process. Syst. 56(1): 25-33 (2009) - Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winser E. Alexander:
Automated Design Space Exploration for DSP Applications. J. Signal Process. Syst. 56(2-3): 199-216 (2009) - Choong Jin Hyun, Myung Hoon Sunwoo:
Low Power Complexity-Reduced ME and Interpolation Algorithms for H.264/AVC. J. Signal Process. Syst. 56(2-3): 285-293 (2009) - Haideh M. Karkhanechi, Bernard C. Levy:
An Efficient Adaptive Channel Estimation Algorithm for MIMO OFDM Systems - Study of Doppler Spread Tolerance. J. Signal Process. Syst. 56(2-3): 261-271 (2009) - Geoff Knagge, Mark Bickerstaff, Brett Ninness, Steven R. Weller, Graeme Woodward:
A VLSI 8 × 8 MIMO Near-ML Detector with Preprocessing. J. Signal Process. Syst. 56(2-3): 229-247 (2009) - Ari Kulmala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen:
Evaluating SoC Network Performance in MPEG-4 Encoder. J. Signal Process. Syst. 56(2-3): 105-123 (2009) - Andrew K. C. Kwan, Mohamed Helaoui, Slim Boumaiza, Michael R. Smith, Fadhel M. Ghannouchi:
Wireless Communications Transmitter Performance Enhancement Using Advanced Signal Processing Algorithms Running in a Hybrid DSP/FPGA Platform. J. Signal Process. Syst. 56(2-3): 187-198 (2009) - Min Li, Bruno Bougard, Liesbet Van der Perre, Francky Catthoor:
Energy Aware Algorithm and Implementation of SDR Oriented HSDPA Chip Level Equalizer. J. Signal Process. Syst. 56(2-3): 327-340 (2009) - Alexey Lopich, Piotr Dudek:
Hardware Implementation of Skeletonization Algorithm for Parallel Asynchronous Image Processing. J. Signal Process. Syst. 56(1): 91-103 (2009) - David Novo, Thomas Schuster, Bruno Bougard, Andy Lambrechts, Liesbet Van der Perre, Francky Catthoor:
Energy-performance Exploration of a CGA-based SDR Processor. J. Signal Process. Syst. 56(2-3): 273-284 (2009) - Tokunbo Ogunfunmi, Thomas K. Paul:
Analysis of Convergence of a Frequency-Domain LMS Adaptive Filter Implemented as a Multi-Stage Adaptive Filter. J. Signal Process. Syst. 56(2-3): 341-350 (2009) - Daesun Oh, Keshab K. Parhi:
Low Complexity Decoder Architecture for Low-Density Parity-Check Codes. J. Signal Process. Syst. 56(2-3): 217-228 (2009) - A. Perez-Pascual, T. Sansaloni, Vicente Torres-Carot, Vicenc Almenar-Terre, Javier Valls:
Design of Power and Area Efficient Digital Down-converters for Broadband Communications Systems. J. Signal Process. Syst. 56(1): 35-40 (2009) - Andreas Persson, Lars Bengtsson:
Forward and Reverse Converters and Moduli Set Selection in Signed-Digit Residue Number Systems. J. Signal Process. Syst. 56(1): 1-15 (2009) - Michael R. Smith, James Miller, Steven Daeninck:
A Test-oriented Embedded System Production Methodology. J. Signal Process. Syst. 56(1): 69-89 (2009) - Farhat Thabet, Philippe Coussy, Dominique Heller, Eric Martin:
Exploration and Rapid Prototyping of DSP Applications using SystemC Behavioral Simulation and High-level Synthesis. J. Signal Process. Syst. 56(2-3): 167-186 (2009) - Vicente Torres-Carot, A. Perez-Pascual, T. Sansaloni, Javier Valls:
Design and FPGA-Implementation of a High Performance Timing Recovery Loop for Broadband Communications. J. Signal Process. Syst. 56(1): 17-23 (2009)
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