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Publication search results
found 56 matches
- 2020
- Jie Zhao, Albert Cohen:
Flextended Tiles: A Flexible Extension of Overlapped Tiles for Polyhedral Compilation. ACM Trans. Archit. Code Optim. 16(4): 47:1-47:25 (2020) - Khalid Ahmad, Hari Sundar, Mary W. Hall:
Data-driven Mixed Precision Sparse Matrix Vector Multiplication for GPUs. ACM Trans. Archit. Code Optim. 16(4): 51:1-51:24 (2020) - Ian Briggs, Arnab Das, Mark Baranowski, Vishal Chandra Sharma, Sriram Krishnamoorthy, Zvonimir Rakamaric, Ganesh Gopalakrishnan:
FailAmp: Relativization Transformation for Soft Error Detection in Structured Address Generation. ACM Trans. Archit. Code Optim. 16(4): 50:1-50:21 (2020) - Lorenzo Chelini, Oleksandr Zinenko, Tobias Grosser, Henk Corporaal:
Declarative Loop Tactics for Domain-specific Optimization. ACM Trans. Archit. Code Optim. 16(4): 55:1-55:25 (2020) - Kyle Daruwalla, Heng Zhuo, Rohit Shukla, Mikko H. Lipasti:
BitSAD v2: Compiler Optimization and Analysis for Bitstream Computing. ACM Trans. Archit. Code Optim. 16(4): 43:1-43:25 (2020) - Reem Elkhouly, Mohammad A. Alshboul, Akihiro Hayashi, Yan Solihin, Keiji Kimura:
Compiler-support for Critical Data Persistence in NVM. ACM Trans. Archit. Code Optim. 16(4): 54:1-54:25 (2020) - Daniel Gerzhoy, Xiaowu Sun, Michael Zuzak, Donald Yeung:
Nested MIMD-SIMD Parallelization for Heterogeneous Microprocessors. ACM Trans. Archit. Code Optim. 16(4): 48:1-48:27 (2020) - Zhen Hang Jiang, Yunsi Fei, David R. Kaeli:
Exploiting Bank Conflict-based Side-channel Timing Leakage of GPUs. ACM Trans. Archit. Code Optim. 16(4): 42:1-42:24 (2020) - Wenbin Jiang, Yang Ma, Bo Liu, Haikun Liu, Bing Bing Zhou, Jian Zhu, Song Wu, Hai Jin:
Layup: Layer-adaptive and Multi-type Intermediate-oriented Memory Optimization for GPU-based CNNs. ACM Trans. Archit. Code Optim. 16(4): 39:1-39:23 (2020) - Asif Ali Khan, Fazal Hameed, Robin Bläsing, Stuart S. P. Parkin, Jerónimo Castrillón:
ShiftsReduce: Minimizing Shifts in Racetrack Memory 4.0. ACM Trans. Archit. Code Optim. 16(4): 56:1-56:23 (2020) - Mostafa Koraei, Omid Fatemi, Magnus Jahre:
DCMI: A Scalable Strategy for Accelerating Iterative Stencil Loops on FPGAs. ACM Trans. Archit. Code Optim. 16(4): 36:1-36:24 (2020) - Aristeidis Mastoras, Thomas R. Gross:
Chunking for Dynamic Linear Pipelines. ACM Trans. Archit. Code Optim. 16(4): 44:1-44:25 (2020) - Leeor Peled, Uri C. Weiser, Yoav Etsion:
A Neural Network Prefetcher for Arbitrary Memory Access Patterns. ACM Trans. Archit. Code Optim. 16(4): 37:1-37:27 (2020) - Salonik Resch, S. Karen Khatamifard, Zamshed Iqbal Chowdhury, Masoud Zabihi, Zhengyang Zhao, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu:
PIMBALL: Binary Neural Networks in Spintronic Memory. ACM Trans. Archit. Code Optim. 16(4): 41:1-41:26 (2020) - Manuel Selva, Fabian Gruber, Diogo Sampaio, Christophe Guillon, Louis-Noël Pouchet, Fabrice Rastello:
Building a Polyhedral Representation from an Instrumented Execution: Making Dynamic Analyses of Nonaffine Programs Scalable. ACM Trans. Archit. Code Optim. 16(4): 45:1-45:26 (2020) - Sergi Siso, Wes Armour, Jeyarajan Thiyagalingam:
Evaluating Auto-Vectorizing Compilers through Objective Withdrawal of Useful Information. ACM Trans. Archit. Code Optim. 16(4): 40:1-40:23 (2020) - Sriseshan Srikanth, Anirudh Jain, Joseph M. Lennon, Thomas M. Conte, Erik DeBenedictis, Jeanine E. Cook:
MetaStrider: Architectures for Scalable Memory-centric Reduction of Sparse Data Streams. ACM Trans. Archit. Code Optim. 16(4): 35:1-35:26 (2020) - Larisa Stoltzfus, Bastian Hagedorn, Michel Steuwer, Sergei Gorlatch, Christophe Dubach:
Tiling Optimizations for Stencil Computations Using Rewrite Rules in Lift. ACM Trans. Archit. Code Optim. 16(4): 52:1-52:25 (2020) - Arun Thangamani, V. Krishna Nandivada:
Optimizing Remote Communication in X10. ACM Trans. Archit. Code Optim. 16(4): 34:1-34:26 (2020) - Nicolas Vasilache, Oleksandr Zinenko, Theodoros Theodoridis, Priya Goyal, Zachary DeVito, William S. Moses, Sven Verdoolaege, Andrew Adams, Albert Cohen:
The Next 700 Accelerated Layers: From Mathematical Expressions of Network Computation Graphs to Accelerated GPU Kernels, Automatically. ACM Trans. Archit. Code Optim. 16(4): 38:1-38:26 (2020) - Michiel A. van der Vlag, Georgios Smaragdos, Zaid Al-Ars, Christos Strydis:
Exploring Complex Brain-Simulation Workloads on Multi-GPU Deployments. ACM Trans. Archit. Code Optim. 16(4): 53:1-53:25 (2020) - Chunwei Xia, Jiacheng Zhao, Huimin Cui, Xiaobing Feng, Jingling Xue:
DNNTune: Automatic Benchmarking DNN Models for Mobile-cloud Computing. ACM Trans. Archit. Code Optim. 16(4): 49:1-49:26 (2020) - Ahmad Yasin, Jawad Haj-Yahya, Yosi Ben-Asher, Avi Mendelson:
A Metric-Guided Method for Discovering Impactful Features and Architectural Insights for Skylake-Based Processors. ACM Trans. Archit. Code Optim. 16(4): 46:1-46:25 (2020) - 2019
- Mohammad A. Alshboul, Hussein Elnawawy, Reem Elkhouly, Keiji Kimura, James Tuck, Yan Solihin:
Efficient Checkpointing with Recompute Scheme for Non-volatile Main Memory. ACM Trans. Archit. Code Optim. 16(2): 18:1-18:27 (2019) - Leonid Azriel, Lukas Humbel, Reto Achermann, Alex Richardson, Moritz Hoffmann, Avi Mendelson, Timothy Roscoe, Robert N. M. Watson, Paolo Faraboschi, Dejan S. Milojicic:
Memory-Side Protection With a Capability Enforcement Co-Processor. ACM Trans. Archit. Code Optim. 16(1): 5:1-5:26 (2019) - Prerna Budhkar, Ildar Absalyamov, Vasileios Zois, Skyler Windh, Walid A. Najjar, Vassilis J. Tsotras:
Accelerating In-Memory Database Selections Using Latency Masking Hardware Threads. ACM Trans. Archit. Code Optim. 16(2): 13:1-13:28 (2019) - Sanghoon Cha, Bokyeong Kim, Chang Hyun Park, Jaehyuk Huh:
Morphable DRAM Cache Design for Hybrid Memory Systems. ACM Trans. Archit. Code Optim. 16(3): 31:1-31:24 (2019) - Artem Chikin, Taylor Lloyd, José Nelson Amaral, Ettore Tiotto, Muhammad Usman:
Memory-access-aware Safety and Profitability Analysis for Transformation of Accelerator-bound OpenMP Loops. ACM Trans. Archit. Code Optim. 16(3): 30:1-30:26 (2019) - Keryan Didier, Dumitru Potop-Butucaru, Guillaume Iooss, Albert Cohen, Jean Souyris, Philippe Baufreton, Amaury Graillat:
Correct-by-Construction Parallelization of Hard Real-Time Avionics Applications on Off-the-Shelf Predictable Hardware. ACM Trans. Archit. Code Optim. 16(3): 24:1-24:27 (2019) - Halit Dogan, Masab Ahmad, Brian Kahne, Omer Khan:
Accelerating Synchronization Using Moving Compute to Data Model at 1, 000-core Multicore Scale. ACM Trans. Archit. Code Optim. 16(1): 4:1-4:27 (2019)
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