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Publication search results
found 74 matches
- 2016
- Vishwani D. Agrawal:
Editorial. J. Electron. Test. 32(1): 1-2 (2016) - Vishwani D. Agrawal:
Editorial. J. Electron. Test. 32(2): 107-108 (2016) - Vishwani D. Agrawal:
Editorial. J. Electron. Test. 32(3): 241-242 (2016) - Vishwani D. Agrawal:
Editorial. J. Electron. Test. 32(4): 399 (2016) - Vishwani D. Agrawal:
Editorial. J. Electron. Test. 32(5): 505-506 (2016) - Vishwani D. Agrawal:
Editorial. J. Electron. Test. 32(6): 653-654 (2016) - Igor Aleksejev, Sergei Devadze, Artur Jutman, Konstantin Shibin:
Optimization of Boundary Scan Tests Using FPGA-Based Efficient Scan Architectures. J. Electron. Test. 32(3): 245-255 (2016) - Florence Azaïs, Stephane David-Grignot, Laurent Latorre, Francois Lefevre:
SSB Phase Noise Evaluation of Analog/IF Signals on Standard Digital ATE. J. Electron. Test. 32(1): 69-82 (2016) - Imran Bashir, Robert Bogdan Staszewski, Oren E. Eliezer, Poras T. Balsara:
A Wideband Digital-to-Frequency Converter with Built-In Mechanism for Self-Interference Mitigation. J. Electron. Test. 32(4): 437-445 (2016) - Fathollah Bistouni, Mohsen Jahanshahi:
Reliability Analysis of Fault-Tolerant Bus-Based Interconnection Networks. J. Electron. Test. 32(5): 541-568 (2016) - Yavuz Can, Hassen Kassim, Georg Fischer:
New Boolean Equation for Orthogonalizing of Disjunctive Normal Form based on the Method of Orthogonalizing Difference-Building. J. Electron. Test. 32(2): 197-208 (2016) - Qingyu Chen, Li Chen, Haibin Wang, Longsheng Wu, Yuanqing Li, Xing Zhao, Mo Chen:
Instruction-Vulnerability-Factor-Based Reliability Analysis Model for Program Memory. J. Electron. Test. 32(6): 695-703 (2016) - Qingyu Chen, Haibin Wang, Li Chen, Lixiang Li, Xing Zhao, Rui Liu, Mo Chen, Xuantian Li:
An SEU-Resilient SRAM Bitcell in 65-nm CMOS Technology. J. Electron. Test. 32(3): 385-391 (2016) - Thiago Copetti, Guilherme Cardoso Medeiros, Leticia Bolzani Poehls, Fabian Vargas:
NBTI-Aware Design of Integrated Circuits: A Hardware-Based Approach for Increasing Circuits' Life Time. J. Electron. Test. 32(3): 315-328 (2016) - Karine Coulié-Castellani, Wenceslas Rahajandraibe, Gilles Micolau, Hassen Aziza, Jean-Michel Portal:
Optimization of a Particles Detection Chain Based on a VCO Structure. J. Electron. Test. 32(1): 21-30 (2016) - Yiqian Cui, Junyou Shi, Zili Wang:
Analog Circuit Test Point Selection Incorporating Discretization-Based Fuzzification and Extended Fault Dictionary to Handle Component Tolerances. J. Electron. Test. 32(6): 661-679 (2016) - Jaya Dofe, Hoda Pahlevanzadeh, Qiaoyan Yu:
A Comprehensive FPGA-Based Assessment on Fault-Resistant AES against Correlation Power Analysis Attack. J. Electron. Test. 32(5): 611-624 (2016) - Davide Ferraretto, Graziano Pravadelli:
Simulation-based Fault Injection with QEMU for Speeding-up Dependability Analysis of Embedded Software. J. Electron. Test. 32(1): 43-57 (2016) - Sezer Gören, Cemil Cem Gürsoy, Abdullah Yildiz:
Erratum to: Speeding Up Logic Locking via Fault Emulation and Dynamic Multiple Fault Injection. J. Electron. Test. 32(1): 105-106 (2016) - Mohamed Hanafy, Hazem Said, Ayman M. Wahba:
New Methodology for Complete Properties Extraction from Simulation Traces Guided with Static Analysis. J. Electron. Test. 32(6): 705-719 (2016) - Bing Hou, Tong Liu, Jun Liu, Junli Chen, Fa-Xin Yu, Wenbo Wang:
A Novel Compact Model for On-Chip Vertically-Coiled Spiral Inductors. J. Electron. Test. 32(5): 649-652 (2016) - Cong Hu, Zhi Li, Chuan-pei Xu, Mengyi Jia:
Test Scheduling for Network-on-Chip Using XY-Direction Connected Subgraph Partition and Multiple Test Clocks. J. Electron. Test. 32(1): 31-42 (2016) - Zewen Hu, Mingqing Xiao, Lei Zhang, Shuai Liu, Yawei Ge:
Mahalanobis Distance Based Approach for Anomaly Detection of Analog Filters Using Frequency Features and Parzen Window Density Estimation. J. Electron. Test. 32(6): 681-693 (2016) - Masahiro Ishida, Toru Nakura, Takashi Kusaka, Satoshi Komatsu, Kunihiro Asada:
Dynamic Power Integrity Control of ATE for Eliminating Overkills and Underkills in Device Testing. J. Electron. Test. 32(3): 257-271 (2016) - Maksim Jenihhin, Giovanni Squillero, Thiago Santos Copetti, Valentin Tihhomirov, Sergei Kostin, Marco Gaudesi, Fabian Vargas, Jaan Raik, Matteo Sonza Reorda, Leticia Bolzani Poehls, Raimund Ubar, Guilherme Cardoso Medeiros:
Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits. J. Electron. Test. 32(3): 273-289 (2016) - R. Jothin, C. Vasanthanayaki:
High Performance Significance Approximation Error Tolerance Adder for Image Processing Applications. J. Electron. Test. 32(3): 377-383 (2016) - Kapil Juneja, Darayus Adil Patel, Rajesh Kumar Immadi, Balwant Singh, Sylvie Naudet, Pankaj Agarwal, Arnaud Virazel, Patrick Girard:
An Effective Power-Aware At-Speed Test Methodology for IP Qualification and Characterization. J. Electron. Test. 32(6): 721-733 (2016) - T. Nandha Kumar, Haider A. F. Almurib, Fabrizio Lombardi:
Current-Based Testing, Modeling and Monitoring for Operational Deterioration of a Memristor-Based LUT. J. Electron. Test. 32(5): 587-599 (2016) - Gildas Léger, Carsten Wegener:
Guest Editorial: Analog, Mixed-Signal and RF Testing. J. Electron. Test. 32(4): 405-406 (2016) - Friedrich Peter Leisenberger, Gregor Schatzberger:
An Efficient Contact Screening Method and its Application to High-Reliability Non-Volatile Memories. J. Electron. Test. 32(4): 447-458 (2016)
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