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Publication search results
found 43 matches
- 2006
- Banit Agrawal, Timothy Sherwood:
Virtually Pipelined Network Memory. MICRO 2006: 197-207 - Bradford M. Beckmann, Michael R. Marty, David A. Wood:
ASR: Adaptive Selective Replication for CMP Caches. MICRO 2006: 443-454 - Bryan Black, Murali Annavaram, Ned Brekelbaum, John DeVale, Lei Jiang, Gabriel H. Loh, Don McCaule, Patrick Morrow, Donald W. Nelson, Daniel Pantuso, Paul Reed, Jeff Rupley, Sadasivan Shankar, John Paul Shen, Clair Webb:
Die Stacking (3D) Microarchitecture. MICRO 2006: 469-479 - Anne Bracy, Amir Roth:
Serialization-Aware Mini-Graphs: Performance with Fewer Resources. MICRO 2006: 171-184 - Fernando Castro, Luis Piñuel, Daniel Chaver, Manuel Prieto, Michael C. Huang, Francisco Tirado:
DMDC: Delayed Memory Dependence Checking through Age-Based Filtering. MICRO 2006: 297-308 - Sangyeun Cho, Lei Jin:
Managing Distributed, Shared L2 Caches through OS-Level Page Allocation. MICRO 2006: 455-468 - Noel Eisley, Li-Shiuan Peh, Li Shang:
In-Network Cache Coherence. MICRO 2006: 321-332 - Ron Gabor, Shlomo Weiss, Avi Mendelson:
Fairness and Throughput in Switch on Event Multithreading. MICRO 2006: 149-160 - Mark Heffernan, Kent D. Wilken, Ghassan Shobaki:
Data-Dependency Graph Transformations for Superblock Scheduling. MICRO 2006: 77-88 - Ibrahim Hur, Calvin Lin:
Memory Prefetching Using Adaptive Stream Detection. MICRO 2006: 397-408 - Canturk Isci, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose, Margaret Martonosi:
An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget. MICRO 2006: 347-358 - Canturk Isci, Gilberto Contreras, Margaret Martonosi:
Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management. MICRO 2006: 359-370 - P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthaveetil:
A Predictive Performance Model for Superscalar Processors. MICRO 2006: 161-170 - Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt:
Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths. MICRO 2006: 53-64 - Nevin Kirman, Meyrem Kirman, Rajeev K. Dokania, José F. Martínez, Alyssa B. Apsel, Matthew A. Watkins, David H. Albonesi:
Leveraging Optical Technology in Future Bus-based Chip Multiprocessors. MICRO 2006: 492-503 - Xiaoyao Liang, David M. Brooks:
Mitigating the Impact of Process Variations on Processor Register Files and Execution Units. MICRO 2006: 504-514 - Shan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou, Josep Torrellas:
PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection. MICRO 2006: 38-52 - Bertrand A. Maher, Aaron Smith, Doug Burger, Kathryn S. McKinley:
Merging Head and Tail Duplication for Convergent Hyperblock Formation. MICRO 2006: 65-76 - Michael R. Marty, Mark D. Hill:
Coherence Ordering for Ring-based Chip Multiprocessors. MICRO 2006: 309-320 - Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee:
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design. MICRO 2006: 3-14 - Kyle J. Nesbit, Nidhi Aggarwal, James Laudon, James E. Smith:
Fair Queuing Memory Systems. MICRO 2006: 208-222 - Chrysostomos Nicopoulos, Dongkook Park, Jongman Kim, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das:
ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers. MICRO 2006: 333-346 - Serkan Ozdemir, Debjit Sinha, Gokhan Memik, Jonathan Adams, Hai Zhou:
Yield-Aware Cache Architectures. MICRO 2006: 15-25 - Pierre Palatin, Yves Lhuillier, Olivier Temam:
CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs. MICRO 2006: 247-258 - Feng Qin, Cheng Wang, Zhenmin Li, Ho-Seop Kim, Yuanyuan Zhou, Youfeng Wu:
LIFT: A Low-Overhead Practical Information Flow Tracking System for Detecting Security Attacks. MICRO 2006: 135-148 - Moinuddin K. Qureshi, Yale N. Patt:
Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches. MICRO 2006: 423-432 - Ram Rangan, Neil Vachharajani, Adam Stoler, Guilherme Ottoni, David I. August, George Z. N. Cai:
Support for High-Frequency Streaming in CMPs. MICRO 2006: 259-272 - Bratin Saha, Ali-Reza Adl-Tabatabai, Quinn Jacobson:
Architectural Support for Software Transactional Memory. MICRO 2006: 185-196 - Jack Sampson, Rubén González, Jean-Francois Collard, Norman P. Jouppi, Michael S. Schlansker, Brad Calder:
Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers. MICRO 2006: 235-246 - Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger:
Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. MICRO 2006: 480-491
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