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Publication search results
found 33 matches
- 2007
- Mayank Agarwal, Kshitiz Malik, Kevin M. Woley, Sam S. Stone, Matthew I. Frank:
Exploiting Postdominance for Speculative Parallelization. HPCA 2007: 295-305 - Alaa R. Alameldeen, David A. Wood:
Interactions Between Compression and Prefetching in Chip Multiprocessors. HPCA 2007: 228-239 - Murali Annavaram, Ed Grochowski, Paul Reed:
Implications of Device Timing Variability on Full Chip Timing. HPCA 2007: 37-45 - Luis Ceze, Pablo Montesinos, Christoph von Praun, Josep Torrellas:
Colorama: Architectural Support for Data-Centric Synchronization. HPCA 2007: 133-144 - Hassan Chafi, Jared Casper, Brian D. Carlstrom, Austen McDonald, Chi Cao Minh, Woongki Baek, Christos Kozyrakis, Kunle Olukotun:
A Scalable, Non-blocking Approach to Transactional Memory. HPCA 2007: 97-108 - Liqun Cheng, John B. Carter, Donglai Dai:
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing. HPCA 2007: 328-339 - Jeonghwan Choi, Youngjae Kim, Anand Sivasubramaniam, Jelena Srebric, Qian Wang, Joonwon Lee:
Modeling and Managing Thermal Profiles of Rack-mounted Servers with ThermoStat. HPCA 2007: 205-215 - Nathan Clark, Amir Hormati, Sami Yehia, Scott A. Mahlke, Krisztián Flautner:
Liquid SIMD: Abstracting SIMD Hardware using Lightweight Dynamic Mapping. HPCA 2007: 216-227 - William J. Dally:
Interconnect-Centric Computing. HPCA 2007: 1 - Haakon Dybdahl, Per Stenström:
An Adaptive Shared/Private NUCA Cache Partitioning Scheme for Chip Multiprocessors. HPCA 2007: 2-12 - Stijn Eyerman, Lieven Eeckhout:
A Memory-Level Parallelism Aware Fetch Policy for SMT Processors. HPCA 2007: 240-249 - Brinda Ganesh, Aamer Jaleel, David Wang, Bruce L. Jacob:
Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling. HPCA 2007: 109-120 - Yuho Jin, Eun Jung Kim, Ki Hwan Yum:
A Domain-Specific On-Chip Network Design for Large Scale Cache Systems. HPCA 2007: 318-327 - Yasunao Katayama, Atsuya Okazaki:
Optical Interconnect Opportunities for Future Server Memory Systems. HPCA 2007: 46-50 - Benjamin C. Lee, David M. Brooks:
Illustrative Design Space Studies with Microarchitectural Regression Models. HPCA 2007: 340-351 - Xuanhua Li, Donald Yeung:
Application-Level Correctness and its Impact on Fault Tolerance. HPCA 2007: 181-192 - Albert Meixner, Daniel J. Sorin:
Error Detection via Online Checking of Cache Coherence with Token Coherence Signatures. HPCA 2007: 145-156 - Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José Duato:
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures. HPCA 2007: 157-168 - Steve Pawlowski:
Petascale Computing Research Challenges - A Manycore Perspective. HPCA 2007: 96 - Kiran Puttaswamy, Gabriel H. Loh:
Thermal Herding: Microarchitecture Techniques for Controlling Hotspots in High-Performance 3D-Integrated Processors. HPCA 2007: 193-204 - Eduardo Quiñones, Joan-Manuel Parcerisa, Antonio González:
Improving Branch Prediction and Predicated Execution in Out-of-Order Processors. HPCA 2007: 75-84 - Moinuddin K. Qureshi, M. Aater Suleman, Yale N. Patt:
Line Distillation: Increasing Cache Capacity by Filtering Unused Words in Cache Lines. HPCA 2007: 250-259 - Paul Racunas, Kypros Constantinides, Srilatha Manne, Shubhendu S. Mukherjee:
Perturbation-based Fault Screening. HPCA 2007: 169-180 - Colby Ranger, Ramanan Raghuraman, Arun Penmetsa, Gary R. Bradski, Christos Kozyrakis:
Evaluating MapReduce for Multi-core and Multiprocessor Systems. HPCA 2007: 13-24 - Jeffrey Shafer, David Carr, Aravind Menon, Scott Rixner, Alan L. Cox, Willy Zwaenepoel, Paul Willmann:
Concurrent Direct Network Access for Virtual Machine Monitors. HPCA 2007: 306-317 - Jun Shao, Brian T. Davis:
A Burst Scheduling Access Reordering Mechanism. HPCA 2007: 285-294 - Santhosh Srinath, Onur Mutlu, Hyesoon Kim, Yale N. Patt:
Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers. HPCA 2007: 63-74 - Guru Venkataramani, Brandyn Roemer, Yan Solihin, Milos Prvulovic:
MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging. HPCA 2007: 273-284 - Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E. Moore, Haris Volos, Mark D. Hill, Michael M. Swift, David A. Wood:
LogTM-SE: Decoupling Hardware Transactional Memory from Caches. HPCA 2007: 261-272 - Weifeng Zhang, Dean M. Tullsen, Brad Calder:
Accelerating and Adapting Precomputation Threads for Effcient Prefetching. HPCA 2007: 85-95
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retrieved on 2024-04-25 17:12 CEST from data curated by the dblp team
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