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Publication search results
found 24 matches
- 2011
- Bijan Alizadeh, Masahiro Fujita:
Modular equivalence verification of polynomial datapaths with multiple word-length operands. HLDVT 2011: 9-16 - Somnath Banerjee, Tushar Gupta, Saurabh Jain:
A scalable hybrid verification system based on HDL slicing. HLDVT 2011: 41-48 - Hansu Cho, Samar Abdi:
Automatic generation of transducer models for multicore system design. HLDVT 2011: 72-79 - Hans Eveking, Tobias Dornes, Martin Schweikert:
Using SystemVerilog assertions to relate non-cycle-accurate to cycle-accurate designs. HLDVT 2011: 17-24 - Mike Gemünde, Jens Brandt, Klaus Schneider:
Causality analysis of synchronous programs with refined clocks. HLDVT 2011: 25-32 - Amir Masoud Gharehbaghi, Masahiro Fujita:
Formal verification guided automatic design error diagnosis and correction of complex processors. HLDVT 2011: 121-127 - Luigi Di Guglielmo, Franco Fummi, Graziano Pravadelli:
Interactive presentation abstract: Reusing of properties after discretization of hybrid automata. HLDVT 2011: 81 - Luigi Di Guglielmo, Franco Fummi, Graziano Pravadelli, Francesco Stefanni, Sara Vinco:
UNIVERCM: The UNIversal VERsatile computational model for heterogeneous embedded system design. HLDVT 2011: 33-40 - Giuseppe Di Guglielmo, Luigi Di Guglielmo, Franco Fummi, Graziano Pravadelli:
Interactive presentation abstract: Assertion-based verification in embedded-software design. HLDVT 2011: 80 - Matin Hashemi, Soheil Ghiasi:
Towards scalable utilization of embedded manycores in throughput-sensitive applications. HLDVT 2011: 110-115 - Wei Hu, Huy Nguyen, Michael S. Hsiao:
Sufficiency-based filtering of invariants for Sequential Equivalence Checking. HLDVT 2011: 1-8 - Charalambos Ioannides, Geoff Barrett, Kerstin Eder:
Introducing XCS to Coverage Directed test Generation. HLDVT 2011: 57-64 - Mehdi Karimibiuki, Kyle Balston, Alan J. Hu, André Ivanov:
Post-silicon code coverage evaluation with reduced area overhead for functional verification of SoC. HLDVT 2011: 92-97 - Anton Karputkin, Raimund Ubar, Mati Tombak, Jaan Raik:
Interactive presentation abstract: Automated correction of design errors by edge redirection on high-level decision diagrams. HLDVT 2011: 83 - Min Li, Kelson Gent, Michael S. Hsiao:
Utilizing GPGPUs for design validation with a modified Ant Colony Optimization. HLDVT 2011: 128-135 - Peter Lisherness, Kwang-Ting (Tim) Cheng:
Coverage discounting: A generalized approach for testbench qualification. HLDVT 2011: 49-56 - Jinpeng Lv, Priyank Kalla, Florian Enescu:
Verification of composite Galois field multipliers over GF ((2m)n) using computer algebra techniques. HLDVT 2011: 136-143 - Andrea Pellegrini, Valeria Bertacco:
Cardio: Adaptive CMPs for reliability through dynamic introspective operation. HLDVT 2011: 98-105 - Alexander W. Rath, Volkan Esen, Wolfgang Ecker:
Analog transaction level modeling. HLDVT 2011: 82 - Frederic Risacher, Kenneth J. Schultz:
Software agnostic approaches to explore pre-silicon system performance. HLDVT 2011: 116-120 - Gunar Schirner:
Modeling, synthesis, and validation of heterogeneous biomedical embedded systems. HLDVT 2011: 106-109 - Tao Xie, Wolfgang Müller, Florian Letombe:
IP-XACT based system level mutation testing. HLDVT 2011: 65-71 - Charlie Shucheng Zhu, Georg Weissenbacher, Divjyot Sethi, Sharad Malik:
SAT-based techniques for determining backbones for post-silicon fault localisation. HLDVT 2011: 84-91 - Zeljko Zilic, Sandeep K. Shukla:
2011 IEEE International High Level Design Validation and Test Workshop, HLDVT 2011, Napa Valley, CA, USA, November 9-11, 2011. IEEE Computer Society 2011, ISBN 978-1-4577-1744-4 [contents]
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