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Publication search results
found 51 matches
- 1996
- Alessandro Balboni, Loris Valenti:
ASIC Design and FPGA Design: A Unified Design Methodology Applied to Different Technologies. FPL 1996: 356-360 - Michael Braun, Jörg Friedrich, Thomas Grün, Josef Lembert:
Parallel CRC Computation in FPGAs. FPL 1996: 156-165 - Gordon J. Brebner:
A Virtual Hardware Operating System for the Xilinx XC6200. FPL 1996: 327-336 - Steve Casselman:
Reconfigurable Logic Based Fibre Channel Network Card With Sub 2 Micro-Second Raw Latency. FPL 1996: 252-259 - B. L. Combridge, P. S. Cornfield, S. Naunton:
Reconfigurable DSP Demonstrators for the Development of Spacecraft Payload Processors. FPL 1996: 242-251 - Chris Dick:
Computing 2-D DFTs Using FPGAs. FPL 1996: 96-105 - Chris Dick, Fred Harris:
FIR Filtering with FPGAs Using Quadrature Sigma-Delta Modulation Encoding. FPL 1996: 361-365 - Albrecht Ditzinger, Ralph Remme:
Key Issues for User Acceptance of FPGA Design Tools. FPL 1996: 237-241 - Carl Ebeling, Darren C. Cronquist, Paul Franklin:
RaPiD - Reconfigurable Pipelined Datapath. FPL 1996: 126-135 - Holger Eggers, Patrick Lysaght, Hugh Dick, Gordon Charles McGregor:
Fast Reconfigurable Crossbar Switching in FPGAs. FPL 1996: 297-306 - Stephan W. Gehring, Stefan H.-M. Ludwig:
The Trianus System and Its Application to Custom Computing. FPL 1996: 176-184 - Michael Gschwind, Christian Mautner:
Migration from Schematic-Based Designs to a VHDL Synthesis Environment. FPL 1996: 346-355 - John R. Haddy, David J. Skellern:
An Asynchronous Transfer Mode (ATM) Stream Demultiplexer and Switch. FPL 1996: 260-269 - Reiner W. Hartenstein, Jürgen Becker, Rainer Kress:
Custom Computing Machines vs. Hardware/Software Codesign: From a globalized point of view. FPL 1996: 65-76 - Jean-Paul Heron, Roger F. Woods:
Architectural Strategies for Implementing an Image Processing Algorithm on XC6000 FPGA. FPL 1996: 317-326 - Alfred Hesener:
Implementing Reconfigurable Datapaths in FPGAs for Adaptive Filter Design. FPL 1996: 220-229 - Keisuke Inoue, Toru Kisuki, Michitaka Okuno, Etsuko Shimizu, Takuya Terasawa, Hideharu Amano:
ATTEMPT-1: A Reconfigurable Multiprocessor Testbed. FPL 1996: 200-209 - Nikolaj Janzen, Franz J. Rammig:
A Slow Motion Engine for the Analysis of FPGA-Based Prototypes. FPL 1996: 210-219 - Tom Kean, Bernie New, Robert Slous:
A Fast Constant Coefficient Multiplier for the XC6200. FPL 1996: 230-236 - L. Larsson:
An EPLD Based Transient Recorder for Simulation of Video Signal Processing Devices in an VHDL Environment Close to System Level Conditions. FPL 1996: 371-375 - Christian Legl, Klaus Eckl, Bernd Wurth:
Performance-Directed Technology-Mapping for LUT-Based FPGAs - What Role Do Decomposition and Covering Play? FPL 1996: 14-23 - Nigel Lester, Jonathan Saul:
Logic Synthesis for FPGAs Using A Mixed Exclusive-/Inclusive-OR Form. FPL 1996: 185-192 - Stefan H.-M. Ludwig:
The Design of a Coprocessor Board Using Xilinx's XC6200 FPGA - An Experience Report. FPL 1996: 77-86 - Wayne Luk, Shaori Guo, Nabeel Shirazi, N. Zhuang:
A Framework for Developing Parameterised FPGA Libraries. FPL 1996: 24-33 - Uwe Meyer-Bäse:
Coherent Demodulation with FPGAs. FPL 1996: 166-175 - Uwe Meyer-Bäse:
Convolutional Error Decoding with FPGAs. FPL 1996: 376-380 - Toshiaki Miyazaki, Akihiro Tsutsui, Kenji Ishii, Naohisa Ohta:
FACT: Co-evaluation Environment for FPGA Architecture and CAD System. FPL 1996: 34-43 - Ulrike Ober, Hans-Jürgen Herpel, Manfred Glesner:
CAPpartx: Computer Aided Prototyping Partitioning for Xilinx FPGAs, a Hierarchical Partitioning Tool for Rapid Prototyping. FPL 1996: 106-115 - Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon:
Concurrent Design of Hardware/Software Dedicated Systems. FPL 1996: 410-414 - Branka Medved Rogina, Karolj Skala, Bozidar Vojnovic:
Metastability Characteristics Testing for Programmable Logic Design. FPL 1996: 381-388
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