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Publication search results
found 19 matches
- 2015
- Ahmed Al-Wattar, Shawki Areibi, Gary William Grewal:
Efficient Mapping and Allocation of Execution Units to Task Graphs using an Evolutionary Framework. SIGARCH Comput. Archit. News 43(4): 46-51 (2015) - David de la Chevallerie, Jens Korinth, Andreas Koch:
ffLink: A Lightweight High-Performance Open-Source PCI Express Gen3 Interface for Reconfigurable Accelerators. SIGARCH Comput. Archit. News 43(4): 34-39 (2015) - Andrew A. Chien, Tung Thanh Hoang, Dilip P. Vasudevan, Yuanwei Fang, Amirali Shambayati:
10x10: A Case Study in Highly-Programmable and Energy-Efficient Heterogeneous Federated Architecture. SIGARCH Comput. Archit. News 43(2): 2-9 (2015) - Liucheng Guo, Andreea-Ingrid Funie, David B. Thomas, Haohuan Fu, Wayne Luk:
Parallel Genetic Algorithms on Multiple FPGAs. SIGARCH Comput. Archit. News 43(4): 86-93 (2015) - Ami Hayashi, Yuta Tokusashi, Hiroki Matsutani:
A Line Rate Outlier Filtering FPGA NIC using 10GbE Interface. SIGARCH Comput. Archit. News 43(4): 22-27 (2015) - Soukaina N. Hmid, José Gabriel F. Coutinho, Wayne Luk:
A Transfer-Aware Runtime System for Heterogeneous Asynchronous Parallel Execution. SIGARCH Comput. Archit. News 43(4): 40-45 (2015) - Abhishek Kumar Jain, Xiangwei Li
, Suhaib A. Fahmy, Douglas L. Maskell:
Adapting the DySER Architecture with DSP Blocks as an Overlay for the Xilinx Zynq. SIGARCH Comput. Archit. News 43(4): 28-33 (2015) - Ahmad Lashgar
, Ebad Salehi, Amirali Baniasadi:
A Case Study in Reverse Engineering GPGPUs: Outstanding Memory Handling Resources. SIGARCH Comput. Archit. News 43(4): 15-21 (2015) - Michael Mefenza, Nicolas Edwards, Christophe Bobda:
Interface Based Memory Synthesis of Image Processing Applications in FPGA. SIGARCH Comput. Archit. News 43(4): 64-69 (2015) - Takuji Mitsuishi, Jun Suzuki, Yuki Hayashi, Masaki Kan, Hideharu Amano:
Breadth First Search on Cost-efficient Multi-GPU Systems. SIGARCH Comput. Archit. News 43(4): 58-63 (2015) - Amir Momeni, Hamed Tabkhi, Yash Ukidave, Gunar Schirner, David R. Kaeli:
Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA. SIGARCH Comput. Archit. News 43(4): 52-57 (2015) - Koji Okina, Rie Soejima, Kota Fukumoto, Yuichiro Shibata, Kiyoshi Oguri:
Power Performance Profiling of 3-D Stencil Computation on an FPGA Accelerator for Efficient Pipeline Optimization. SIGARCH Comput. Archit. News 43(4): 9-14 (2015) - Kentaro Sano, Fumiya Kono, Naohito Nakasato, Alexander Vazhenin, Stanislav Sedukhin:
Stream Computation of Shallow Water Equation Solver for FPGA-based 1D Tsunami Simulation. SIGARCH Comput. Archit. News 43(4): 82-87 (2015) - Mark Thorson:
Internet Nuggets. SIGARCH Comput. Archit. News 43(2): 10-16 (2015) - Mark Thorson:
Internet Nuggets. SIGARCH Comput. Archit. News 43(4): 94-100 (2015) - Mark Thorson:
Internet Nuggets. SIGARCH Comput. Archit. News 43(5): 7-11 (2015) - Da Tong, Viktor K. Prasanna:
High Throughput Sketch Based Online Heavy Hitter Detection on FPGA. SIGARCH Comput. Archit. News 43(4): 70-75 (2015) - Chiharu Tsuruta, Yohei Miki
, Takuya Kuhara, Hideharu Amano, Masayuki Umemura:
Off-Loading LET Generation to PEACH2: A Switching Hub for High Performance GPU Clusters. SIGARCH Comput. Archit. News 43(4): 3-8 (2015) - Xinying Wang, Phillip H. Jones, Joseph Zambreno:
A Configurable Architecture for Sparse LU Decomposition on Matrices with Arbitrary Patterns. SIGARCH Comput. Archit. News 43(4): 76-81 (2015)
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