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Publication search results
found 35 matches
- 1990
- Dan Teodosiu:
Computing in three dimensions. SIGARCH Comput. Archit. News 18(1): 99 (1990) - Noel W. Anderson:
Amorphous computer system architecture: a preliminary look. SIGARCH Comput. Archit. News 18(1): 51 (1990) - Robert P. Colwell:
Book review: High-Level Language Computer Architecture edited by Veljko Milutinovic (Computer Science Press, 1989). SIGARCH Comput. Archit. News 18(1): 120-122 (1990) - Robert Cousins:
A novel approach to character interfaces. SIGARCH Comput. Archit. News 18(1): 35 (1990) - Robert Cousins:
A reentrant peripheral interface. SIGARCH Comput. Archit. News 18(1): 43 (1990) - Yannick Deville:
A low-cost usage-based replacement algorithm for cache memories. SIGARCH Comput. Archit. News 18(4): 52-58 (1990) - Marc Dikotter:
Book review: The Definition of Standard ML by R. Milner, M. Torte, R. Harper. SIGARCH Comput. Archit. News 18(4): 91 (1990) - Jack J. Dongarra:
Performance of various computers using standard linear equations software. SIGARCH Comput. Archit. News 18(1): 17 (1990) - V. Dvorak:
Microseqencer architecture supporting arbitrary branching up to 2m targets. SIGARCH Comput. Archit. News 18(1): 9 (1990) - Gary Frazier:
Ariel: a scalable multiprocessor for the simulation of neural networks. SIGARCH Comput. Archit. News 18(1): 107 (1990) - Carlos Fritsch, Teresa Sánchez, José Javier Anaya:
Primitive based architectures. SIGARCH Comput. Archit. News 18(1): 73 (1990) - Ran Ginosar, Nick Michell:
On the potential of asynchronous pipelined processors. SIGARCH Comput. Archit. News 18(4): 27-34 (1990) - Andy Glew, Wen-Mei Hwu:
Snoopy cache test-and-test-and-set without execessive bus contention. SIGARCH Comput. Archit. News 18(2): 25-32 (1990) - Alessandro De Gloria:
VISA: A variable instruction set architecture. SIGARCH Comput. Archit. News 18(2): 76-84 (1990) - Bernard K. Gunther:
A high speed mechanism for short branches. SIGARCH Comput. Archit. News 18(4): 59-61 (1990) - Lee Higbee:
Quick and easy cache performance analysis. SIGARCH Comput. Archit. News 18(2): 33-44 (1990) - Mark D. Hill:
What is scalability? SIGARCH Comput. Archit. News 18(4): 18-21 (1990) - Tsong-Chih Hsu, Ling-Yang Kung:
A comment on "a fetch - and - op implementation for parallel computers". SIGARCH Comput. Archit. News 18(1): 32 (1990) - Werner B. Joerg:
A subclass of Petri Nets as design abstraction for parallel architectures. SIGARCH Comput. Archit. News 18(4): 67-77 (1990) - Glen G. Langdon Jr.:
Book review: Highly Parallel Computing by George Almasi and Allan Gotlieb (Benjamin/Cummings, 1989). SIGARCH Comput. Archit. News 18(4): 90 (1990) - Glen G. Langdon Jr.:
Book review: Solving Problems on Concurrent Processors, Vol II: Software for Concurrent Processors by I. Angus, G. Fox, J. Kim, and D. Walker (Prentice-Hall, 1990). SIGARCH Comput. Archit. News 18(4): 90-91 (1990) - Phillip A. Laplante:
A novel single instruction computer architecture. SIGARCH Comput. Archit. News 18(4): 22-26 (1990) - Harold Lorin:
A model for recentralization of computing: (distributed processing comes home). SIGARCH Comput. Archit. News 18(1): 81 (1990) - Wolfgang Matthes:
Hardware Resources: a generalizing view on computer architectures. SIGARCH Comput. Archit. News 18(2): 7-14 (1990) - Robert McLaughlin:
Design for fast DSP machine. SIGARCH Comput. Archit. News 18(4): 62-66 (1990) - Yen-Jen Oyang, Bor-Ting Chang, Shu-May Lin:
A cost-effective approach to implement a long instruction word microprrocessor. SIGARCH Comput. Archit. News 18(1): 59 (1990) - Yen-Jen Oyang, Chun-Hung Wen, Yu-Fen Chen, Shu-May Lin:
The effect of employing advanced branching mechanisms in superscalar processors. SIGARCH Comput. Archit. News 18(4): 35-52 (1990) - Behrooz Parhami:
Book review: Advanced Research in VLSI, edited by Charles L. Seitz (The MIT Press, Cambridge, MA, 1989, 373 pp.). SIGARCH Comput. Archit. News 18(1): 122-123 (1990) - Arvin Park, Jeffrey C. Becker, Richard J. Lipton:
IOStone: a synthetic file system benchmark. SIGARCH Comput. Archit. News 18(2): 45-52 (1990) - Dionisios N. Pnevmatikatos
, Mark D. Hill:
Cache performance of the integer SPEC benchmarks on a RISC. SIGARCH Comput. Archit. News 18(2): 53-68 (1990)
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retrieved on 2024-09-02 20:48 CEST from data curated by the dblp team
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