• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 9 matches

• 2017
• 
  Ali Asghar, Muhammad Mazher Iqbal, Waqar Ahmed, Mujahid Ali, Husain Parvez, Muhammad Rashid:
  Exploring Shared SRAM Tables in FPGAs for Larger LUTs and Higher Degree of Sharing. Int. J. Reconfigurable Comput. 2017: 7021056:1-7021056:9 (2017)
• 
  Shuli Gao, Dhamin Al-Khalili, J. M. Pierre Langlois, Noureddine Chabini:
  Efficient Realization of BCD Multipliers Using FPGAs. Int. J. Reconfigurable Comput. 2017: 2410408:1-2410408:12 (2017)
• 
  Aous H. Kurdi, Janos L. Grantner, Ikhlas Abdel-Qader:
  Fuzzy Logic Based Hardware Accelerator with Partially Reconfigurable Defuzzification Stage for Image Edge Detection. Int. J. Reconfigurable Comput. 2017: 1325493:1-1325493:13 (2017)
• 
  Swapnil Mhaske, Hojin Kee, Tai Ly, Ahsan Aziz, Predrag Spasojevic:
  FPGA-Based Channel Coding Architectures for 5G Wireless Using High-Level Synthesis. Int. J. Reconfigurable Comput. 2017: 3689308:1-3689308:23 (2017)
• 
  Gilberto Ochoa-Ruiz, Romain Bevan, Florent de Lamotte, Jean-Philippe Diguet, Cheng-Cong Bao:
  Real-Time Control System for Improved Precision and Throughput in an Ultrafast Carbon Fiber Placement Robot Using a SoC FPGA Extended Processing Platform. Int. J. Reconfigurable Comput. 2017: 3298734:1-3298734:20 (2017)
• 
  Lekhobola Tsoeunyane, Simon Winberg, Michael Inggs:
  Software-Defined Radio FPGA Cores: Building towards a Domain-Specific Language. Int. J. Reconfigurable Comput. 2017: 3925961:1-3925961:28 (2017)
• 
  Satheesh Bojja Venkatakrishnan, Elias A. Alwan, John L. Volakis:
  Challenges in Clock Synchronization for On-Site Coding Digital Beamformer. Int. J. Reconfigurable Comput. 2017: 7802735:1-7802735:8 (2017)
• 
  Hasitha Muthumala Waidyasooriya, Tsukasa Endo, Masanori Hariyama, Yasuo Ohtera:
  OpenCL-Based FPGA Accelerator for 3D FDTD with Periodic and Absorbing Boundary Conditions. Int. J. Reconfigurable Comput. 2017: 6817674:1-6817674:11 (2017)
• 
  David Wilson, Aniruddha Shastri, Greg Stitt:
  A High-Level Synthesis Scheduling and Binding Heuristic for FPGA Fault Tolerance. Int. J. Reconfigurable Comput. 2017: 5419767:1-5419767:17 (2017)