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Publication search results
found 67 matches
- 2005
- Robert C. Aitken, Betina Hold:
Modeling Soft-Error Susceptibility for IP Blocks. IOLTS 2005: 70-73 - Monica Alderighi, A. Candelori, Fabio Casini, Sergio D'Angelo, Marcello Mancini, Alessandro Paccagnella, Sandro Pastore, Giacomo R. Sechi:
Heavy Ion Effects on Configuration Logic of Virtex FPGAs. IOLTS 2005: 49-53 - Bartomeu Alorda, Sebastià A. Bota, Jaume Segura:
A Non-Intrusive Built-In Sensor for Transient Current Testing of Digital VLSI Circuits. IOLTS 2005: 177-182 - Lorena Anghel, Régis Leveugle, Pierre Vanhauwaert:
Evaluation of SET and SEU Effects at Multiple Abstraction Levels. IOLTS 2005: 309-312 - Lorena Anghel, Michael Nicolaidis:
Simulation and Mitigation of Single Event Effects. IOLTS 2005: 81 - Lejla Batina, Nele Mentens, Ingrid Verbauwhede:
Side-Channel Issues for Designing Secure Hardware Implementations. IOLTS 2005: 118-121 - Christian Boléat, Gerard Colas:
Overview of Soft Errors Issues in Aerospace Systems. IOLTS 2005: 299-302 - Gian Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano:
Design of a Self Checking Reed Solomon Encoder. IOLTS 2005: 201-202 - José Manuel Cazeaux, Daniele Rossi, Martin Omaña, Cecilia Metra, Abhijit Chatterjee:
On Transistor Level Gate Sizing for Increased Robustness to Transient Faults. IOLTS 2005: 23-28 - Qikai Chen, Saibal Mukhopadhyay, Hamid Mahmoodi, Kaushik Roy:
Process Variation Tolerant Online Current Monitor for Robust Systems. IOLTS 2005: 171-176 - Yves Crouzet, Jacques Henri Collet, Jean Arlat:
Mitigating Soft Errors to Prevent a Hard Threat to Dependable Computing. IOLTS 2005: 295-298 - Animesh Datta, Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy:
Yield Prediction of High Performance Pipelined Circuit with Respect to Delay Failures in Sub-100nm Technology. IOLTS 2005: 275-280 - Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Cecilia Metra:
Load and Logic Co-Optimization for Design of Soft-Error Resistant Nanometer CMOS Circuits. IOLTS 2005: 35-40 - Alexandre Douin, Vincent Pouget, Dean Lewis, Pascal Fouillat, Philippe Perdu:
Electrical Modeling for Laser Testing with Different Pulse Durations. IOLTS 2005: 9-13 - Piotr Gawkowski, Janusz Sosnowski, B. Radko:
Analyzing the Effectiveness of Fault Hardening Procedures. IOLTS 2005: 14-19 - Balkaran S. Gill, Michael Nicolaidis, Christos A. Papachristou:
Radiation Induced Single-Word Multiple-Bit Upsets Correction in SRAM. IOLTS 2005: 266-271 - Donghoon Han, Selim Sermet Akbay, Soumendu Bhattacharya, Abhijit Chatterjee, William R. Eisenstadt:
On-Chip Self-Calibration of RF Circuits Using Specification-Driven Built-In Self Test (S-BIST). IOLTS 2005: 106-111 - Tino Heijmen:
Analytical Semi-Empirical Model for SER Sensitivity Estimation of Deep-Submicron CMOS Circuits. IOLTS 2005: 3-8 - Guillaume Hubert, Nadine Buard, Cécile Weulersse, Thierry Carrière, Marie-Catherine Palau, Jean-Marie Palau, Damien Lambert, Jacques Baggio, Frederic Wrobel, Frédéric Saigné, Rémi Gaillard:
A Review of DASIE Code Family: Contribution to SEU/MBU Understanding. IOLTS 2005: 87-94 - Kentaroh Katoh, Abderrahim Doumar, Hideo Ito:
Design of On-Line Testing for SoC with IEEE P1500 Compliant Cores Using Reconfigurable Hardware and Scan Shift. IOLTS 2005: 203-204 - Chris H. Kim, Steven Hsu, Ram Krishnamurthy, Shekhar Borkar, Kaushik Roy:
Self Calibrating Circuit Design for Variation Tolerant VLSI Systems. IOLTS 2005: 100-105 - René Kothe, Christian Galke, Heinrich Theodor Vierhaus:
A Multi-Purpose Concept for SoC Self Test Including Diagnostic Features. IOLTS 2005: 241-246 - Andrzej Krasniewski:
A Pragmatic Approach to Concurrent Error Detection in Sequential Circuits Implemented Using FPGAs with Embedded Memory. IOLTS 2005: 197-198 - Cristiano Lazzari, Lorena Anghel, Ricardo A. L. Reis:
On Implementing a Soft Error Hardening Technique by Using an Automatic Layout Generator: Case Study. IOLTS 2005: 29-34 - Antoine Lemarechal:
Introduction to Fault Attacks on Smartcard. IOLTS 2005: 116 - Damien Leroy, Stanislaw J. Piestrak, Fabrice Monteiro, Abbas Dandache:
Modeling of Transients Caused by a Laser Attack on Smart Cards. IOLTS 2005: 193-194 - Régis Leveugle:
Introduction to the Special Session on Secure Implementations. IOLTS 2005: 115 - Régis Leveugle:
A New Approach for Early Dependability Evaluation Based on Formal Property Checking and Controlled Mutations. IOLTS 2005: 260-265 - Régis Leveugle, Yervant Zorian, Luca Breveglieri, André K. Nieuwland, Klaus Rothbart, Jean-Pierre Seifert:
On-Line Testing for Secure Implementations: Design and Validation. IOLTS 2005: 211 - Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena-Arrontes:
Autonomous Transient Fault Emulation on FPGAs for Accelerating Fault Grading. IOLTS 2005: 43-48
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