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Fatemeh Tehranipoor , Nima Karimian , Wei Yan , John A. Chandy : A Study of Power Supply Variation as a Source of Random Noise. VLSID 2017 : 155-160 share record
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Ishan G. Thakkar , Sudeep Pasricha : DyPhase: A Dynamic Phase Change Memory Architecture with Symmetric Write Latency. VLSID 2017 : 41-46 share record
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Venkatesh Mani Tripathi , Sandeep Mishra , Jyotishman Saikia , Anup Dandapat : A Low-Voltage 13T Latch-Type Sense Amplifier with Regenerative Feedback for Ultra Speed Memory Access. VLSID 2017 : 341-346 share record
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Anshuman Tripathi , Arnab Sarkar , P. P. Chakrabarti : Migration Aware Low Overhead ERfair Scheduler. VLSID 2017 : 219-224 share record
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Shrinidhi Udupi , Joakim Urdahl , Dominik Stoffel , Wolfgang Kunz : Dynamic Power Optimization Based on Formal Property Checking of Operations. VLSID 2017 : 227-232 share record
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Kajal Varma , Geeta Patil , Biju K. Raveendran : DTLB: Deterministic TLB for Tightly Bound Hard Real-Time Systems. VLSID 2017 : 207-212 share record
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Rajat Vishnoi , Pratyush Panday , Mamidala Jagadesh Kumar : DC Drain Current Model for Tunnel FETs Considering Source and Drain Depletion Regions. VLSID 2017 : 385-390 share record
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Sanjay Kumar Wadhwa , Nidhi Chaudhry : High Accuracy, Multi-output Bandgap Reference Circuit in 16nm FinFet. VLSID 2017 : 259-262 share record
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Mahesh Zanwar , Subhajit Sen : Programmable Output Multi-phase Switched Capacitor Step-Up DC-DC Converter with SAR-based Regulation. VLSID 2017 : 193-198 share record
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30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, VLSID 2017, Hyderabad, India, January 7-11, 2017. IEEE Computer Society 2017 , ISBN 978-1-5090-5740-5 [contents]