- Gordon B. Steven, Bruce Christianson, Roger Collins, Richard D. Potter, Fleur L. Steven:
A superscalar architecture to exploit instruction level parallelism. Microprocess. Microsystems 20(7): 391-400 (1997) - James Sutton, Bernard Carré:
Achieving high integrity at low cost: a constructive approach. Microprocess. Microsystems 20(8): 455-461 (1997) - David N. J. White:
The hardware design of compute/DRAM TRAMS. Microprocess. Microsystems 20(9): 567-577 (1997) - 1996
- Ioannis Andreadis, Antonios Gasteratos, Philippos Tsalides:
An ASIC for fast grey-scale dilation. Microprocess. Microsystems 20(2): 89-95 (1996) - M. A. Atmanand, V. Jagadeesh Kumar:
Microcontroller based LCR meter. Microprocess. Microsystems 20(5): 297-301 (1996) - Jim E. Cooling:
Languages for the programming of real-time embedded systems a survey and comparison. Microprocess. Microsystems 20(2): 67-77 (1996) - Joanne Cooling:
Software maintenance concepts and practice : Armstrong A. Takang, Penny A. Grubb, International Thompson Publishing Inc., 1996, Softbound £22.95. ISBN 1-85032-192-2. Microprocess. Microsystems 20(5): 311 (1996) - Antonio Corradi, Cesare Stefanelli:
A deadlock prevention strategy for adaptive routing systems. Microprocess. Microsystems 20(2): 97-103 (1996) - Martyn Edwards:
Editorial. Microprocess. Microsystems 20(3): 139-140 (1996) - Martyn Edwards, John Forrest:
A practical hardware architecture to support software acceleration. Microprocess. Microsystems 20(3): 167-174 (1996) - Rolf Ernst, Jörg Henkel, Thomas Benner, Wei Ye, Ulrich Holtmann, Dirk Herrmann, Michael Trawny:
The COSYMA environment for hardware/software cosynthesis of small embedded systems. Microprocess. Microsystems 20(3): 159-166 (1996) - Martti Forsell:
Minimal pipeline architecture - an alternative to superscalar architecture. Microprocess. Microsystems 20(5): 277-284 (1996) - G. T. Heng:
Microcomputer-based remote terminal unit for a SCADA system. Microprocess. Microsystems 20(1): 39-45 (1996) - Teruo Ishii, Navid Madani:
High-speed, high-drive SN74ABT7819 FIFO. Microprocess. Microsystems 20(1): 57-61 (1996) - Tarek Ben Ismail, Jean-Marc Daveau, Kevin O'Brien, Ahmed Amine Jerraya:
A system-level communication synthesis approach for hardware/software systems. Microprocess. Microsystems 20(3): 149-157 (1996) - E. Kappos, D. J. Kinniment:
Application-specific processor architectures for embedded control: case studies. Microprocess. Microsystems 20(4): 225-232 (1996) - Barry Kauler:
A tiny microcontroller dataflow kernel. Microprocess. Microsystems 20(2): 105-110 (1996) - Harri Klapuri, Timo Hämäläinen, Jukka Saarinen, Kimmo Kaski:
Mapping artificial neural networks to a tree shape neurocomputer. Microprocess. Microsystems 20(5): 267-276 (1996) - Gernot Koch, Ulrich Weinmann, Udo Kebschull, Wolfgang Rosenstiel:
System prototyping in the COBRA project. Microprocess. Microsystems 20(3): 175-184 (1996) - K. P. Lam, S. M. Yuen:
Time-range compatibility reasoning for asynchronous systems design. Microprocess. Microsystems 20(4): 203-209 (1996) - Navid Madani:
Simultaneous-switching noise analysis for Texas instruments FIFO products. Microprocess. Microsystems 20(1): 47-55 (1996) - Antonio Pessoa Magalhães, Mário Zenha Rela, João Gabriel Silva:
On the nature of deadlines. Microprocess. Microsystems 20(2): 79-88 (1996) - Antônio Miguel Vieira Monteiro, Wei-Wei Lu, Michael Paul Gough, Jon A. Thompson, K. H. Yearby:
A smart telemetry compression system for a space instrument: MARS-96 ELISMA instrument complex. Microprocess. Microsystems 20(1): 17-30 (1996) - Libero Nigro, Francesco Tisato:
Timing as a programming-in-the-large issue. Microprocess. Microsystems 20(4): 211-223 (1996) - Igor Ozimek:
Accessing MS-DOS applications over a TCP/IP network. Microprocess. Microsystems 20(1): 31-38 (1996) - Ian Page:
Reconfigurable processor architectures. Microprocess. Microsystems 20(3): 185-196 (1996) - K. M. M. Prabhu, R. Shanmuga Sundaram:
Fast Hartley transform implementation on DSP chips. Microprocess. Microsystems 20(4): 233-240 (1996) - Brian M. Reeder, Michael Paul Gough:
Application of artificial neural networks for spacecraft instrument data compression. Microprocess. Microsystems 20(5): 285-295 (1996) - N. V. Satyanarayana, Rajib Mall, Ajit Pal:
A layered architecture for real-time systems. Microprocess. Microsystems 20(4): 241-250 (1996) - Per Stenström, Magnus Balldin, Jonas Skeppstedt:
The design of a non-blocking load processor architecture. Microprocess. Microsystems 20(2): 111-123 (1996)