- Charles M. Fiduccia, Robert M. Mattheyses:
A linear-time heuristic for improving network partitions. DAC 1982: 175-181 - Vincent J. Freund Jr., J. A. Guerin:
Automated conversion of design data for building the IBM 3081. DAC 1982: 96-103 - Robert Alan Friedenson, J. R. Breiland, T. J. Thompson:
Designer's Workbench: Delivery of cad tools. DAC 1982: 15-22 - Stacey J. Gelman:
VEEP A VEctor Editor and Preparer. DAC 1982: 771-776 - Jeffrey Z. Gingerich, Michael P. Carroll, E. J. Chelius, Po-Kuan Lu:
A hybrid CAD/CAM system for mechanical applications. DAC 1982: 643-649 - Gregory John Glass:
A user interface for architectural design, a case study. DAC 1982: 508-513 - Prabhakar Goel, M. T. McMahon:
Electronic Chip-in-Place Test. DAC 1982: 482-488 - Deepak K. Goel, Robert M. McDermott:
An interactive testability analysis program - ITTAP. DAC 1982: 581-586 - David Grabel:
Object data structures towards distributed graphics processing. DAC 1982: 358-364 - Werner Grass:
A depth-first branch-and-bound algorithm for optimal PLA folding. DAC 1982: 133-140 - John P. Gray, Irene Buchanan, Peter Salkeld Robertson:
Designing gate arrays using a silicon compiler. DAC 1982: 377-383 - Gary D. Hachtel, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli:
Techniques for programmable logic array folding. DAC 1982: 147-155 - James E. Hassett:
Automated layout in ASHLAR: An approach to the problems of "General Cell" layout for VLSI. DAC 1982: 777-784 - John P. Hayes:
A fault simulation methodology for VLSI. DAC 1982: 393-399 - William R. Heller, Gregory B. Sorkin, Klim Maling:
The planar package planner for system designers. DAC 1982: 253-260 - Walter Heyns:
The 1-2-3 routing algorithm or the single channel 2-step router on 3 interconnection layers. DAC 1982: 113-120 - Kazuyuki Hirakawa, Noboru Shiraki, Michiaki Muraoka:
Logic simulation for LSI. DAC 1982: 755-761 - Xian-Long Hong, Ren-kung Yin, Xi-ling Liu:
QCADS-a LSI CAD system for minicomputer. DAC 1982: 706-711 - Chi-Ping Hsu:
A new two-dimensional routing algorithm. DAC 1982: 46-50 - Kazuyuki Inoue, Masahiko Adachi, Toru Funayama:
A layout system for high precision design of progressive die. DAC 1982: 246-252 - Yehuda E. Kalay:
Modeling polyhedral solids bounded by multi-curved parametric surfaces. DAC 1982: 501-507 - Takashi Kambe, Toru Chiba, Seiji Kimura, Tsuneo Inufushi, Noboru Okuda, Ikuo Nishioka:
A placement algorithm for polycell LSI and ITS evaluation. DAC 1982: 655-662 - Sung-Mo Kang, Robert H. Krambeck, Hung-Fai Stephen Law:
Gate matrix layout of random control logic in a 32-bit CMOS CPU chip adaptable to evolving logic design. DAC 1982: 170-174 - David Kaplan:
A "non-restrictive" artwork verification program for printed circuit boards. DAC 1982: 551-558 - Randy H. Katz:
A database approach for managing VLSI design data. DAC 1982: 274-282 - Nobuaki Kawato, Takao Uehara, Sadaki Hirose, Takao Saito:
An interactive logic synthesis system based upon AI techniques. DAC 1982: 858-864 - Gershon Kedem:
The quad-CIF tree: A data structure for hierarchical on-line algorithms. DAC 1982: 352-357 - Kenneth H. Keller, A. Richard Newton, S. Ellis:
A symbolic design system for integrated circuits. DAC 1982: 460-466 - Robert K. Korn:
An efficient variable-cost maze router. DAC 1982: 425-431 - E. Kronstadt, Gregory F. Pfister:
Software support for the Yorktown Simulation Engine. DAC 1982: 60-64