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@article{DBLP:journals/ipsj/FujiwaraKYT19, author = {Koichi Fujiwara and Kazushi Kawamura and Masao Yanagisawa and Nozomu Togawa}, title = {An {FPGA} Implementation Method based on Distributed-register Architectures}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {38--41}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.38}, doi = {10.2197/IPSJTSLDM.12.38}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ipsj/FujiwaraKYT19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ipsj/IslamO19, author = {A. K. M. Mahfuzul Islam and Hidetoshi Onodera}, title = {Circuit Techniques for Device-Circuit Interaction toward Minimum Energy Operation}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {2--12}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.2}, doi = {10.2197/IPSJTSLDM.12.2}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ipsj/IslamO19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ipsj/KitoTT19, author = {Nobutaka Kito and Kazuyoshi Takagi and Naofumi Takagi}, title = {Conversion of Logic Gates in Netlists for Rapid Single Flux Quantum Circuits Utilizing Confluence of Pulses}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {78--80}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.78}, doi = {10.2197/IPSJTSLDM.12.78}, timestamp = {Tue, 29 Dec 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ipsj/KitoTT19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ipsj/KoyasuT19, author = {Hiroki Koyasu and Yasuhiro Takahashi}, title = {Current Pass Optimized Symmetric Pass Gate Adiabatic Logic for Cryptographic Circuits}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {50--52}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.50}, doi = {10.2197/IPSJTSLDM.12.50}, timestamp = {Tue, 29 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ipsj/KoyasuT19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ipsj/LiuMT19, author = {Yang Liu and Lin Meng and Hiroyuki Tomiyama}, title = {A Genetic Algorithm for Scheduling of Data-parallel Tasks on Multicore Architectures}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {74--77}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.74}, doi = {10.2197/IPSJTSLDM.12.74}, timestamp = {Sat, 09 Apr 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ipsj/LiuMT19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ipsj/MiyazakiTTT19, author = {Takafumi Miyazaki and Shunsuke Takai and Ittetsu Taniguchi and Hiroyuki Tomiyama}, title = {An OpenCL-based Software Framework for a Heterogeneous Multicore Architecture on Zynq-7000 SoC}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {46--49}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.46}, doi = {10.2197/IPSJTSLDM.12.46}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ipsj/MiyazakiTTT19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ipsj/Seto19, author = {Kenshu Seto}, title = {Scalar Replacement with Circular Buffers}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {13--21}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.13}, doi = {10.2197/IPSJTSLDM.12.13}, timestamp = {Tue, 29 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ipsj/Seto19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ipsj/ShimadaTT19, author = {Kana Shimada and Ittetsu Taniguchi and Hiroyuki Tomiyama}, title = {Communication-Aware Scheduling of Data-Parallel Tasks on Multicore Architectures}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {65--73}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.65}, doi = {10.2197/IPSJTSLDM.12.65}, timestamp = {Tue, 29 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ipsj/ShimadaTT19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ipsj/ShirakuniTT19, author = {Seiya Shirakuni and Ittetsu Taniguchi and Hiroyuki Tomiyama}, title = {Design and Evaluation of Asymmetric and Symmetric 32-core Architectures on {FPGA}}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {42--45}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.42}, doi = {10.2197/IPSJTSLDM.12.42}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ipsj/ShirakuniTT19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ipsj/SombatsiriSKITH19, author = {Salita Sombatsiri and Seiya Shibata and Yuki Kobayashi and Hiroaki Inoue and Takashi Takenaka and Takeo Hosomi and Jaehoon Yu and Yoshinori Takeuchi}, title = {Parallelism-flexible Convolution Core for Sparse Convolutional Neural Networks on {FPGA}}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {22--37}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.22}, doi = {10.2197/IPSJTSLDM.12.22}, timestamp = {Tue, 29 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ipsj/SombatsiriSKITH19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ipsj/Togawa19, author = {Nozomu Togawa}, title = {Message from the Editor-in-Chief}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {1}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.1}, doi = {10.2197/IPSJTSLDM.12.1}, timestamp = {Tue, 29 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ipsj/Togawa19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ipsj/YangQC19, author = {Chaofei Yang and Ximing Qiao and Yiran Chen}, title = {Neuromorphic Computing Systems: From {CMOS} To Emerging Nonvolatile Memory}, journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.}, volume = {12}, pages = {53--64}, year = {2019}, url = {https://doi.org/10.2197/ipsjtsldm.12.53}, doi = {10.2197/IPSJTSLDM.12.53}, timestamp = {Mon, 04 Jul 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ipsj/YangQC19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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