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@article{DBLP:journals/integration/AbbassiGAHM22, author = {Nessrine Abbassi and Mohamed Gafsi and Rim Amdouni and Mohamed Ali Hajjaji and Abdellatif Mtibaa}, title = {Hardware implementation of a robust image cryptosystem using reversible cellular-automata rules and 3-D chaotic systems}, journal = {Integr.}, volume = {87}, pages = {49--66}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.007}, doi = {10.1016/J.VLSI.2022.06.007}, timestamp = {Mon, 28 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/AbbassiGAHM22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/AlagarsamyMLK22, author = {Aravindhan Alagarsamy and Sundarakannan Mahilmaran and Gopalakrishnan Lakshminarayanan and Seok{-}Bum Ko}, title = {{FRDS:} An efficient unique on-Chip interconnection network architecture}, journal = {Integr.}, volume = {87}, pages = {90--103}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.014}, doi = {10.1016/J.VLSI.2022.06.014}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/AlagarsamyMLK22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/AmdouniGGHMB22, author = {Rim Amdouni and Mohamed Gafsi and Ramzi Guesmi and Mohamed Ali Hajjaji and Abdellatif Mtibaa and El{-}Bay Bourennane}, title = {High-performance hardware architecture of a robust block-cipher algorithm based on different chaotic maps and {DNA} sequence encoding}, journal = {Integr.}, volume = {87}, pages = {346--363}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.08.002}, doi = {10.1016/J.VLSI.2022.08.002}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/AmdouniGGHMB22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/AminzadehV22, author = {Hamed Aminzadeh and Mohammad Mahdi Valinezhad}, title = {Picowatt 0.3-V MOS-only voltage reference based on a picoamp cascode current generator}, journal = {Integr.}, volume = {87}, pages = {284--292}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.014}, doi = {10.1016/J.VLSI.2022.07.014}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/AminzadehV22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/BerndtMRB22, author = {Augusto Andre Souza Berndt and Cristina Meinhardt and Andr{\'{e}} In{\'{a}}cio Reis and Paulo F. Butzen}, title = {Optimizing machine learning logic circuits with constant signal propagation}, journal = {Integr.}, volume = {87}, pages = {293--305}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.08.004}, doi = {10.1016/J.VLSI.2022.08.004}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/BerndtMRB22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/BouhdjeurATTM22, author = {Abderrezzaq Bouhdjeur and Mohamed Salah Azzaz and Djamel Teguig and Camel Tanougast and Abdelmadjid Maali}, title = {An optimised hardware architecture of the angular-domain cyclostationary detector for cognitive radio communications}, journal = {Integr.}, volume = {87}, pages = {111--121}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.001}, doi = {10.1016/J.VLSI.2022.07.001}, timestamp = {Tue, 06 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/BouhdjeurATTM22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/BukkapatnamS22, author = {Krishnaveni Bukkapatnam and Jaikaran Singh}, title = {{VLSI} implementation of low-power and area efficient parallel memory allocation with {EC-TCAM}}, journal = {Integr.}, volume = {87}, pages = {336--345}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.08.011}, doi = {10.1016/J.VLSI.2022.08.011}, timestamp = {Wed, 05 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/BukkapatnamS22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/CaoG22, author = {Chao Cao and Haijun Guo}, title = {High-resolution calibrated successive-approximation-register analog-to-digital converter}, journal = {Integr.}, volume = {87}, pages = {205--210}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.08.005}, doi = {10.1016/J.VLSI.2022.08.005}, timestamp = {Mon, 28 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/CaoG22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/ElwakilMPE22, author = {Ahmed S. Elwakil and Brent J. Maundy and Costas Psychalinos and Mohamed B. Elamien}, title = {Synthesis of resonance-based common-gate fully differential band-pass filters}, journal = {Integr.}, volume = {87}, pages = {67--73}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.002}, doi = {10.1016/J.VLSI.2022.06.002}, timestamp = {Sun, 04 Aug 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/ElwakilMPE22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/HuSNCCK22, author = {Ke Hu and Wenhao Sun and Zhongbo Nie and Ran Cheng and Song Chen and Yi Kang}, title = {Real-time infrared small target detection network and accelerator design}, journal = {Integr.}, volume = {87}, pages = {241--252}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.008}, doi = {10.1016/J.VLSI.2022.07.008}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/HuSNCCK22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/KangarshahiZ22, author = {Azadeh Norouzi Kangarshahi and Abdulhamid Zahedi}, title = {A novel class-E class-D doherty power amplifier based on past matching network with linearity region extension and flat output power}, journal = {Integr.}, volume = {87}, pages = {264--274}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.08.001}, doi = {10.1016/J.VLSI.2022.08.001}, timestamp = {Wed, 05 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/KangarshahiZ22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/KumarMMRB22, author = {Mithilesh Kumar and Alak Majumder and Abir J. Mondal and Arijit Raychowdhury and Bidyut K. Bhattacharyya}, title = {A low power and {PVT} variation tolerant mux-latch for serializer interface and on-chip serial link}, journal = {Integr.}, volume = {87}, pages = {364--377}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.08.008}, doi = {10.1016/J.VLSI.2022.08.008}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/KumarMMRB22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/LiFZYWWZ22, author = {Chuxi Li and Xiaoya Fan and Shengbing Zhang and Zhao Yang and Miao Wang and Danghui Wang and Meng Zhang}, title = {{DCNN} search and accelerator co-design: Improve the adaptability between {NAS} frameworks and embedded platforms}, journal = {Integr.}, volume = {87}, pages = {147--157}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.003}, doi = {10.1016/J.VLSI.2022.07.003}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/LiFZYWWZ22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/LiS22, author = {Bo Li and Guoyong Shi}, title = {A {CMOS} rectified linear unit operating in weak inversion for memristive neuromorphic circuits}, journal = {Integr.}, volume = {87}, pages = {24--28}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.05.007}, doi = {10.1016/J.VLSI.2022.05.007}, timestamp = {Mon, 28 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/LiS22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/LiZLGWLTQ22, author = {Yanze Li and Yufan Zhang and Jiafeng Liu and Jun Gong and Jian Wang and Jinmei Lai and Xinxuan Tao and Gang Qu}, title = {AutoTEA: An Automated Transistor-level Efficient and Accurate design tool for {FPGA} design}, journal = {Integr.}, volume = {87}, pages = {231--240}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.010}, doi = {10.1016/J.VLSI.2022.06.010}, timestamp = {Fri, 20 Jan 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/LiZLGWLTQ22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/LiuLLJ22, author = {Wenhao Liu and Huakui Lei and Hongfei Liu and Peng Jiang}, title = {Design of an ultra-wideband {LNA} using transformer matching method}, journal = {Integr.}, volume = {87}, pages = {122--136}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.012}, doi = {10.1016/J.VLSI.2022.06.012}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/LiuLLJ22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/LiuWLXZZ22, author = {Bo Liu and Pengfei Wang and Kai Li and Binrui Xu and Jincan Zhang and Liwen Zhang}, title = {A precision programmable multilevel voltage output and low-temperature-variation {CMOS} bandgap reference with area-efficient transistor-array layout}, journal = {Integr.}, volume = {87}, pages = {74--81}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.003}, doi = {10.1016/J.VLSI.2022.06.003}, timestamp = {Thu, 15 Aug 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/LiuWLXZZ22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/MaryanAV22, author = {Mohammad Moradinezhad Maryan and Seyed Javad Azhari and Majid Amini Valashani}, title = {A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22 nm {CMOS} process}, journal = {Integr.}, volume = {87}, pages = {1--10}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.05.006}, doi = {10.1016/J.VLSI.2022.05.006}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/MaryanAV22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/NaseerNSYMAM22, author = {Raja Arslan Naseer and Muneeba Nasim and Muhummad Sohaib and Ch. Jabbar Younis and Anzar Mehmood and Mehboob Alam and Yehia Massoud}, title = {{VLSI} architecture design and implementation of 5/3 and 9/7 lifting Discrete Wavelet Transform}, journal = {Integr.}, volume = {87}, pages = {253--259}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.009}, doi = {10.1016/J.VLSI.2022.07.009}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/NaseerNSYMAM22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/NedalgiS22, author = {Dharmaray Nedalgi and Saroja V. Siddamal}, title = {Differential receiver with 2 {\texttimes} {VDD} input signals using 1 {\texttimes} {VDD} devices}, journal = {Integr.}, volume = {87}, pages = {306--312}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.08.003}, doi = {10.1016/J.VLSI.2022.08.003}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/NedalgiS22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/RenW22, author = {Jijun Ren and Xing Wang}, title = {Research on digital predistortion technique of harmonic cancellation based on volterra series}, journal = {Integr.}, volume = {87}, pages = {332--335}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.007}, doi = {10.1016/J.VLSI.2022.07.007}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/RenW22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/SarmaCBR22, author = {Jitumani Sarma and Shatadal Chatterjee and Rakesh Biswas and Sounak Roy}, title = {A digitally controlled adaptive {LDO} for power management unit in sensor node}, journal = {Integr.}, volume = {87}, pages = {29--39}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.004}, doi = {10.1016/J.VLSI.2022.06.004}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/SarmaCBR22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/ShekharK22, author = {Raghav Shekhar and Chaudhry Indra Kumar}, title = {Design of highly reliable radiation hardened 10T {SRAM} cell for low voltage applications}, journal = {Integr.}, volume = {87}, pages = {176--181}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.004}, doi = {10.1016/J.VLSI.2022.07.004}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/ShekharK22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/SilvaOZMR22, author = {F{\'{a}}bio G. R. G. da Silva and Rafael N. M. Oliveira and Alexandra L. Zimpeck and Cristina Meinhardt and Ricardo Reis}, title = {Exploring XOR-based Full Adders and decoupling cells to variability mitigation at FinFET technology}, journal = {Integr.}, volume = {87}, pages = {137--146}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.008}, doi = {10.1016/J.VLSI.2022.06.008}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/SilvaOZMR22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/SongHY22, author = {Tai Song and Zhengfeng Huang and Aibin Yan}, title = {Machine learning classification algorithm for {VLSI} test cost reduction}, journal = {Integr.}, volume = {87}, pages = {40--48}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.005}, doi = {10.1016/J.VLSI.2022.06.005}, timestamp = {Mon, 28 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/SongHY22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/SotiriadisT22, author = {Paul P. Sotiriadis and Nikos Temenos}, title = {Compact {MAX} and {MIN} Stochastic Computing architectures}, journal = {Integr.}, volume = {87}, pages = {194--204}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.006}, doi = {10.1016/J.VLSI.2022.06.006}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/SotiriadisT22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/SukumaranP22, author = {Pournamy Sukumaran and Maran Ponnambalam}, title = {A two stage cascode {LNA} using modified derivative superposition technique in 0.13{\(\mu\)}m {HBT} with an {IIP3} of 2 dBm and {NF} of 4.8 dB for {IEEE} 802.11ad standard}, journal = {Integr.}, volume = {87}, pages = {211--220}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.010}, doi = {10.1016/J.VLSI.2022.07.010}, timestamp = {Mon, 28 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/SukumaranP22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/TianLJLLY22, author = {Chen Tian and Jianyong Lu and Liu Jun and Huaguo Liang and Yingchun Lu and Maoxiang Yi}, title = {A reconfigurable test method based on {LFSR} for 3D stacking integrated circuits}, journal = {Integr.}, volume = {87}, pages = {82--89}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.011}, doi = {10.1016/J.VLSI.2022.06.011}, timestamp = {Thu, 13 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/TianLJLLY22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/ValuskarSR22, author = {Ashish Valuskar and Madhu Shandilya and Arvind Rajawat}, title = {Statistical traffic pattern for mixed torus topology and pathfinder based traffic and thermal aware routing protocol on NoC}, journal = {Integr.}, volume = {87}, pages = {158--168}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.009}, doi = {10.1016/J.VLSI.2022.06.009}, timestamp = {Mon, 28 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/ValuskarSR22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/WangTWLT22, author = {Yaru Wang and Ming Tang and Pengbo Wang and Botao Liu and Rui Tian}, title = {The Levene test based-leakage assessment}, journal = {Integr.}, volume = {87}, pages = {182--193}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.013}, doi = {10.1016/J.VLSI.2022.06.013}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/WangTWLT22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/WangWL22, author = {Bo Wang and Haoying Wu and Mingyu Liu}, title = {Resource allocation applied to flexible printed circuit routing based on constrained Delaunay triangulation}, journal = {Integr.}, volume = {87}, pages = {16--23}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.05.008}, doi = {10.1016/J.VLSI.2022.05.008}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/WangWL22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/WeiZZW22, author = {JiaHao Wei and Tian Zhao and Zheng Zhang and Jing Wan}, title = {Modeling of {CMOS} transistors from 0.18 {\(\mu\)}m process by artificial neural network}, journal = {Integr.}, volume = {87}, pages = {11--15}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.06.001}, doi = {10.1016/J.VLSI.2022.06.001}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/WeiZZW22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/Xie22, author = {Shuang Xie}, title = {{BJT} induced dark current in {CMOS} image sensors}, journal = {Integr.}, volume = {87}, pages = {260--263}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.013}, doi = {10.1016/J.VLSI.2022.07.013}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/Xie22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/XuZ22, author = {Longhao Xu and Jie Zhang}, title = {A Novel four - Wing chaotic system with multiple attractors based on hyperbolic sine: Application to image encryption*}, journal = {Integr.}, volume = {87}, pages = {313--331}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.012}, doi = {10.1016/J.VLSI.2022.07.012}, timestamp = {Mon, 28 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/XuZ22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/YangLGH22, author = {Jinling Yang and Lang Li and Ying Guo and Xiantong Huang}, title = {{DULBC:} {A} dynamic ultra-lightweight block cipher with high-throughput}, journal = {Integr.}, volume = {87}, pages = {221--230}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.011}, doi = {10.1016/J.VLSI.2022.07.011}, timestamp = {Wed, 21 Aug 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/YangLGH22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/ZhanC22, author = {Suoyue Zhan and Chunhong Chen}, title = {A hybrid method for signal probability and reliability estimation with combinational circuits}, journal = {Integr.}, volume = {87}, pages = {275--283}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.006}, doi = {10.1016/J.VLSI.2022.07.006}, timestamp = {Tue, 18 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/ZhanC22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/ZhangZDL22, author = {Zewei Zhang and Xiao Zhao and Liyuan Dong and Shuoyang Li}, title = {A high-efficiency feedforward compensation method for capacitor-less {LDO}}, journal = {Integr.}, volume = {87}, pages = {104--110}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.002}, doi = {10.1016/J.VLSI.2022.07.002}, timestamp = {Wed, 05 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/ZhangZDL22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/ZhaoCLWL22, author = {Yi Zhao and Hui Chen and Peng Liu and Jigang Wu and Dongxiang Luo}, title = {An improved reconfigurable logic in resistive random access memory}, journal = {Integr.}, volume = {87}, pages = {169--175}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2022.07.005}, doi = {10.1016/J.VLSI.2022.07.005}, timestamp = {Wed, 07 Aug 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/ZhaoCLWL22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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