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@article{DBLP:journals/integration/BouletDRR94,
  author       = {Pierre Boulet and
                  Alain Darte and
                  Tanguy Risset and
                  Yves Robert},
  title        = {(Pen)-ultimate tiling?},
  journal      = {Integr.},
  volume       = {17},
  number       = {1},
  pages        = {33--51},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)90019-1},
  doi          = {10.1016/0167-9260(94)90019-1},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/BouletDRR94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/Bruck94,
  author       = {Rainer Br{\"{u}}ck},
  title        = {Dingo-XT: {A} technology description language for analog and digital
                  {IC} layout},
  journal      = {Integr.},
  volume       = {17},
  number       = {1},
  pages        = {53--81},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)90020-5},
  doi          = {10.1016/0167-9260(94)90020-5},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Bruck94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ChandrasekharamVS94,
  author       = {R. Chandrasekharam and
                  V. V. Vinod and
                  S. Subramanian},
  title        = {Genetic algorithm for test scheduling with different objectives},
  journal      = {Integr.},
  volume       = {17},
  number       = {2},
  pages        = {153--161},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)00009-3},
  doi          = {10.1016/0167-9260(94)00009-3},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/ChandrasekharamVS94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/Coudert94,
  author       = {Olivier Coudert},
  title        = {Two-level logic minimization: an overview},
  journal      = {Integr.},
  volume       = {17},
  number       = {2},
  pages        = {97--140},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)00007-7},
  doi          = {10.1016/0167-9260(94)00007-7},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Coudert94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/GonzalezZ94,
  author       = {Teofilo F. Gonzalez and
                  Si{-}Qing Zheng},
  title        = {Single phase three-layer channel routing algorithms},
  journal      = {Integr.},
  volume       = {17},
  number       = {2},
  pages        = {141--151},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)00008-5},
  doi          = {10.1016/0167-9260(94)00008-5},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/GonzalezZ94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/GrayLCH94,
  author       = {C. Thomas Gray and
                  Wentai Liu and
                  Ralph K. Cavin III and
                  Hong{-}Yean Hsieh},
  title        = {Circuit delay calculation considering data dependent delays},
  journal      = {Integr.},
  volume       = {17},
  number       = {1},
  pages        = {1--23},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)90017-5},
  doi          = {10.1016/0167-9260(94)90017-5},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/GrayLCH94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/HsuR94,
  author       = {Pochang Hsu and
                  Jerzy W. Rozenblit},
  title        = {A computer-aided design framework for modeling and simulation of {VLSI}
                  interconnections and packaging},
  journal      = {Integr.},
  volume       = {17},
  number       = {2},
  pages        = {163--187},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)00010-7},
  doi          = {10.1016/0167-9260(94)00010-7},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/HsuR94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/Jansen94,
  author       = {Klaus Jansen},
  title        = {On the complexity of allocation problems in high-level synthesis},
  journal      = {Integr.},
  volume       = {17},
  number       = {3},
  pages        = {241--252},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)90002-7},
  doi          = {10.1016/0167-9260(94)90002-7},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Jansen94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/Keller94,
  author       = {J{\"{o}}rg Keller},
  title        = {Regular layouts of butterfly networks},
  journal      = {Integr.},
  volume       = {17},
  number       = {3},
  pages        = {253--263},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)90003-5},
  doi          = {10.1016/0167-9260(94)90003-5},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Keller94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/Kundu94,
  author       = {Sandip Kundu},
  title        = {An incremental algorithm for identification of longest (shortest)
                  paths},
  journal      = {Integr.},
  volume       = {17},
  number       = {1},
  pages        = {25--31},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)90018-3},
  doi          = {10.1016/0167-9260(94)90018-3},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Kundu94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/Kundu94a,
  author       = {Sandip Kundu},
  title        = {An efficient technique for obtaining unate implementation of functions
                  through input encoding},
  journal      = {Integr.},
  volume       = {17},
  number       = {3},
  pages        = {265--270},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)90004-3},
  doi          = {10.1016/0167-9260(94)90004-3},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Kundu94a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/SilbermanS94,
  author       = {Gabriel M. Silberman and
                  Ilan Y. Spillinger},
  title        = {A backtracing-oriented procedure for the analysis of combinational
                  gate-level designs},
  journal      = {Integr.},
  volume       = {17},
  number       = {3},
  pages        = {271--286},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)90005-1},
  doi          = {10.1016/0167-9260(94)90005-1},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/SilbermanS94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/SykoraV94,
  author       = {Ondrej S{\'{y}}kora and
                  Imrich Vrt'o},
  title        = {On {VLSI} layouts of the star graph and related networks},
  journal      = {Integr.},
  volume       = {17},
  number       = {1},
  pages        = {83--93},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)90021-3},
  doi          = {10.1016/0167-9260(94)90021-3},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/SykoraV94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/VenkateswaranM94,
  author       = {Raja Venkateswaran and
                  Pinaki Mazumder},
  title        = {A survey of {DA} techniques for {PLD} and {FPGA} based systems},
  journal      = {Integr.},
  volume       = {17},
  number       = {3},
  pages        = {191--240},
  year         = {1994},
  url          = {https://doi.org/10.1016/0167-9260(94)90001-9},
  doi          = {10.1016/0167-9260(94)90001-9},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/VenkateswaranM94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}