default search action
Search dblp for Publications
export results for "toc:db/journals/ijrc/ijrc2015.bht:"
@article{DBLP:journals/ijrc/AsgharP15, author = {Ali Asghar and Husain Parvez}, title = {An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {756014:1--756014:10}, year = {2015}, url = {https://doi.org/10.1155/2015/756014}, doi = {10.1155/2015/756014}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/AsgharP15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/Barros15, author = {Fernando J. Barros}, title = {Representing Tactics for Fault Recovery: {A} Reconfigurable, Modular, and Hierarchical Approach}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {321532:1--321532:12}, year = {2015}, url = {https://doi.org/10.1155/2015/321532}, doi = {10.1155/2015/321532}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/Barros15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/Cardona015, author = {Luis Andr{\'{e}}s Cardona and Carles Ferrer}, title = {AC{\_}ICAP: {A} Flexible High Speed {ICAP} Controller}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {314358:1--314358:15}, year = {2015}, url = {https://doi.org/10.1155/2015/314358}, doi = {10.1155/2015/314358}, timestamp = {Thu, 16 Feb 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ijrc/Cardona015.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/FilhoSC15, author = {Jonas Gomes Filho and Marius Strum and Jiang Chau Wang}, title = {Using Genetic Algorithms for Hardware Core Placement and Mapping in NoC-Based Reconfigurable Systems}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {902925:1--902925:13}, year = {2015}, url = {https://doi.org/10.1155/2015/902925}, doi = {10.1155/2015/902925}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/FilhoSC15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/GuptaGA15, author = {Priya Gupta and Anu Gupta and Abhijit R. Asati}, title = {Leakage Immune Modified Pass Transistor Based 8T {SRAM} Cell in Subthreshold Region}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {749816:1--749816:10}, year = {2015}, url = {https://doi.org/10.1155/2015/749816}, doi = {10.1155/2015/749816}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ijrc/GuptaGA15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/KenterSP15, author = {Tobias Kenter and Henning Schmitz and Christian Plessl}, title = {Exploring Trade-Offs between Specialized Dataflow Kernels and a Reusable Overlay in a Stereo Matching Case Study}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {859425:1--859425:24}, year = {2015}, url = {https://doi.org/10.1155/2015/859425}, doi = {10.1155/2015/859425}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/KenterSP15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/KhurshidM15, author = {Burhan Khurshid and Roohie Naaz Mir}, title = {High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {518272:1--518272:16}, year = {2015}, url = {https://doi.org/10.1155/2015/518272}, doi = {10.1155/2015/518272}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/KhurshidM15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/MonemiOM15, author = {Alireza Monemi and Chia Yee Ooi and Muhammad Nadzir Marsono}, title = {Low Latency Network-on-Chip Router Microarchitecture Using Request Masking Technique}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {570836:1--570836:13}, year = {2015}, url = {https://doi.org/10.1155/2015/570836}, doi = {10.1155/2015/570836}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ijrc/MonemiOM15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/TownsendAJZ15, author = {Kevin R. Townsend and Osama G. Attia and Phillip H. Jones and Joseph Zambreno}, title = {A Scalable Unsegmented Multiport Memory for FPGA-Based Systems}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {826283:1--826283:12}, year = {2015}, url = {https://doi.org/10.1155/2015/826283}, doi = {10.1155/2015/826283}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/TownsendAJZ15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/VuchaR15, author = {Mahendra Vucha and Arvind Rajawat}, title = {Dynamic Task Distribution Model for On-Chip Reconfigurable High Speed Computing System}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {783237:1--783237:12}, year = {2015}, url = {https://doi.org/10.1155/2015/783237}, doi = {10.1155/2015/783237}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/VuchaR15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/WangSLG15, author = {Gongyu Wang and Greg Stitt and Herman Lam and Alan D. George}, title = {Core-Level Modeling and Frequency Prediction for {DSP} Applications on FPGAs}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {784672:1--784672:20}, year = {2015}, url = {https://doi.org/10.1155/2015/784672}, doi = {10.1155/2015/784672}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/WangSLG15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/ZerbiniF15, author = {Carlos A. Zerbini and Jorge M. Finochietto}, title = {Optimization of Lookup Schemes for Flow-Based Packet Classification on FPGAs}, journal = {Int. J. Reconfigurable Comput.}, volume = {2015}, pages = {673596:1--673596:31}, year = {2015}, url = {https://doi.org/10.1155/2015/673596}, doi = {10.1155/2015/673596}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/ZerbiniF15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.