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@article{DBLP:journals/et/Agrawal97b,
  author       = {Vishwani D. Agrawal},
  title        = {Editorial},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {1},
  pages        = {5},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008287515163},
  doi          = {10.1023/A:1008287515163},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/Agrawal97b.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/Agrawal97c,
  author       = {Vishwani D. Agrawal},
  title        = {Editorial},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {2},
  pages        = {107},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008281020716},
  doi          = {10.1023/A:1008281020716},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/Agrawal97c.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/Agrawal97d,
  author       = {Vishwani D. Agrawal},
  title        = {Editorial},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {3},
  pages        = {195},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008214104633},
  doi          = {10.1023/A:1008214104633},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/Agrawal97d.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/BlantonH97,
  author       = {R. D. (Shawn) Blanton and
                  John P. Hayes},
  title        = {Testability Properties of Divergent Trees},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {3},
  pages        = {197--209},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008262321471},
  doi          = {10.1023/A:1008262321471},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/BlantonH97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/Byrne97,
  author       = {Rodrigue Byrne},
  title        = {Determining Aliasing Probabilities in {BIST} by Counting Strings},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {3},
  pages        = {263--272},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008270523289},
  doi          = {10.1023/A:1008270523289},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/Byrne97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/CarlettaP97,
  author       = {Joan Carletta and
                  Christos A. Papachristou},
  title        = {Behavioral Testability Insertion for Datapath/Controller Circuits},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {1},
  pages        = {9--28},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008291616071},
  doi          = {10.1023/A:1008291616071},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/CarlettaP97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/CattellM97,
  author       = {Kevin Cattell and
                  Jon C. Muzio},
  title        = {Partial Symmetry in Cellular Automata Rule Vectors},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {2},
  pages        = {187--190},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008226724350},
  doi          = {10.1023/A:1008226724350},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/CattellM97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/ChangA97,
  author       = {Hoon Chang and
                  Jacob A. Abraham},
  title        = {An Efficient Critical Path Tracing Algorithm for Designing High Performance
                  Vlsi Systems},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {2},
  pages        = {119--129},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008214321624},
  doi          = {10.1023/A:1008214321624},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/ChangA97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/ChengSW97,
  author       = {Kwang{-}Ting Cheng and
                  Kewal K. Saluja and
                  Hans{-}Joachim Wunderlich},
  title        = {Guest Editorial},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {1},
  pages        = {7--8},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008239632001},
  doi          = {10.1023/A:1008239632001},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/ChengSW97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/FlottesHR97,
  author       = {Marie{-}Lise Flottes and
                  D. Hammad and
                  Bruno Rouzeyre},
  title        = {Improving Testability of Non-Scan Designs during Behavioral Synthesis},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {1},
  pages        = {29--42},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008243700142},
  doi          = {10.1023/A:1008243700142},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/FlottesHR97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/GharaybehBA97,
  author       = {Marwan A. Gharaybeh and
                  Michael L. Bushnell and
                  Vishwani D. Agrawal},
  title        = {Classification and Test Generation for Path-Delay Faults Using Single
                  Struck-at Fault Tests},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {1},
  pages        = {55--67},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008247801050},
  doi          = {10.1023/A:1008247801050},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/GharaybehBA97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/HaehnK97,
  author       = {Steven Haehn and
                  T. S. Kalkur},
  title        = {Failure Analysis of {VLSI} by I\({}_{\mbox{DDQ}}\) Testing},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {3},
  pages        = {273--283},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008222607359},
  doi          = {10.1023/A:1008222607359},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/HaehnK97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/HsuP97,
  author       = {Frank F. Hsu and
                  Janak H. Patel},
  title        = {Design for Testability Using State Distances},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {1},
  pages        = {93--100},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008204118797},
  doi          = {10.1023/A:1008204118797},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/HsuP97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/JoneHD97,
  author       = {Wen{-}Ben Jone and
                  Yun{-}Pan Ho and
                  Sunil R. Das},
  title        = {Delay Fault Coverage Enhancement Using Variable Observation Times},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {2},
  pages        = {131--146},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008266305694},
  doi          = {10.1023/A:1008266305694},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/JoneHD97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/KraussGA97,
  author       = {Peter A. Krauss and
                  Andreas Ganz and
                  Kurt Antreich},
  title        = {Distributed Test Pattern Generation for Stuck-At Faults in Sequential
                  Circuits},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {3},
  pages        = {227--245},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008266422380},
  doi          = {10.1023/A:1008266422380},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/KraussGA97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/KrsticC97,
  author       = {Angela Krstic and
                  Kwang{-}Ting Cheng},
  title        = {Resynthesis of Combinational Circuits for Path Count Reduction and
                  for Path Delay Fault Testability},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {1},
  pages        = {43--54},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008295716980},
  doi          = {10.1023/A:1008295716980},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/et/KrsticC97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/LentzMCH97,
  author       = {Karen Panetta Lentz and
                  Elias S. Manolakos and
                  Edward C. Czeck and
                  Jamie A. Heller},
  title        = {Multiple Experiment Environments for Testing},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {3},
  pages        = {247--262},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008218506450},
  doi          = {10.1023/A:1008218506450},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/LentzMCH97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/Savir97b,
  author       = {Jacob Savir},
  title        = {Reduced Latch Count Shift Registers},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {2},
  pages        = {183--185},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008274607512},
  doi          = {10.1023/A:1008274607512},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/Savir97b.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/SousaC97,
  author       = {Jos{\'{e}} T. de Sousa and
                  Peter Y. K. Cheung},
  title        = {Diagnosis of Boards for Realistic Interconnect Shorts},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {2},
  pages        = {157--171},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008270406603},
  doi          = {10.1023/A:1008270406603},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/SousaC97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/Stroele97,
  author       = {Albrecht P. Stroele},
  title        = {{BIST} Pattern Generators Using Addition and Subtraction Operations},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {1},
  pages        = {69--80},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008299817888},
  doi          = {10.1023/A:1008299817888},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/Stroele97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/Vinnakota97,
  author       = {Bapiraju Vinnakota},
  title        = {Monitoring Power Dissipation for Fault Detection},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {2},
  pages        = {173--181},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008222623441},
  doi          = {10.1023/A:1008222623441},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/Vinnakota97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/WeberS97,
  author       = {Walter W. Weber and
                  Adit D. Singh},
  title        = {Incorporating \emph{I}\({}_{\mbox{DDQ}}\) Testing with {BIST} for
                  Improved Coverage: An Experimental Study},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {2},
  pages        = {147--156},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008218422533},
  doi          = {10.1023/A:1008218422533},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/WeberS97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/Wolf97,
  author       = {Wayne H. Wolf},
  title        = {Redundancy Removal during High-Level Synthesis Using Scheduling Don't-Cares},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {3},
  pages        = {211--225},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008214405542},
  doi          = {10.1023/A:1008214405542},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/Wolf97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/YotsuyanagiKK97,
  author       = {Hiroyuki Yotsuyanagi and
                  Seiji Kajihara and
                  Kozo Kinoshita},
  title        = {Synthesis of Sequential Circuits by Redundancy Removal and Retiming},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {1},
  pages        = {81--92},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008251901959},
  doi          = {10.1023/A:1008251901959},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/YotsuyanagiKK97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/ZarnikNM97,
  author       = {Marina Santo Zarnik and
                  Franc Novak and
                  Srecko Macek},
  title        = {Design for Test of Crystal Oscillators: {A} Case Study},
  journal      = {J. Electron. Test.},
  volume       = {11},
  number       = {2},
  pages        = {109--117},
  year         = {1997},
  url          = {https://doi.org/10.1023/A:1008262204786},
  doi          = {10.1023/A:1008262204786},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/ZarnikNM97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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