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@inproceedings{DBLP:conf/vlsid/AgrawalPM01,
author = {Vikas Agrawal and
Anand Pande and
Mahesh Mehendale},
title = {High Level Synthesis Of Multi-Precision Data Flow Graphs},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {411--416},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902693},
doi = {10.1109/ICVD.2001.902693},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AgrawalPM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ArvindSSPD01,
author = {N. V. Arvind and
P. R. Suresh and
V. Sivakumar and
Chandrani Pal and
Debaprasad Das},
title = {Integrated Crosstalk And Oxide Integrity Analysis In Dsm Designs},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {518--523},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902710},
doi = {10.1109/ICVD.2001.902710},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ArvindSSPD01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BagchiCMC01,
author = {Debabrata Bagchi and
Dipanwita Roy Chowdhury and
Joy Mukherjee and
Santanu Chattopadhyay},
title = {A Novel Strategy to Test Core Based Designs},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {122--127},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902650},
doi = {10.1109/ICVD.2001.902650},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BagchiCMC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BatterywalaN01,
author = {Shabbir H. Batterywala and
H. Narayanan},
title = {Spectral Algorithm To Compute And Synthesize Reduced Order Passive
Models For Arbitrary Rc Multiports},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {500},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902708},
doi = {10.1109/ICVD.2001.902708},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BatterywalaN01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhattacharyaML01,
author = {Mayukh Bhattacharya and
Pinaki Mazumder and
Ronald J. Lomax},
title = {Fd-Tlm Electromagnetic Field Simulation Of High-Speed Iii-V Heterojunction
Bipolar Transistor Digital Logic Gates},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {470--474},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902702},
doi = {10.1109/ICVD.2001.902702},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhattacharyaML01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhavsarT01,
author = {Dilip K. Bhavsar and
Rishan Tan},
title = {Observability Register Architecture For Efficient Production Test
And Debug Of Vlsi Circuits},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {385--390},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902689},
doi = {10.1109/ICVD.2001.902689},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhavsarT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Bhawmik01,
author = {Sudipta Bhawmik},
title = {Introduction to SystemC},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {7--8},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2001.10014},
doi = {10.1109/VLSID.2001.10014},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Bhawmik01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChakrabartyEM01,
author = {Krishnendu Chakrabarty and
Andrew Exnicios and
Rajatish Mukherjee},
title = {Synthesis Of Transparent Circuits For Hierarchical An System-On-A-Chip
Test},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {431},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902696},
doi = {10.1109/ICVD.2001.902696},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChakrabartyEM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChakrabortyM01,
author = {Supratik Chakraborty and
Rajeev Murgai},
title = {Complexity Of Minimum-Delay Gate Resizing},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {425--430},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902695},
doi = {10.1109/ICVD.2001.902695},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/ChakrabortyM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ClouqueurEST01,
author = {Thomas Clouqueur and
Ozen Ercevik and
Kewal K. Saluja and
Hiroshi Takahashi},
title = {Efficient Signature-Based Fault Diagnosis Using Variable Size Windows},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {391--396},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902690},
doi = {10.1109/ICVD.2001.902690},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ClouqueurEST01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DSouzaH01,
author = {Anand L. D'Souza and
Michael S. Hsiao},
title = {Error Diagnosis of Sequential Circuits Using Region-Based Mode},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {103},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902647},
doi = {10.1109/ICVD.2001.902647},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DSouzaH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DalalR01,
author = {Vishal Dalal and
C. P. Ravikumar},
title = {Software Power Optimizations In An Embedded System},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {254},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902669},
doi = {10.1109/ICVD.2001.902669},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DalalR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DanckaertKCMT01,
author = {Koen Danckaert and
Chidamber Kulkarni and
Francky Catthoor and
Hugo De Man and
Vivek Tiwari},
title = {A Systematic Approach for System Bus Load Reduction Applied to Medical
Imaging},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {48},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902639},
doi = {10.1109/ICVD.2001.902639},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DanckaertKCMT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DasBOF01,
author = {Debesh Kumar Das and
Bhargab B. Bhattacharya and
Satoshi Ohtake and
Hideo Fujiwara},
title = {Testable Design of Sequential Circuits with Improved Fault Efficiency},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {128--133},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902651},
doi = {10.1109/ICVD.2001.902651},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DasBOF01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DattaCBTD01,
author = {Anupam Datta and
Sidharth Choudhury and
Anupam Basu and
Hiroyuki Tomiyama and
Nikil D. Dutt},
title = {Satisfying Timing Constraints of Preemptive Real-Time Tasks through
Task Layout Technique},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {97--102},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902646},
doi = {10.1109/ICVD.2001.902646},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DattaCBTD01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DebHOPL01,
author = {Abhijit K. Deb and
Ahmed Hemani and
Johnny {\"{O}}berg and
Adam Postula and
Dan Lindqvist},
title = {Hardware Software Codesign of {DSP} System Using Grammar Based Approach},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {42--47},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902638},
doi = {10.1109/ICVD.2001.902638},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DebHOPL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DelaurentiGMPZ01,
author = {Marco Delaurenti and
Mariagrazia Graziano and
Guido Masera and
Gianluca Piccinini and
Maurizio Zamboni},
title = {Switching Noise Analysis Framework For High Speed Logic Families},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {524--530},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902711},
doi = {10.1109/ICVD.2001.902711},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DelaurentiGMPZ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DemirLR01,
author = {Alper Demir and
David E. Long and
Jaijeet S. Roychowdhury},
title = {Computing Phase Noise Eigenfunctions Directly from Harmonic Balance/Shooting
Matrices},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {283},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902674},
doi = {10.1109/ICVD.2001.902674},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DemirLR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DuarteVIK01,
author = {David Duarte and
Narayanan Vijaykrishnan and
Mary Jane Irwin and
Mahmut T. Kandemir},
title = {Formulation and Validation of an Energy Dissipation Model for the
Clock Generation Circuitry and Distribution Networks},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {248--253},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902668},
doi = {10.1109/ICVD.2001.902668},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DuarteVIK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/FukaseESN01,
author = {Masa{-}Aki Fukase and
Ryusuke Egawa and
Tomoaki Sato and
Tadao Nakamura},
title = {Scaling Up Of Wave Pipelines},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {439--445},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902697},
doi = {10.1109/ICVD.2001.902697},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/FukaseESN01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GanesanV01,
author = {Sree Ganesan and
Ranga Vemuri},
title = {Library Binding for High-Level Synthesis of Analog Systems},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {261--268},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902671},
doi = {10.1109/ICVD.2001.902671},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GanesanV01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuntherD01,
author = {Wolfgang G{\"{u}}nther and
Rolf Drechsler},
title = {Implementation of Read- k-times BDDs on Top of Standard {BDD} Packages},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {173--178},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902657},
doi = {10.1109/ICVD.2001.902657},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuntherD01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuntherD01a,
author = {Wolfgang G{\"{u}}nther and
Rolf Drechsler},
title = {Performance Driven Optimization for {MUX} based FPGAs},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {311--316},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902678},
doi = {10.1109/ICVD.2001.902678},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuntherD01a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuoPR01,
author = {Ruifeng Guo and
Irith Pomeranz and
Sudhakar M. Reddy},
title = {On Improving Static Test Compaction for Sequential Circuits},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {111--116},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902648},
doi = {10.1109/ICVD.2001.902648},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuoPR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuptaKWB01,
author = {Ram Lakhan Gupta and
Anshul Kumar and
Aalbert Van Der Werf and
Natalino G. Bus{\'{a}}},
title = {Synthesizing {A} Long Latency Unit Within Vliw Processor},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {460},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902700},
doi = {10.1109/ICVD.2001.902700},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuptaKWB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GupteMRN01,
author = {Ajit Gupte and
Mahesh Mehendale and
Ramesh Ramamritham and
Deepa Nair},
title = {Performance Considerations in Embedded {DSP} based System-On-a-Chip
Designs},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {36--41},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902637},
doi = {10.1109/ICVD.2001.902637},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GupteMRN01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HaldarNCBS01,
author = {Malay Haldar and
Anshuman Nayak and
Alok N. Choudhary and
Prithviraj Banerjee and
U. Nagaraj Shenoy},
title = {Fpga Hardware Synthesis From Matlab},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {299--304},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902676},
doi = {10.1109/ICVD.2001.902676},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HaldarNCBS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HarjaniH01,
author = {Ramesh Harjani and
Jackson Harvey},
title = {Tutorial: {CMOS} Analog Circuits for Wireless Communications},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {18},
publisher = {{IEEE} Computer Society},
year = {2001},
timestamp = {Tue, 21 Apr 2015 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/HarjaniH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HarveyH01,
author = {Jackson Harvey and
Ramesh Harjani},
title = {An Integrated Quadrature Mixer with Improved Image Rejection at Low
Voltage},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {269--273},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902672},
doi = {10.1109/ICVD.2001.902672},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HarveyH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HillebrandSS01,
author = {Mark A. Hillebrand and
Thomas Schurger and
Peter{-}Michael Seidel},
title = {How to Half Wire Lengths in the Layout of Cyclic Shifter},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {339--344},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902682},
doi = {10.1109/ICVD.2001.902682},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HillebrandSS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HuangJD01,
author = {Der{-}Cheng Huang and
Wen{-}Ben Jone and
Sunil R. Das},
title = {An Efficient Parallel Transparent Bist Method For Multiple Embedded
Memory Buffers},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {379--384},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902688},
doi = {10.1109/ICVD.2001.902688},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HuangJD01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HuangJD01a,
author = {Der{-}Cheng Huang and
Wen{-}Ben Jone and
Sunil R. Das},
title = {A Parallel Built-In Self-Diagnostic Method For Embedded Memory Buffers},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {397--402},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902691},
doi = {10.1109/ICVD.2001.902691},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HuangJD01a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainBK01,
author = {Manoj Kumar Jain and
M. Balakrishnan and
Anshul Kumar},
title = {{ASIP} Design Methodologies : Survey and Issues},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {76},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902643},
doi = {10.1109/ICVD.2001.902643},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainBK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JarwalM01,
author = {R. K. Jarwal and
Durga Misra},
title = {Degradation Of Nmosfets During High-Field Injection With Reverse Biased
Voltage At Source And Drain Junctions},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {485--490},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902705},
doi = {10.1109/ICVD.2001.902705},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JarwalM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JoshiHK01,
author = {Rajiv V. Joshi and
Wei Hwang and
Andreas Kuehlmann},
title = {Design Of Provably Correct Storage Arrays},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {196},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902660},
doi = {10.1109/ICVD.2001.902660},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JoshiHK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KamdarGJM01,
author = {Ruchira Kamdar and
Seetharam Gundurao and
Rajiv V. Joshi and
N. S. Murty},
title = {IBM's Blue Logic Design Methodology-Circuits and Physical Design},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {11--12},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2001.10013},
doi = {10.1109/VLSID.2001.10013},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KamdarGJM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Kataria01,
author = {Deepak Kataria},
title = {Next Generation Network Processors},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {13--15},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2001.10015},
doi = {10.1109/VLSID.2001.10015},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Kataria01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Keitel-ShulzWCP01,
author = {Doris Keitel{-}Schulz and
Norbert Wehn and
Francky Catthoor and
Preeti Ranjan Panda},
title = {Embedded Memories in System Design: Technology, Application, Design
and Tools},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {5--6},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2001.10005},
doi = {10.1109/VLSID.2001.10005},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Keitel-ShulzWCP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KimSA01,
author = {Yong Chang Kim and
Kewal K. Saluja and
Vishwani D. Agrawal},
title = {Combinational Test Generation for Acyclic SequentialCircuits using
a Balanced {ATPG} Model},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {143--148},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902653},
doi = {10.1109/ICVD.2001.902653},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KimSA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KrishnamacharyAT01,
author = {Arun Krishnamachary and
Jacob A. Abraham and
Raghuram S. Tupuri},
title = {Timing Verification and Delay Test Generation for Hierarchical Designs},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {157--162},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902655},
doi = {10.1109/ICVD.2001.902655},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KrishnamacharyAT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarS01,
author = {Pavan Kumar and
Mani B. Srivastava},
title = {Power-aware Multimedia Systems using Run-time Prediction},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {64--69},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902641},
doi = {10.1109/ICVD.2001.902641},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LahiriDR01,
author = {Kanishka Lahiri and
Sujit Dey and
Anand Raghunathan},
title = {Evaluation of the Traffic-Performance Characteristics of System-on-Chip
Communication Architectures},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {29--35},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902636},
doi = {10.1109/ICVD.2001.902636},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LahiriDR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LajoloRV01,
author = {Marcello Lajolo and
Matteo Sonza Reorda and
Massimo Violante},
title = {Early Evaluation Of Bus Interconnects Dependability For System-On-Chip
Designs},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {371},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902687},
doi = {10.1109/ICVD.2001.902687},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LajoloRV01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LeleN01,
author = {Abhijit M. Lele and
S. K. Nandy},
title = {Architecture of Reconfigurable a Low Power Gigabit {AT} Switch},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {242--247},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902667},
doi = {10.1109/ICVD.2001.902667},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LeleN01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MehendaleA01,
author = {Mahesh Mehendale and
Santhosh Kumar Amanna},
title = {Functional Verification of Programmable {DSP} Cores},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {16--17},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2001.10010},
doi = {10.1109/VLSID.2001.10010},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MehendaleA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MenezesS01,
author = {Noel Menezes and
Sachin S. Sapatnekar},
title = {Optimization and Analysis Techniques for the Deep Submicron Regime},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {3--4},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2001.10019},
doi = {10.1109/VLSID.2001.10019},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MenezesS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MinBCESWC01,
author = {Rex Min and
Manish Bhardwaj and
Seong{-}Hwan Cho and
Eugene Shih and
Amit Sinha and
Alice Wang and
Anantha P. Chandrakasan},
title = {Low-Power Wireless Sensor Networks},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {205--210},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902661},
doi = {10.1109/ICVD.2001.902661},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MinBCESWC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MishraGDN01,
author = {Prabhat Mishra and
Peter Grun and
Nikil D. Dutt and
Alexandru Nicolau},
title = {Processor-Memory Co-Exploration driven by a Memory-Aware Architecture
Description Language},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {70--75},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902642},
doi = {10.1109/ICVD.2001.902642},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MishraGDN01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MohanB01,
author = {Sanjay Mohan and
Michael L. Bushnell},
title = {A Code Transition Delay Model for {ADC} Test},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {274--282},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902673},
doi = {10.1109/ICVD.2001.902673},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MohanB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MohapatraDDR01,
author = {Nihar R. Mohapatra and
Arijit Dutta and
Madhav P. Desai and
V. Ramgopal Rao},
title = {Effect Of Fringing Capacitances In Sub 100 Nm Mosfet's With High-K
Gate Dielectrics},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {479},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902704},
doi = {10.1109/ICVD.2001.902704},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MohapatraDDR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MurugavelRCC01,
author = {Ashok K. Murugavel and
N. Ranganathan and
Ramamurti Chandramouli and
Srinath Chavali},
title = {Average Power in Digital {CMOS} Circuits using Least Square Estimation},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {215--220},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902663},
doi = {10.1109/ICVD.2001.902663},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MurugavelRCC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NairGD01,
author = {Pratheep A. Nair and
Anubhav Gupta and
Madhav P. Desai},
title = {An On-Chip Coupling Capacitance Measurement Technique},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {495--499},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902707},
doi = {10.1109/ICVD.2001.902707},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NairGD01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NalamasuWCBKK01,
author = {Omkaram Nalamasu and
Pat G. Watson and
Raymond A. Cirelli and
Jeff Bude and
Isik C. Kizilyalli and
Ross A. Kohler},
title = {Invited Paper: Extending Resolution Limits of {IC} Fabrication Technology:
Demonstration by Device Fabrication and Circuit Performance},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {469},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902701},
doi = {10.1109/ICVD.2001.902701},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NalamasuWCBKK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NsBC01,
author = {Nagaraj Ns and
Poras T. Balsara and
Cyrus D. Cantrell},
title = {Crosstalk Noise Verification in Digital Designs with Interconnect
Process Variations},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {365--370},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902686},
doi = {10.1109/ICVD.2001.902686},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NsBC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PamunuwaT01,
author = {Dinesh Pamunuwa and
Hannu Tenhunen},
title = {Repeater Insertion To Minimise Delay In Coupled Interconnects},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {513--517},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902709},
doi = {10.1109/ICVD.2001.902709},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PamunuwaT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PanigrahiDRLCR01,
author = {Debashis Panigrahi and
Sujit Dey and
Ramesh R. Rao and
Kanishka Lahiri and
Carla{-}Fabiana Chiasserini and
Anand Raghunathan},
title = {Battery Life Estimation of Mobile Embedded Systems},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {57--63},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902640},
doi = {10.1109/ICVD.2001.902640},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PanigrahiDRLCR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PhanseS01,
author = {Siddharth R. Phanse and
R. K. Shyamasundar},
title = {Application of Esterel for Modelling and Verification of Cachet Protocol
on {CRF} Memory Model},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {179--188},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902658},
doi = {10.1109/ICVD.2001.902658},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PhanseS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PotlapallyHRLC01,
author = {Nachiketh R. Potlapally and
Michael S. Hsiao and
Anand Raghunathan and
Ganesh Lakshminarayana and
Srimat T. Chakradhar},
title = {Accurate Power Macro-modeling Techniques for Complex {RTL} Circuits},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {235--241},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902666},
doi = {10.1109/ICVD.2001.902666},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PotlapallyHRLC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PrasadGS01,
author = {B. Prasad and
P. J. George and
Chandra Shekhar},
title = {High Frequency Behaviour Of Electron Transport In Silicon And Its
Implication For Drain Conductance Of Mos Transistors},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {491--494},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902706},
doi = {10.1109/ICVD.2001.902706},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PrasadGS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RaghunathanD01,
author = {Anand Raghunathan and
Sujit Dey},
title = {Low-Power Mobile Wireless Communication System Design: Protocols,
Architectures, and Design Methodologies},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {9--10},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2001.10011},
doi = {10.1109/VLSID.2001.10011},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RaghunathanD01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RanganathaS01,
author = {V. Ranganatha and
R. Sunda},
title = {System Level Testability Issues of Core Based System-on-a-Chip},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {18},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2001.10017},
doi = {10.1109/VLSID.2001.10017},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RanganathaS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RastogiBK01,
author = {Anupam Rastogi and
M. Balakrishnan and
Anshul Kumar},
title = {Integrating Communication Cost Estimation in Embedded Systems Design
: {A} {PCI} Case Study},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {23--28},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902635},
doi = {10.1109/ICVD.2001.902635},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RastogiBK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RaviJ01,
author = {Srivaths Ravi and
Niraj K. Jha},
title = {Synthesis of System-on-a-chip for Testability},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {149--156},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902654},
doi = {10.1109/ICVD.2001.902654},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RaviJ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SahulaR01,
author = {Vineet Sahula and
C. P. Ravikumar},
title = {The Hierarchical Concurrent Flow Graph Approach for Modeling and Analysis
of Design Processes},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {91--96},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902645},
doi = {10.1109/ICVD.2001.902645},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SahulaR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SenguptaRCG01,
author = {Sabyasachi Sengupta and
Somavalli Ramanathan and
Biswadeep Chatterjee and
Dibyendu Goswami},
title = {Minimizing Area and Maximizing Porosity for Cell Layouts Using Innovative
Routing Strategies},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {353--358},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902684},
doi = {10.1109/ICVD.2001.902684},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SenguptaRCG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SharmaH01,
author = {Sameer Sharma and
Michael S. Hsiao},
title = {Combination of Structural and State Analysis for Partial Scan},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {134},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902652},
doi = {10.1109/ICVD.2001.902652},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SharmaH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShenoyBCK01,
author = {U. Nagaraj Shenoy and
Prithviraj Banerjee and
Alok N. Choudhary and
Mahmut T. Kandemir},
title = {Efficient Synthesis of Array Intensive Computations onto {FPGA} Based
Accelerators},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {305--310},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902677},
doi = {10.1109/ICVD.2001.902677},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShenoyBCK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShrivastavMRVAFHE01,
author = {G. Shrivastav and
S. Mahapatra and
V. Ramgopal Rao and
J. Vasi and
K. G. Anil and
C. Fink and
Walter Hansch and
I. Eisele},
title = {erformance Optimization Of 60 Nm Channel Length Vertical Mosfets Using
Channel Engineering},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {475--478},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902703},
doi = {10.1109/ICVD.2001.902703},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShrivastavMRVAFHE01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SikdarMCG01,
author = {Biplab K. Sikdar and
Purnabha Majumder and
Parimal Pal Chaudhuri and
Niloy Ganguly},
title = {Design Of Multiple Attractor Gf (2p) Cellular AutomataFor Diagnosis
Of Vlsi Circuits},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {454--459},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902699},
doi = {10.1109/ICVD.2001.902699},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SikdarMCG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SikdarMMCDG01,
author = {Biplab K. Sikdar and
Purnabha Majumder and
Monalisa Mukherjee and
Parimal Pal Chaudhuri and
Debesh K. Das and
Niloy Ganguly},
title = {Hierarchical Cellular Automata As An On-Chip Test Pattern Generator},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {403},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902692},
doi = {10.1109/ICVD.2001.902692},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SikdarMMCDG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SinhaC01,
author = {Amit Sinha and
Anantha P. Chandrakasan},
title = {Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {221--226},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902664},
doi = {10.1109/ICVD.2001.902664},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SinhaC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SinhaSD01,
author = {Koushik Sinha and
Susmita Sur{-}Kolay and
Bhargab B. Bhattacharya and
P. S. Dasgupta},
title = {Partitioning Routing Area into Zones with Distinct Pins},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {345},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902683},
doi = {10.1109/ICVD.2001.902683},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SinhaSD01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SoelemanRP01,
author = {Hendrawan Soeleman and
Kaushik Roy and
Bipul Chandra Paul},
title = {Sub-Domino Logic: Ultra-Low Power Dynamic Sub-Threshold Digital Logic},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {211--214},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902662},
doi = {10.1109/ICVD.2001.902662},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SoelemanRP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SubramanianR01,
author = {V. Sankara Subramanian and
C. P. Ravikumar},
title = {Estimating Crosstalk From Vlsi Layouts},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {531},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902712},
doi = {10.1109/ICVD.2001.902712},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SubramanianR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SundararamanGV01,
author = {Sujatha Sundararaman and
Sriram Govindarajan and
Ranga Vemuri},
title = {Application Specific Macro Based Synthesis},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {317},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902679},
doi = {10.1109/ICVD.2001.902679},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SundararamanGV01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SurendraNS01,
author = {G. Surendra and
S. K. Nandy and
Paul Sathya},
title = {ReDeEm{\_}RTL: {A} Software Tool for Customizing Soft Cells for Embedded
Applications},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {85--90},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902644},
doi = {10.1109/ICVD.2001.902644},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SurendraNS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TripathiBSP01,
author = {Nikhil Tripathi and
Amit M. Bhosle and
Debasis Samanta and
Ajit Pal},
title = {Optimal Assignment of High Threshold Voltage for Synthesizing Dual
Threshold {CMOS} Circuits},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {227},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902665},
doi = {10.1109/ICVD.2001.902665},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TripathiBSP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WangA01,
author = {Lingli Wang and
A. E. A. Almaini},
title = {Multilevel Logic Minimization Using Functional Don't Cares},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {417--424},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902694},
doi = {10.1109/ICVD.2001.902694},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WangA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WeissSME01,
author = {Mark W. Weiss and
Sharad C. Seth and
Shashank K. Mehta and
Kent L. Einspahr},
title = {Design Verification and Functional Testing of FiniteState Machines},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {189--195},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902659},
doi = {10.1109/ICVD.2001.902659},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WeissSME01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WormLW01,
author = {Alexander Worm and
Holger Lamm and
Norbert Wehn},
title = {Vlsi Architectures For High-Speed Map Decoders},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {446--453},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902698},
doi = {10.1109/ICVD.2001.902698},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WormLW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/XuMB01,
author = {Qinwei Xu and
Pinaki Mazumder and
Mayukh Bhattacharya},
title = {Modeling of Nonuniform Interconnects by Using Differential Quadrature
Method},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {327--332},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902680},
doi = {10.1109/ICVD.2001.902680},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/XuMB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/XuML01,
author = {Qinwei Xu and
Pinaki Mazumder and
Zheng{-}Fan Li},
title = {Transmission Line Modeling by Modified Method of Characteristics},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {359--364},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902685},
doi = {10.1109/ICVD.2001.902685},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/XuML01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/YadavalliK01,
author = {Sitaram Yadavalli and
Sandip Kundu},
title = {On Fault-Simulation Through Embedded Memories On Large Industrial
Designs},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {117--121},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902649},
doi = {10.1109/ICVD.2001.902649},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/YadavalliK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Yan01,
author = {Kenneth Yan},
title = {Logic Synthesis for CPLDs and FPGAs with PLA-Style Logic Blocks},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {291--298},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902675},
doi = {10.1109/ICVD.2001.902675},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Yan01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ZachariahC01,
author = {Sujit T. Zachariah and
Sreejit Chakravarty},
title = {A Novel Algorithm for Multi-Node Bridge Analysis of Large {VLSI} Circuits},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {333--338},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902681},
doi = {10.1109/ICVD.2001.902681},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ZachariahC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ZhaoNP01,
author = {Jian{-}Kun Zhao and
Jeffrey A. Newquist and
Janak H. Patel},
title = {A Graph Traversal Based Framework For Sequential Logic Implication
With An Application To C-Cycle Redundancy Identification},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {163},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902656},
doi = {10.1109/ICVD.2001.902656},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ZhaoNP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsid/2001,
title = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://ieeexplore.ieee.org/xpl/conhome/7234/proceeding},
isbn = {0-7695-0831-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/2001.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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