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@inproceedings{DBLP:conf/vlsi/AlbinagortaCCR19,
author = {Kevin A. C{\'{a}}ceres Albinagorta and
Calebe Concei{\c{c}}{\~{a}}o and
Carlos Silva C{\'{a}}rdenas and
Ricardo A. L. Reis},
title = {Exploring area and total wirelength using a cell merging technique},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {329--334},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920337},
doi = {10.1109/VLSI-SOC.2019.8920337},
timestamp = {Fri, 13 Dec 2019 13:34:41 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/AlbinagortaCCR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/AliKJA19,
author = {Ashfakh Ali and
Sai Kiran and
Arpan Jain and
Zia Abbas},
title = {A 47nW, 0.7-3.6V wide Supply Range, Resistor Based Temperature Sensor
for IoT Applications},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {293--298},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920345},
doi = {10.1109/VLSI-SOC.2019.8920345},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/AliKJA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/AtishayGSTB19,
author = {Atishay and
Ankit Gupta and
Rashmi Sonawat and
Helik Kanti Thacker and
Prasanth B},
title = {{SEARS:} {A} Statistical Error and Redundancy Analysis Simulator},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {117--122},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920344},
doi = {10.1109/VLSI-SOC.2019.8920344},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/AtishayGSTB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/BandeiraORRO19,
author = {Vitor V. Bandeira and
Isadora Oliveira and
Felipe da Rosa and
Ricardo A. L. Reis and
Luciano Ost},
title = {Soft Error Reliability Analysis of Autonomous Vehicles Software Stack},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {253--254},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920372},
doi = {10.1109/VLSI-SOC.2019.8920372},
timestamp = {Thu, 13 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/BandeiraORRO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/BandeiraRRO19,
author = {Vitor V. Bandeira and
Felipe Rosa and
Ricardo Augusto da Luz Reis and
Luciano Ost},
title = {Non-intrusive Fault Injection Techniques for Efficient Soft Error
Vulnerability Analysis},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {123--128},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920378},
doi = {10.1109/VLSI-SOC.2019.8920378},
timestamp = {Thu, 13 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/BandeiraRRO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/BoccoJ0DDF19,
author = {Andrea Bocco and
Tiago T. Jost and
Albert Cohen and
Florent de Dinechin and
Yves Durand and
Christian Fabre},
title = {Byte-Aware Floating-point Operations through a {UNUM} Computing Unit},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {323--328},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920387},
doi = {10.1109/VLSI-SOC.2019.8920387},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/BoccoJ0DDF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/BosioH019,
author = {Alberto Bosio and
Wilson{-}Javier P{\'{e}}rez{-}Holgu{\'{\i}}n and
Ernesto S{\'{a}}nchez},
title = {Exploiting Approximate Computing to Increase System Lifetime},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {311--316},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920315},
doi = {10.1109/VLSI-SOC.2019.8920315},
timestamp = {Thu, 18 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/BosioH019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/BrendlerZMR19,
author = {Leonardo Heitich Brendler and
Alexandra L. Zimpeck and
Cristina Meinhardt and
Ricardo A. L. Reis},
title = {Evaluation of {SET} under Process Variability on FinFET Multi-level
Design},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {179--184},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920336},
doi = {10.1109/VLSI-SOC.2019.8920336},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/BrendlerZMR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/BrendlerZMR19a,
author = {Leonardo Heitich Brendler and
Alexandra L. Zimpeck and
Cristina Meinhardt and
Ricardo A. L. Reis},
title = {Impact of Process Variability and Single Event Transient on FinFET
Technology},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {249--250},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920355},
doi = {10.1109/VLSI-SOC.2019.8920355},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/BrendlerZMR19a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/BrikLCOI19,
author = {Adil Brik and
Lioua Labrak and
Laurent Carrel and
Ian O'Connor and
Ramy Iskander},
title = {Fast extraction of predictive models for integrated circuits using
n-performance Pareto fronts},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {281--286},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920305},
doi = {10.1109/VLSI-SOC.2019.8920305},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/BrikLCOI19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ChenMG19,
author = {Yu{-}Cheng Chen and
Vincent John Mooney and
Santiago Grijalva},
title = {A Survey of Attack Models for Cyber-Physical Security Assessment in
Electricity Grid},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {242--243},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920326},
doi = {10.1109/VLSI-SOC.2019.8920326},
timestamp = {Sun, 24 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/ChenMG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ConceicaoR19,
author = {Calebe Micael de Oliveira Concei{\c{c}}{\~{a}}o and
Ricardo Augusto da Luz Reis},
title = {Netlist Optimization by Gate Merging},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {236--237},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920291},
doi = {10.1109/VLSI-SOC.2019.8920291},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/ConceicaoR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/CoutinhoGENS19,
author = {Demetrios A. M. Coutinho and
Kyriakos Georgiou and
Kerstin I. Eder and
Jos{\'{e}} L. N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez and
Samuel Xavier de Souza},
title = {Performance and Energy Efficiency Trade-Offs in Single-ISA Heterogeneous
Multi-Processing for Parallel Applications},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {232--233},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920384},
doi = {10.1109/VLSI-SOC.2019.8920384},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/CoutinhoGENS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/DamljanovicSGJ19,
author = {Aleksa Damljanovic and
Giovanni Squillero and
Cemil Cem G{\"{u}}rsoy and
Maksim Jenihhin},
title = {On NBTI-induced Aging Analysis in {IEEE} 1687 Reconfigurable Scan
Networks},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {335--340},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920313},
doi = {10.1109/VLSI-SOC.2019.8920313},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/DamljanovicSGJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/EliaPT19,
author = {Rafaella Elia and
George Plastiras and
Theocharis Theocharides},
title = {Towards an Embedded and Real-Time Joint Human-Machine Monitoring Framework:
Dataset optimization Techniques for Anomaly Detection},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {341--346},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920298},
doi = {10.1109/VLSI-SOC.2019.8920298},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/EliaPT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/FalasKM19,
author = {Solon Falas and
Charalambos Konstantinou and
Maria K. Michael},
title = {A Hardware-based Framework for Secure Firmware Updates on Embedded
Systems},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {198--203},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920348},
doi = {10.1109/VLSI-SOC.2019.8920348},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/FalasKM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/FeitozaBM19,
author = {Renato S. Feitoza and
Manuel J. Barrag{\'{a}}n and
Salvador Mir},
title = {Reduced-Code Techniques for On-Chip Static Linearity Test of {SAR}
ADCs},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {263--268},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920377},
doi = {10.1109/VLSI-SOC.2019.8920377},
timestamp = {Wed, 28 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/FeitozaBM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/FesquetDJLRDBME19,
author = {Laurent Fesquet and
Yoan Decoudu and
Alexis Rodrigo Iga Jadue and
Thiago Ferreira de Paiva Leite and
Otto Aureliano Rolloff and
M. Diallo and
Rodrigo Possamai Bastos and
Katell Morin{-}Allory and
Sylvain Engels},
title = {A Distributed Body-Biasing Strategy for Asynchronous Circuits},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {27--32},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920340},
doi = {10.1109/VLSI-SOC.2019.8920340},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/FesquetDJLRDBME19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/FettweisMWHDNH19,
author = {Gerhard P. Fettweis and
Emil Mat{\'{u}}s and
Robert Wittig and
Mattis Hasler and
Stefan A. Damjancevic and
Seungseok Nam and
Sebastian Haas},
title = {5G-and-Beyond Scalable Machines},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {105--109},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920308},
doi = {10.1109/VLSI-SOC.2019.8920308},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/FettweisMWHDNH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ForlinRS19,
author = {Bruno Forlin and
Cezar Reinbrecht and
Johanna Sep{\'{u}}lveda},
title = {Attacking Real-time MPSoCs: Preemptive NoCs are Vulnerable},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {204--209},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920363},
doi = {10.1109/VLSI-SOC.2019.8920363},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/ForlinRS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/GauchiKVNBMC19,
author = {Roman Gauchi and
Maha Kooli and
Pascal Vivet and
Jean{-}Philippe No{\"{e}}l and
Edith Beign{\'{e}} and
Subhasish Mitra and
Henri{-}Pierre Charles},
title = {Memory Sizing of a Scalable {SRAM} In-Memory Computing Tile Based
Architecture},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {166--171},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920373},
doi = {10.1109/VLSI-SOC.2019.8920373},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/GauchiKVNBMC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/GenerGU19,
author = {Y. Serhan Gener and
Sezer G{\"{o}}ren and
H. Fatih Ugurdag},
title = {Lossless Look-Up Table Compression for Hardware Implementation of
Transcendental Functions},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {52--57},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920330},
doi = {10.1109/VLSI-SOC.2019.8920330},
timestamp = {Tue, 16 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/GenerGU19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/GerlachVB19,
author = {Lukas Gerlach and
Guillermo Pay{\'{a}} Vay{\'{a}} and
Holger Blume},
title = {{KAVUAKA:} {A} Low Power Application Specific Hearing Aid Processor},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {99--104},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920354},
doi = {10.1109/VLSI-SOC.2019.8920354},
timestamp = {Tue, 01 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/GerlachVB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/GhasempouriMDPF19,
author = {Tara Ghasempouri and
Jan Malburg and
Alessandro Danese and
Graziano Pravadelli and
G{\"{o}}rschwin Fey and
Jaan Raik},
title = {Engineering of an Effective Automatic Dynamic Assertion Mining Platform},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {111--116},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920331},
doi = {10.1109/VLSI-SOC.2019.8920331},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/GhasempouriMDPF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/GoreCGG19,
author = {Ganesh Gore and
Patsy Cadareanu and
Edouard Giacomin and
Pierre{-}Emmanuel Gaillardon},
title = {A Predictive Process Design Kit for Three-Independent-Gate Field-Effect
Transistors},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {172--177},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920358},
doi = {10.1109/VLSI-SOC.2019.8920358},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/GoreCGG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/GrossoRCR19,
author = {Michelangelo Grosso and
Salvatore Rinaudo and
Andrea Casalino and
Matteo Sonza Reorda},
title = {Software-Based Self-Test for Transition Faults: a Case Study},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {76--81},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920306},
doi = {10.1109/VLSI-SOC.2019.8920306},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/GrossoRCR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/GuHZF19,
author = {Chenhao Gu and
Leilei Huang and
Xiaoyang Zeng and
Yibo Fan},
title = {A Micro-Code-Based Hardware Architecture of Integer Motion Estimation
for {HEVC}},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {269--274},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920393},
doi = {10.1109/VLSI-SOC.2019.8920393},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/GuHZF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/HsiehSD19,
author = {Chen{-}Ying Hsieh and
Ardalan Amiri Sani and
Nikil D. Dutt},
title = {{SURF:} Self-aware Unified Runtime Framework for Parallel Programs
on Heterogeneous Mobile Architectures},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {136--141},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920374},
doi = {10.1109/VLSI-SOC.2019.8920374},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/HsiehSD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/Inoue19,
author = {Keisuke Inoue},
title = {An ILP-based Optimization Method for Radiation Hardened Register and
{ECC} Mixed Architectures},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {71--74},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920356},
doi = {10.1109/VLSI-SOC.2019.8920356},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/Inoue19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/IranfarSZOSA19,
author = {Arman Iranfar and
Wellington Silva de Souza and
Marina Zapater and
Katzalin Olcoz and
Samuel Xavier de Souza and
David Atienza},
title = {A Machine Learning-Based Framework for Throughput Estimation of Time-Varying
Applications in Multi-Core Servers},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {211--216},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920309},
doi = {10.1109/VLSI-SOC.2019.8920309},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/IranfarSZOSA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/JacquemodWLFPB19,
author = {Gilles Jacquemod and
Zhaopeng Wei and
Yves Leduc and
Emeric de Foucauld and
J{\'{e}}r{\^{o}}me Prouv{\'{e}}e and
B. Blampey},
title = {New design of analog and mixed-signal cells using back-gate cross-coupled
structure},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {21--26},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920390},
doi = {10.1109/VLSI-SOC.2019.8920390},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/JacquemodWLFPB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/JadueEF19,
author = {Alexis Rodrigo Iga Jadue and
Sylvain Engels and
Laurent Fesquet},
title = {A Digital Event-Based Strategy for {ASK} demodulation},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {244--245},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920304},
doi = {10.1109/VLSI-SOC.2019.8920304},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/JadueEF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/KirbyGRC19,
author = {Robert Kirby and
Saad Godil and
Rajarshi Roy and
Bryan Catanzaro},
title = {CongestionNet: Routing Congestion Prediction Using Deep Graph Neural
Networks},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {217--222},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920342},
doi = {10.1109/VLSI-SOC.2019.8920342},
timestamp = {Mon, 07 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/KirbyGRC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/LimnaiosSK19,
author = {Stavros Limnaios and
Nicolas Sklavos and
Odysseas G. Koufopavlou},
title = {Lightweight Efficient Simeck32/64 Crypto-Core Designs and Implementations,
for IoT Security},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {275--280},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920349},
doi = {10.1109/VLSI-SOC.2019.8920349},
timestamp = {Fri, 15 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/LimnaiosSK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/LuGF19,
author = {Qi Lu and
Amir Masoud Gharehbaghi and
Masahiro Fujita},
title = {Approximate Arithmetic Circuit Design Using a Fast and Scalable Method},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {65--70},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920365},
doi = {10.1109/VLSI-SOC.2019.8920365},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/LuGF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MachSZB19,
author = {Stefan Mach and
Fabian Schuiki and
Florian Zaruba and
Luca Benini},
title = {A 0.80pJ/flop, 1.24Tflop/sW 8-to-64 bit Transprecision Floating-Point
Unit for a 64 bit {RISC-V} Processor in 22nm {FD-SOI}},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {95--98},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920307},
doi = {10.1109/VLSI-SOC.2019.8920307},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/MachSZB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MarquesMRLGBL19,
author = {Sandro Matheus V. N. Marques and
Thiarles S. Medeiros and
F{\'{a}}bio Diniz Rossi and
Marcelo Caggiani Luizelli and
Alessandro Gon{\c{c}}alves Girardi and
Antonio Carlos Schneider Beck and
Arthur Francisco Lorenzon},
title = {The Impact of Turbo Frequency on the Energy, Performance, and Aging
of Parallel Applications},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {149--154},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920389},
doi = {10.1109/VLSI-SOC.2019.8920389},
timestamp = {Tue, 16 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/MarquesMRLGBL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MoraesZMR19,
author = {Leonardo B. Moraes and
Alexandra L. Zimpeck and
Cristina Meinhardt and
Ricardo Augusto da Luz Reis},
title = {Minimum Energy FinFET Schmitt Trigger Design Considering Process Variability},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {88--93},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920297},
doi = {10.1109/VLSI-SOC.2019.8920297},
timestamp = {Mon, 27 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/MoraesZMR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MoraesZMR19a,
author = {Leonardo B. Moraes and
Alexandra L. Zimpeck and
Cristina Meinhardt and
Ricardo Augusto da Luz Reis},
title = {Robustness and Minimum Energy-Oriented FinFET Design},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {247--248},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920370},
doi = {10.1109/VLSI-SOC.2019.8920370},
timestamp = {Mon, 27 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/MoraesZMR19a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MuzaffarE19,
author = {Shahzad Muzaffar and
Ibrahim Abe M. Elfadel},
title = {Double Data Rate Dynamic Edge-Coded Signaling for Low-Power IoT Communication},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {317--322},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920318},
doi = {10.1109/VLSI-SOC.2019.8920318},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/MuzaffarE19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/NascimentoGES19,
author = {Diego V. Cirilo do Nascimento and
Kyriakos Georgiou and
Kerstin I. Eder and
Samuel Xavier de Souza},
title = {Exploiting guard band limits for energy gains in MPSoCs},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC46951.2019.9047904},
doi = {10.1109/VLSI-SOC46951.2019.9047904},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/NascimentoGES19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/NicholsGSCG19,
author = {Hunter Nichols and
Michael Grimes and
Jennifer Sowash and
Jesse Cirimelli{-}Low and
Matthew R. Guthaus},
title = {Automated Synthesis of Multi-Port Memories and Control},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {59--64},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920314},
doi = {10.1109/VLSI-SOC.2019.8920314},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/NicholsGSCG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/NunesAK19,
author = {Denis F. L. Nunes and
Silvio Roberto Fernandes de Araujo and
M{\'{a}}rcio Eduardo Kreutz},
title = {Optimizing an Architecture with Software Pipelining Strategies},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {299--304},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920368},
doi = {10.1109/VLSI-SOC.2019.8920368},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/NunesAK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/NunesK19,
author = {F. L. Denis Nunes and
M{\'{a}}rcio Eduardo Kreutz},
title = {Using {SDN} Strategies to Improve Resource Management On a NoC},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {224--225},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920321},
doi = {10.1109/VLSI-SOC.2019.8920321},
timestamp = {Mon, 13 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/NunesK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/OliveiraBRO19,
author = {Isadora Oliveira and
Vitor V. Bandeira and
Ricardo A. L. Reis and
Luciano Ost},
title = {Exploration of Techniques to Assess Soft Errors in Multicore Architectures},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {251--252},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920357},
doi = {10.1109/VLSI-SOC.2019.8920357},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/OliveiraBRO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/OyeniranUJR19,
author = {Adeboye Stephen Oyeniran and
Raimund Ubar and
Maksim Jenihhin and
Jaan Raik},
title = {Implementation-Independent Functional Test Generation for {MSC} Microprocessors},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {82--87},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920323},
doi = {10.1109/VLSI-SOC.2019.8920323},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/OyeniranUJR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/PelusoGC19,
author = {Valentino Peluso and
Matteo Grimaldi and
Andrea Calimera},
title = {Arbitrary-Precision Convolutional Neural Networks on Low-Power IoT
Processors},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {142--147},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920341},
doi = {10.1109/VLSI-SOC.2019.8920341},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/PelusoGC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/PeterSFL19,
author = {Kenneth Peter and
Lars J. Svensson and
Christoffer Fougstedt and
Per Larsson{-}Edefors},
title = {Hardware Considerations for Selection Networks},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {40--45},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920322},
doi = {10.1109/VLSI-SOC.2019.8920322},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/PeterSFL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ProtzeKEH0HSEM19,
author = {Florian Protze and
Martin Krei{\ss}ig and
Frank Ellinger and
Sebastian H{\"{o}}ppner and
Stephan Hartmann and
Stefan H{\"{a}}nzsche and
Stefan Scholze and
Georg Ellguth and
Christian Mayr},
title = {Performance Analysis of a Comparator Based Mixed-Signal Control Loop
in 28 nm {CMOS}},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {155--158},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920295},
doi = {10.1109/VLSI-SOC.2019.8920295},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/ProtzeKEH0HSEM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/RiosSLZA19,
author = {Marco Rios and
William Andrew Simon and
Alexandre Levisse and
Marina Zapater and
David Atienza},
title = {An Associativity-Agnostic in-Cache Computing Architecture Optimized
for Multiplication},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {34--39},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920317},
doi = {10.1109/VLSI-SOC.2019.8920317},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/RiosSLZA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SchvittzFSB19,
author = {Rafael B. Schvittz and
Denis Teixeira Franco and
Leomar Soares and
Paulo Francisco Butzen},
title = {A Simplified Layout-Level method for Single Event Transient Faults
Susceptibility on Logic Gates},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {185--190},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920333},
doi = {10.1109/VLSI-SOC.2019.8920333},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/SchvittzFSB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SchvittzSB19,
author = {Rafael B. Schvittz and
Leomar Soares and
Paulo Francisco Butzen},
title = {Exploring Logic Gates Layout to Improve the Accuracy of Circuit Reliability
Estimation},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {234--235},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920385},
doi = {10.1109/VLSI-SOC.2019.8920385},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/SchvittzSB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SeckinerWK19,
author = {Soner Se{\c{c}}kiner and
Longfei Wang and
Sel{\c{c}}uk K{\"{o}}se},
title = {An NBTI-Aware Digital Low-Dropout Regulator with Adaptive Gain Scaling
Control},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {191--196},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920381},
doi = {10.1109/VLSI-SOC.2019.8920381},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/SeckinerWK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SilvaVO19,
author = {Diego A. Silva and
Orlando Verducci Jr. and
Duarte Lopes de Oliveira},
title = {Implementation of {DES} Algorithm in New Non-Synchronous Architecture
Aiming {DPA} Robustness},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {228--229},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920302},
doi = {10.1109/VLSI-SOC.2019.8920302},
timestamp = {Thu, 14 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/SilvaVO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SouilemTDH19,
author = {Malek Souilem and
Jai Narayan Tripathi and
Wael Dghais and
Belgacem Hamdi},
title = {{I/O} Buffer Modelling for Power Supplies Noise Induced Jitter under
Simultaneous Switching Outputs {(SSO)}},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {226--227},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920351},
doi = {10.1109/VLSI-SOC.2019.8920351},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/SouilemTDH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SouzaISZSOA19,
author = {Wellington Silva de Souza and
Arman Iranfar and
Anderson B. N. da Silva and
Marina Zapater and
Samuel Xavier de Souza and
Katzalin Olcoz and
David Atienza},
title = {A QoS and Container-Based Approach for Energy Saving and Performance
Profiling in Multi-Core Servers},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {230--231},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920379},
doi = {10.1109/VLSI-SOC.2019.8920379},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/SouzaISZSOA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SzilagyiPHE19,
author = {L{\'{a}}szl{\'{o}} Szil{\'{a}}gyi and
Jan Pl{\'{\i}}va and
Ronny Henker and
Frank Ellinger},
title = {A Mixed-Signal Offset-Compensation System for Multi-Gbit/s Optical
Receiver Frontends},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {46--51},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920361},
doi = {10.1109/VLSI-SOC.2019.8920361},
timestamp = {Wed, 10 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/SzilagyiPHE19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/TonettoCBANAB19,
author = {Rafael Billig Tonetto and
Douglas Maciel Cardoso and
Marcelo Brandalero and
Luciano Agostini and
Gabriel L. Nazar and
Jos{\'{e}} Rodrigo Azambuja and
Antonio Carlos Schneider Beck},
title = {A Knapsack Methodology for Hardware-based {DMR} Protection against
Soft Errors in Superscalar Out-of-Order Processors},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {287--292},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920350},
doi = {10.1109/VLSI-SOC.2019.8920350},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/TonettoCBANAB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/VieiraGQZTKAG19,
author = {Jo{\~{a}}o Vieira and
Edouard Giacomin and
Yasir Mahmood Qureshi and
Marina Zapater and
Xifan Tang and
Shahar Kvatinsky and
David Atienza and
Pierre{-}Emmanuel Gaillardon},
title = {A Product Engine for Energy-Efficient Execution of Binary Neural Networks
Using Resistive Memories},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {160--165},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920343},
doi = {10.1109/VLSI-SOC.2019.8920343},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/VieiraGQZTKAG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/WaheedE19,
author = {Owais Talaat Waheed and
Ibrahim Abe M. Elfadel},
title = {Domain-Specific Architecture for {IMU} Array Data Fusion},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {129--134},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920380},
doi = {10.1109/VLSI-SOC.2019.8920380},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/WaheedE19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/WittigHMF19,
author = {Robert Wittig and
Mattis Hasler and
Emil Mat{\'{u}}s and
Gerhard P. Fettweis},
title = {Probabilistic Models for Off-Line Arbiters in Embedded Systems},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {238--239},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920376},
doi = {10.1109/VLSI-SOC.2019.8920376},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/WittigHMF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/WuG19,
author = {Bin Wu and
Matthew R. Guthaus},
title = {Bottom-Up Approach for High Speed {SRAM} Word-line Buffer Insertion
Optimization},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {305--310},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920325},
doi = {10.1109/VLSI-SOC.2019.8920325},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/WuG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/YasinSPC19,
author = {Atif Yasin and
Tiankai Su and
S{\'{e}}bastien Pillement and
Maciej J. Ciesielski},
title = {Functional Verification of Hardware Dividers using Algebraic Model},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {257--262},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920335},
doi = {10.1109/VLSI-SOC.2019.8920335},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/YasinSPC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ZimpeckMAHKR19,
author = {Alexandra L. Zimpeck and
Cristina Meinhardt and
Laurent Artola and
Guillaume Hubert and
Fernanda Lima Kastensmidt and
Ricardo Augusto da Luz Reis},
title = {Circuit-Level Techniques to Mitigate Process Variability and Soft
Errors in FinFET Designs},
booktitle = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
pages = {240--241},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSI-SoC.2019.8920383},
doi = {10.1109/VLSI-SOC.2019.8920383},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/ZimpeckMAHKR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsi/2019,
title = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/xpl/conhome/8910139/proceeding},
isbn = {978-1-7281-3915-9},
timestamp = {Fri, 13 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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