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@proceedings{DBLP:conf/vlsi/2016socs,
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  publisher    = {Springer},
  year         = {2017},
  url          = {https://doi.org/10.1007/978-3-319-67104-8},
  doi          = {10.1007/978-3-319-67104-8},
  isbn         = {978-3-319-67103-1},
  timestamp    = {Tue, 22 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/2016socs.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/AbbasT16a,
  author       = {Syed Mohsin Abbas and
                  Chi{-}Ying Tsui},
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {Approximate Matrix Inversion for Linear Pre-coders in Massive {MIMO}},
  booktitle    = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  pages        = {192--212},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-67104-8\_10},
  doi          = {10.1007/978-3-319-67104-8\_10},
  timestamp    = {Tue, 22 Oct 2019 15:21:19 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/AbbasT16a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/BernardiBNGSV16,
  author       = {Paolo Bernardi and
                  Alberto Bosio and
                  Giorgio Di Natale and
                  Andrea Guerriero and
                  Ernesto S{\'{a}}nchez and
                  Federico Venini},
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {Improving Stress Quality for SoC Using Faster-than-At-Speed Execution
                  of Functional Programs},
  booktitle    = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  pages        = {130--151},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-67104-8\_7},
  doi          = {10.1007/978-3-319-67104-8\_7},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/BernardiBNGSV16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/HemmatKAP16a,
  author       = {Maedeh Hemmat and
                  Mehdi Kamal and
                  Ali Afzali{-}Kusha and
                  Massoud Pedram},
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {Robust Hybrid {TFET-MOSFET} Circuits in Presence of Process Variations
                  and Soft Errors},
  booktitle    = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  pages        = {41--59},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-67104-8\_3},
  doi          = {10.1007/978-3-319-67104-8\_3},
  timestamp    = {Tue, 05 Sep 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/HemmatKAP16a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/LiHC16a,
  author       = {Yanzhe Li and
                  Kai Huang and
                  Luc Claesen},
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {A Novel Hardware-Oriented Stereo Matching Algorithm and Its Architecture
                  Design in {FPGA}},
  booktitle    = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  pages        = {213--232},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-67104-8\_11},
  doi          = {10.1007/978-3-319-67104-8\_11},
  timestamp    = {Wed, 01 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsi/LiHC16a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/LiMGSN16a,
  author       = {Xueqing Li and
                  Kaisheng Ma and
                  Sumitha George and
                  John Sampson and
                  Vijaykrishnan Narayanan},
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {Enabling Internet-of-Things with Opportunities Brought by Emerging
                  Devices, Circuits and Architectures},
  booktitle    = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  pages        = {1--23},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-67104-8\_1},
  doi          = {10.1007/978-3-319-67104-8\_1},
  timestamp    = {Tue, 05 Sep 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/LiMGSN16a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/PelusoRCMA16,
  author       = {Valentino Peluso and
                  Roberto Giorgio Rizzo and
                  Andrea Calimera and
                  Enrico Macii and
                  Massimo Alioto},
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {Beyond Ideal {DVFS} Through Ultra-Fine Grain Vdd-Hopping},
  booktitle    = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  pages        = {152--172},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-67104-8\_8},
  doi          = {10.1007/978-3-319-67104-8\_8},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/PelusoRCMA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/PlassanPMSB16,
  author       = {Guillaume Plassan and
                  Hans{-}J{\"{o}}rg Peter and
                  Katell Morin{-}Allory and
                  Shaker Sarwary and
                  Dominique Borrione},
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {Improving the Efficiency of Formal Verification: The Case of Clock-Domain
                  Crossings},
  booktitle    = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  pages        = {108--129},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-67104-8\_6},
  doi          = {10.1007/978-3-319-67104-8\_6},
  timestamp    = {Tue, 05 Sep 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/PlassanPMSB16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/RathSEE16a,
  author       = {Alexander W. Rath and
                  Sebastian Simon and
                  Volkan Esen and
                  Wolfgang Ecker},
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {Earth Mover's Distance as a Comparison Metric for Analog Behavior},
  booktitle    = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  pages        = {173--191},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-67104-8\_9},
  doi          = {10.1007/978-3-319-67104-8\_9},
  timestamp    = {Tue, 05 Sep 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/RathSEE16a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/SchreinerE16,
  author       = {Johannes Schreiner and
                  Wolfgang Ecker},
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {Digital Hardware Design Based on Metamodels and Model Transformations},
  booktitle    = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  pages        = {83--107},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-67104-8\_5},
  doi          = {10.1007/978-3-319-67104-8\_5},
  timestamp    = {Tue, 05 Sep 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/SchreinerE16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/TenaceCMP16a,
  author       = {Valerio Tenace and
                  Andrea Calimera and
                  Enrico Macii and
                  Massimo Poncino},
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic
                  Circuits},
  booktitle    = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  pages        = {60--82},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-67104-8\_4},
  doi          = {10.1007/978-3-319-67104-8\_4},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/TenaceCMP16a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/WaldADK16,
  author       = {Nimrod Wald and
                  Elad Amrani and
                  Avishay Drori and
                  Shahar Kvatinsky},
  editor       = {Thomas Hollstein and
                  Jaan Raik and
                  Sergei Kostin and
                  Anton Tsertov and
                  Ian O'Connor and
                  Ricardo Reis},
  title        = {Logic with Unipolar Memristors - Circuits and Design Methodology},
  booktitle    = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification
                  and Reliability - 24th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia,
                  September 26-28, 2016, Revised Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {508},
  pages        = {24--40},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-67104-8\_2},
  doi          = {10.1007/978-3-319-67104-8\_2},
  timestamp    = {Tue, 05 Sep 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/WaldADK16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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