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@inproceedings{DBLP:conf/vdat/AbhinavCSS15,
author = {Vishnuram Abhinav and
Amitabh Chatterjee and
Dheeraj Kumar Sinha and
Rajan Singh},
title = {Methodology for optimizing {ESD} protection for high speed {LVDS}
based I/Os},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208096},
doi = {10.1109/ISVDAT.2015.7208096},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/AbhinavCSS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/AgrawalC15,
author = {Kshitij Agrawal and
Shubhajit Roy Chowdhury},
title = {Real time multisensor Laplacian fusion on {FPGA}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208087},
doi = {10.1109/ISVDAT.2015.7208087},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/AgrawalC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/BanerjeeD15,
author = {Arindam Banerjee and
Debesh Kumar Das},
title = {Squarer design with reduced area and delay},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208092},
doi = {10.1109/ISVDAT.2015.7208092},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/BanerjeeD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/BanerjeeMD15,
author = {Sabyasachee Banerjee and
Subhashis Majumder and
Debesh K. Das},
title = {Partitioning-based test time reduction for core-based 3DICs},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208088},
doi = {10.1109/ISVDAT.2015.7208088},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/BanerjeeMD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/BanerjeeMSB15,
author = {Ansuman Banerjee and
Arijit Mondal and
Arnab Sarkar and
Santosh Biswas},
title = {Real-time embedded systems analysis - From theory to practice},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208162},
doi = {10.1109/ISVDAT.2015.7208162},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/BanerjeeMSB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/BaraiyaMS15,
author = {Binal B. Baraiya and
Hiren K. Mewada and
Amish B. Shah},
title = {{FPGA} based disk controller and photon counter of optical polarimeter},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208115},
doi = {10.1109/ISVDAT.2015.7208115},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/BaraiyaMS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/BashirPP15,
author = {Mudasir Bashir and
Sreehari Rao Patri and
K. S. R. Krishna Prasad},
title = {On-chip {CMOS} temperature sensor with current calibrated accuracy
of -1.1{\textdegree}C to +1.4{\textdegree}C (3{\(\sigma\)}) from -20{\textdegree}C
to 150{\textdegree}C},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208056},
doi = {10.1109/ISVDAT.2015.7208056},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/BashirPP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/BashirPP15a,
author = {Mudasir Bashir and
Sreehari Rao Patri and
K. S. R. Krishna Prasad},
title = {High speed self biased current sense amplifier for low power {CMOS}
SRAM's},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208057},
doi = {10.1109/ISVDAT.2015.7208057},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/BashirPP15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/BharCSK15,
author = {Anupam Bhar and
Santanu Chattopadhyay and
Indranil Sengupta and
Rohit Kapur},
title = {{GA} based diagnostic test pattern generation for transition faults},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208122},
doi = {10.1109/ISVDAT.2015.7208122},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/BharCSK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/BhatiaRV15,
author = {Praneet Bhatia and
Bhupendra Singh Reniwal and
Santosh Kumar Vishvakarma},
title = {An offset-tolerant self-correcting sense amplifier for robust high
speed {SRAM}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208082},
doi = {10.1109/ISVDAT.2015.7208082},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/BhatiaRV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/ChakrabortyDCD15,
author = {Sarit Chakraborty and
Chandan Das and
Susanta Chakraborty and
Parthasarathi Dasgupta},
title = {A novel two phase heuristic routing technique in digital microfluidic
biochip},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208144},
doi = {10.1109/ISVDAT.2015.7208144},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/ChakrabortyDCD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/ChakrabortyDK15,
author = {Shounak Chakraborty and
Shirshendu Das and
Hemangee K. Kapoor},
title = {Power aware cache miss reduction by energy efficient victim retention},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208078},
doi = {10.1109/ISVDAT.2015.7208078},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/ChakrabortyDK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/ChakrabortySCDS15,
author = {Bidesh Chakraborty and
Bhanu Pratap Singh and
M. Chinnapureddy and
Mamata Dalui and
Biplab K. Sikdar},
title = {Design of coherence verification unit for heterogeneous CMPs},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208098},
doi = {10.1109/ISVDAT.2015.7208098},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vdat/ChakrabortySCDS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/ChandraKCK15,
author = {Anshuman Chandra and
Santosh Kulkarni and
Subramanian Chebiyam and
Rohit Kapur},
title = {Designing efficient combinational compression architecture for testing
industrial circuits},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208149},
doi = {10.1109/ISVDAT.2015.7208149},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/ChandraKCK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/Chattopadhyay15,
author = {Santanu Chattopadhyay},
title = {Power- and thermal-aware testing of {VLSI} circuits and systems},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208161},
doi = {10.1109/ISVDAT.2015.7208161},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/Chattopadhyay15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/ChaudharySSYSMK15,
author = {Rekha Chaudhary and
Amit Sharma and
Soumendu Sinha and
Jitendra Yadav and
Rishi Sharma and
Ravindra Mukhiya and
Vinod K. Khanna},
title = {Fabrication and characterization of Al gate n-MOSFET, on-chip fabricated
with Si3N4 {ISFET}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208083},
doi = {10.1109/ISVDAT.2015.7208083},
timestamp = {Fri, 23 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/ChaudharySSYSMK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/ChaurasiyaBSKA15,
author = {Yogesh Chaurasiya and
Surabhi Bhargava and
Arvind Kumar Sharma and
Baljit Kaur and
Bulusu Anand},
title = {Timing model for two stage buffer and its application in {ECSM} characterization},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208075},
doi = {10.1109/ISVDAT.2015.7208075},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/ChaurasiyaBSKA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/ChoudhuryNRP15,
author = {Priyanka Choudhury and
Debanjali Nath and
Vivek Rai and
Sambhu Nath Pradhan},
title = {Thermal aware {AND-OR-XOR} network synthesis},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208047},
doi = {10.1109/ISVDAT.2015.7208047},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/ChoudhuryNRP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/DSouzaJC15,
author = {Sandeep D'Souza and
Soumya J. and
Santanu Chattopadhyay},
title = {A constructive heuristic for application mapping onto an express channel
based Network-on-Chip},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208147},
doi = {10.1109/ISVDAT.2015.7208147},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/DSouzaJC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/DarjiM15,
author = {Anand D. Darji and
Raviraj P. Makwana},
title = {High-performance multiplierless {DCT} architecture for {HEVC}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208051},
doi = {10.1109/ISVDAT.2015.7208051},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/DarjiM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/DashBKTP15,
author = {Satyabrata Dash and
Vivek Bangera and
Vinay B. Y. Kumar and
Gaurav Trivedi and
Sachin B. Patkar},
title = {Parallel two step random walk algorithm to analyze {VLSI} power grid
networks},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208101},
doi = {10.1109/ISVDAT.2015.7208101},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/DashBKTP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/DeyRD15,
author = {Debarati Dey and
Pradipta Roy and
Debashis De},
title = {Molecular modeling of Nano bio p-i-n {FET}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208111},
doi = {10.1109/ISVDAT.2015.7208111},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/DeyRD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/DhalDCRP15,
author = {Debasis Dhal and
Piyali Datta and
Arpan Chakrabarty and
Sudipta Roy and
Rajat Kumar Pal},
title = {An impressive approach for incorporating parallelism in designing
{DMFB} with cross contamination avoidance},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208137},
doi = {10.1109/ISVDAT.2015.7208137},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/DhalDCRP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/DhareM15,
author = {Vaishali H. Dhare and
Usha Mehta},
title = {Defect characterization and testing of {QCA} devices and circuits:
{A} survey},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208060},
doi = {10.1109/ISVDAT.2015.7208060},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vdat/DhareM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/DuttaC15,
author = {Arpita Dutta and
Santanu Chattopadhyay},
title = {Particle swarm optimization approach for low temperature {BIST}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208148},
doi = {10.1109/ISVDAT.2015.7208148},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/DuttaC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/GalgaliR15,
author = {Pradyumna Galgali and
Surendra S. Rathod},
title = {Analysis of {CMOS} inhibitory synapse with varying neurotransmitter
concentration, reuptake time and spread delay},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208112},
doi = {10.1109/ISVDAT.2015.7208112},
timestamp = {Mon, 01 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vdat/GalgaliR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/GaurLZKGS15,
author = {Manoj Singh Gaur and
Vijay Laxmi and
Mark Zwolinski and
Manoj Kumar and
Niyati Gupta and
Ashish Sharma},
title = {Network-on-chip: Current issues and challenges},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--3},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208160},
doi = {10.1109/ISVDAT.2015.7208160},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/GaurLZKGS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/GhoshGSM15,
author = {Prokash Ghosh and
Sandip Ghosh and
Pritpal Singh and
Saurabh Mishra},
title = {Case study: Re-visiting SoC verification challenges and best practices},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208052},
doi = {10.1109/ISVDAT.2015.7208052},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/GhoshGSM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/GowthamiHRY15,
author = {M. R. Gowthami and
G. Harish and
B. V. Bhargav Ram and
Siva Sankar Yellampalli},
title = {Modified low power scan based technique},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208126},
doi = {10.1109/ISVDAT.2015.7208126},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/GowthamiHRY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/GuhaSC15,
author = {Krishnendu Guha and
Debasri Saha and
Amlan Chakrabarti},
title = {{RTNA:} Securing {SOC} architectures from confidentiality attacks
at runtime using {ART1} neural networks},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208048},
doi = {10.1109/ISVDAT.2015.7208048},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/GuhaSC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/GuptaKBCMCPV15,
author = {Hari Shanker Gupta and
Shweta Kirkire and
Sunil Bhati and
Ravi Shankar Chaurasia and
Sanjeev Mehta and
Arup Roy Choudhary and
Dipen Patel and
Jaymin Vaghela},
title = {Bipolar voltage level shifter},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208055},
doi = {10.1109/ISVDAT.2015.7208055},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/GuptaKBCMCPV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/GuptaKLGZ15,
author = {Niyati Gupta and
Manoj Kumar and
Vijay Laxmi and
Manoj Singh Gaur and
Mark Zwolinski},
title = {{\(\sigma\)}LBDR: Congestion-aware logic based distributed routing
for 2D NoC},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208058},
doi = {10.1109/ISVDAT.2015.7208058},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/GuptaKLGZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/GuptaMR15,
author = {Suraj Gupta and
Sabir Ali Mondal and
Hafizur Rahaman},
title = {Improved supply regulation and temperature compensated current reference
circuit with low process variations},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208049},
doi = {10.1109/ISVDAT.2015.7208049},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/GuptaMR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/Islam15,
author = {Aminul Islam},
title = {Technology scaling and its side effects},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208164},
doi = {10.1109/ISVDAT.2015.7208164},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/Islam15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/JainJDHVB15,
author = {Yogesh M. Jain and
Aviraj R. Jadhav and
Harish V. Dixit and
Akshay S. Hindole and
Jithin R. Vadakoott and
Devendra Bilaye},
title = {A novel {VLSI} design of {DCTQ} processor for {FPGA} implementation},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208102},
doi = {10.1109/ISVDAT.2015.7208102},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/JainJDHVB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/JainM15,
author = {Nupur Jain and
Biswajit Mishra},
title = {{CORDIC} on a configurable serial architecture for biomedical signal
processing applications},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208050},
doi = {10.1109/ISVDAT.2015.7208050},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/JainM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/JatanaD15,
author = {Shri H. S. Jatana and
Nilesh M. Desai},
title = {{SCL} 180nm {CMOS} foundry: High reliability {ASIC} design for aerospace
applications},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208163},
doi = {10.1109/ISVDAT.2015.7208163},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/JatanaD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/JungharePP15,
author = {Rajesh C. Junghare and
Vinayak Pachkawade and
Rajendra M. Patrikar},
title = {A 2.47 GHz ultra NanoCrystaline diamond disk resonator with temperature
compensation for {RF} application},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208119},
doi = {10.1109/ISVDAT.2015.7208119},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/JungharePP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/Kale15,
author = {Nitin S. Kale},
title = {Introduction to MEMS; their applications as sensors for chemical {\&}
bio sensing},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208158},
doi = {10.1109/ISVDAT.2015.7208158},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/Kale15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KaurMD15,
author = {Ramandeep Kaur and
Rahul Malhotra and
Sujay Deb},
title = {{MAC} based {FIR} filter: {A} novel approach for low-power real-time
de-noising of {ECG} signals},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208065},
doi = {10.1109/ISVDAT.2015.7208065},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/KaurMD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KaushalDPP15,
author = {Shaurya Kaushal and
Pulkit Kumar Dubey and
Gaurav Prabhudesai and
B. D. Pant},
title = {Novel design for wideband piezoelectric vibrational energy harvester
{(P-VEH)}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208140},
doi = {10.1109/ISVDAT.2015.7208140},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/KaushalDPP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KhotS15,
author = {Prashant Khot and
Rajashekar B. Shettar},
title = {Design of area efficient and low power bandgap voltage reference using
sub-threshold {MOS} transistors},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208121},
doi = {10.1109/ISVDAT.2015.7208121},
timestamp = {Wed, 14 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/KhotS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KiranHKY15,
author = {N. Ravi Kiran and
G. Harish and
A. Karthik and
Siva Sankar Yellampalli},
title = {Low power and hardware cost {STUMPS} {BIST}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208125},
doi = {10.1109/ISVDAT.2015.7208125},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/KiranHKY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KoringaJS15,
author = {Hasmukh P. Koringa and
Bhushan D. Joshi and
Vipul Shah},
title = {High power gain low noise amplifier design for next generation 1-7GHz
wideband {RF} frontend {RFIC} using 0.18{\(\mu\)}m {CMOS}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208105},
doi = {10.1109/ISVDAT.2015.7208105},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vdat/KoringaJS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KumarCSM15,
author = {K. Sudeendra Kumar and
Rakesh Chanamala and
Sauvagya Ranjan Sahoo and
Kamala Kanta Mahapatra},
title = {An improved {AES} Hardware Trojan benchmark to validate Trojan detection
schemes in an {ASIC} design flow},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208064},
doi = {10.1109/ISVDAT.2015.7208064},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/KumarCSM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KumarM15,
author = {S. Dinesh Kumar and
S. K. Noor Mahammad},
title = {A novel adiabatic {SRAM} cell implementation using split level charge
recovery logic},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208071},
doi = {10.1109/ISVDAT.2015.7208071},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/KumarM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KumarP15,
author = {Rohit Kumar and
Manisha Pattanaik},
title = {A novel dual multiplier floating point multiply accumulate architecture},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208061},
doi = {10.1109/ISVDAT.2015.7208061},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/KumarP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KumarP15a,
author = {S. Santosh Kumar and
B. D. Pant},
title = {Fabrication and characterization of pressure sensor, and enhancement
of output characteristics by modification of operating pressure range},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208132},
doi = {10.1109/ISVDAT.2015.7208132},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/KumarP15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KumarS15,
author = {G. Ganesh Kumar and
Subhendu Kumar Sahoo},
title = {Implementation of a high speed multiplier for high-performance and
low power applications},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208143},
doi = {10.1109/ISVDAT.2015.7208143},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/KumarS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KumawatSG15,
author = {Renu Kumawat and
Vineet Sahula and
Manoj Singh Gaur},
title = {Modeling and synthesis of molecular memory},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208081},
doi = {10.1109/ISVDAT.2015.7208081},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/KumawatSG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/LathaK15,
author = {Yericharla Mary Asha Latha and
Gargi Khanna},
title = {Design and simulative analysis of a batteryless Teflon coated capacitive
pressure sensor for glaucoma diagnosis},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208118},
doi = {10.1109/ISVDAT.2015.7208118},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vdat/LathaK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/LocharlaKMA15,
author = {Govinda Rao Locharla and
K. Sudeendra Kumar and
Kamala Kanta Mahapatra and
Samit Ari},
title = {Implementation of input data buffering and scheduling methodology
for 8 parallel {MDC} {FFT}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208107},
doi = {10.1109/ISVDAT.2015.7208107},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/LocharlaKMA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/MPM15,
author = {Vinay M. M. and
Roy P. Paily and
Anil Mahanta},
title = {A low-power subthreshold {LNA} for mobile applications},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208134},
doi = {10.1109/ISVDAT.2015.7208134},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/MPM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/MalathiGSV15,
author = {D. Malathi and
R. Greeshma and
R. Sanjay and
B. Venkataramani},
title = {A 4 bit medium speed flash {ADC} using inverter based comparator in
0.18{\(\mu\)}m {CMOS}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208069},
doi = {10.1109/ISVDAT.2015.7208069},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/MalathiGSV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/MalhotraDC15,
author = {Rahul Malhotra and
Sujay Deb and
Fabio Carlucci},
title = {A novel approach to reusable time-economized {STIL} based pattern
development},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208066},
doi = {10.1109/ISVDAT.2015.7208066},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/MalhotraDC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/MasraniC15,
author = {Mansi S. Masrani and
Raghavendra Chilukuri},
title = {Low-leakage architecture for embedded {ROM}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208151},
doi = {10.1109/ISVDAT.2015.7208151},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/MasraniC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/MayankM15,
author = {Jaishree Mayank and
Arijit Mondal},
title = {Performance optimization of real time control systems using variable
time period},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208076},
doi = {10.1109/ISVDAT.2015.7208076},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/MayankM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/MeheraCDP15,
author = {Ranjan Mehera and
Arpan Chakraborty and
Piyali Datta and
Rajat Kumar Pal},
title = {A cost-optimal algorithm for guard zone computation including detection
and exclusion of overlapping},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208086},
doi = {10.1109/ISVDAT.2015.7208086},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/MeheraCDP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/MishraHM15,
author = {Yagya D. Mishra and
Mohammad S. Hashmi and
Akhilesh C. Mishra},
title = {An efficient approach for estimating the impact of {SSO} noise on
{LPDDR2} timing budget},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208085},
doi = {10.1109/ISVDAT.2015.7208085},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/MishraHM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/MondalP15,
author = {Saroj Mondal and
Roy P. Paily},
title = {An efficient on-chip energy processing circuit for micro-scale energy
harvesting systems},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208108},
doi = {10.1109/ISVDAT.2015.7208108},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/MondalP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/MousumiGS15,
author = {Saha Mousumi and
Navneet Kumar Gautam and
Biplab K. Sikdar},
title = {A fault tolerant test hardware for {L1} cache module in tile CMPs
architecture},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208100},
doi = {10.1109/ISVDAT.2015.7208100},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/MousumiGS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/MukherjeeR15,
author = {Shyamapada Mukherjee and
Suchismita Roy},
title = {Multi terminal net routing for island style FPGAs using nearly-2-SAT
computation},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208142},
doi = {10.1109/ISVDAT.2015.7208142},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/MukherjeeR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/NambisanKP15,
author = {Ramprasad Nambisan and
S. Santosh Kumar and
B. D. Pant},
title = {Sensitivity and non-linearity study and performance enhancement in
bossed diaphragm piezoresistive pressure sensor},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208104},
doi = {10.1109/ISVDAT.2015.7208104},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/NambisanKP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/NathSDCTS15,
author = {Rajdeep Kumar Nath and
Bibhash Sen and
Rachit Daga and
Nilesh Chakraborty and
Harsh Tibrewal and
Biplab K. Sikdar},
title = {Fault masking in Quantum-dot cellular automata using prohibitive logic
circuit},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208103},
doi = {10.1109/ISVDAT.2015.7208103},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/NathSDCTS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/NegiM15,
author = {Sonam Negi and
Pitchaiah Madduri},
title = {Implementation of high speed radix-10 parallel multiplier using Verilog},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208073},
doi = {10.1109/ISVDAT.2015.7208073},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/NegiM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/NegiM15a,
author = {Sonam Negi and
Pitchaiah Madduri},
title = {Implementation of high speed radix-10 parallel multiplier using Verilog},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208074},
doi = {10.1109/ISVDAT.2015.7208074},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/NegiM15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/PachkawadeJP15,
author = {Vinayak Pachkawade and
Rajesh C. Junghare and
Rajendra M. Patrikar},
title = {A small bandwidth microelectromechanical ring resonator-based bandpass
filter},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208120},
doi = {10.1109/ISVDAT.2015.7208120},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/PachkawadeJP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/PandeyKSG15,
author = {Jai Gopal Pandey and
Arindam Karmakar and
Chandra Shekhar and
S. Gurunarayanan},
title = {An embedded framework for accurate object localization using center
of gravity measure with mean shift procedure},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208135},
doi = {10.1109/ISVDAT.2015.7208135},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/PandeyKSG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/PareekG15,
author = {Vibhor Pareek and
Gaurvi Goyal},
title = {Area optimized {CMOS} layouts of a 50 Gb/s low power 4: 1 multiplexer},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208054},
doi = {10.1109/ISVDAT.2015.7208054},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/PareekG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/PariharVP15,
author = {Kunal Parihar and
M. Venkatesh and
Ravikumar Patel},
title = {Realistic dynamic timing verification for complex mixed signal hard
macro's using {UVM}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208072},
doi = {10.1109/ISVDAT.2015.7208072},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/PariharVP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/ParmarM15,
author = {Harikrishna Parmar and
Usha Sandeep Mehta},
title = {A Hamming code based technique to resolve the bit flip impact on compressed
{VLSI} test data in {IP} core based SoC},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208099},
doi = {10.1109/ISVDAT.2015.7208099},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vdat/ParmarM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/PatelNSAB15,
author = {Ronak Patel and
Amisha Naik and
Amit Singh and
Archana Arya and
Pulkit Bhatnagar},
title = {Advanced {UPF} based voltage-aware verification for IOs},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208091},
doi = {10.1109/ISVDAT.2015.7208091},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/PatelNSAB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/PatelR15,
author = {Rajendra Patel and
Arvind Rajawat},
title = {Instruction cache design space exploration for embedded software applications},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208127},
doi = {10.1109/ISVDAT.2015.7208127},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/PatelR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/PatilRSSV15,
author = {Vinayak Patil and
Aneesh Raveendran and
P. M. Sobha and
A. David Selvakumar and
Vivian Desalphine},
title = {Out of order floating point coprocessor for {RISC} {V} {ISA}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208116},
doi = {10.1109/ISVDAT.2015.7208116},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/PatilRSSV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/PawanekarT15,
author = {Sameer Pawanekar and
Gaurav Trivedi},
title = {{TSV} aware standard cell placement for 3D ICs},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208113},
doi = {10.1109/ISVDAT.2015.7208113},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/PawanekarT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/PawanekarT15a,
author = {Sameer Pawanekar and
Gaurav Trivedi},
title = {Net weighing based timing driven standard cell placer},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208114},
doi = {10.1109/ISVDAT.2015.7208114},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/PawanekarT15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/PunethaS15,
author = {Mayank Punetha and
Yashvir Singh},
title = {An integrable trench {LDMOS} transistor on {SOI} for {RF} power amplifiers
in PICs},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208084},
doi = {10.1109/ISVDAT.2015.7208084},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/PunethaS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/RaoOR15,
author = {Madhav Rao and
Neha Oraon and
S. Ranganatha},
title = {Design and simulation of magnetic logic device for next generation
data processing},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208089},
doi = {10.1109/ISVDAT.2015.7208089},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/RaoOR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/RashmiSB15,
author = {V. S. Rashmi and
Giridhar Somayaji and
Sirisha Bhamidipathi},
title = {A methodology to reuse random {IP} stimuli in an SoC functional verification
environment},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208152},
doi = {10.1109/ISVDAT.2015.7208152},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/RashmiSB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/RaveendranPDSS15,
author = {Aneesh Raveendran and
Vinayak Patil and
Vivian Desalphine and
P. M. Sobha and
A. David Selvakumar},
title = {{RISC-V} out-of-order data conversion co-processor},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208117},
doi = {10.1109/ISVDAT.2015.7208117},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/RaveendranPDSS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/ReddyNSV15,
author = {Karri Manikantta Reddy and
Kumar Y. B. Nithin and
Dheeraj Sharma and
M. H. Vasantha},
title = {Low power, high speed error tolerant multiplier using approximate
adders},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208150},
doi = {10.1109/ISVDAT.2015.7208150},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/ReddyNSV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/RitheshHRY15,
author = {Munishamanna Rithesh and
G. Harish and
B. V. Bhargav Ram and
Siva Sankar Yellampalli},
title = {Detection and analysis of hardware trojan using scan chain method},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208124},
doi = {10.1109/ISVDAT.2015.7208124},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/RitheshHRY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/RuchiD15,
author = {Ruchi and
S. Dasgupta},
title = {Sensitivity analysis of {DRV} for various configurations of {SRAM}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208059},
doi = {10.1109/ISVDAT.2015.7208059},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/RuchiD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SahooKM15,
author = {Sauvagya Ranjan Sahoo and
K. Sudeendra Kumar and
Kamalakanta Mahapatra},
title = {A novel {ROPUF} for hardware security},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208093},
doi = {10.1109/ISVDAT.2015.7208093},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SahooKM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/Santhanalakshmi15,
author = {M. Santhanalakshmi and
K. Yasoda},
title = {Verilog-A implementation of energy-efficient {SAR} ADCs for biomedical
application},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208139},
doi = {10.1109/ISVDAT.2015.7208139},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/Santhanalakshmi15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SarkarK15,
author = {Hari Sarkar and
Sudakshina Kundu},
title = {Standby leakage current estimation model for multi threshold {CMOS}
inverter circuit in deep submicron technology},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208141},
doi = {10.1109/ISVDAT.2015.7208141},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SarkarK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SavaniD15,
author = {Vijay Savani and
N. M. Devashrayee},
title = {Analysis {\&} characterization of dual tail current based dynamic
latch comparator with modified {SR} latch using 90nm technology},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208136},
doi = {10.1109/ISVDAT.2015.7208136},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SavaniD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SaxenaSP15,
author = {Shanky Saxena and
Ritu Sharma and
B. D. Pant},
title = {Design and development of cantilever-type {MEMS} based piezoelectric
energy harvester},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208045},
doi = {10.1109/ISVDAT.2015.7208045},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SaxenaSP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/ShahMS15,
author = {Toral Shah and
Anzhela Yu. Matrosova and
Virendra Singh},
title = {{PDF} testability of a combinational circuit derived by covering {ROBDD}
nodes using Invert-And-Or circuits},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208130},
doi = {10.1109/ISVDAT.2015.7208130},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/ShahMS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/Sharma15,
author = {Anil Sharma},
title = {Design and analysis of a touch mode {MEMS} capacitive pressure sensor
for {IUPC}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208106},
doi = {10.1109/ISVDAT.2015.7208106},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/Sharma15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SharmaMADB15,
author = {Arvind Kumar Sharma and
Neeraj Mishra and
Naushad Alam and
Sudeb Dasgupta and
Anand Bulusu},
title = {Pre-layout estimation of performance and design of basic analog circuits
in stress enabled technologies},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208062},
doi = {10.1109/ISVDAT.2015.7208062},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SharmaMADB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SharmaPD15,
author = {Priyanka Sharma and
Sunil Pandey and
Pravin A. Dwaramwar},
title = {An inductorless receiver front-end for multiband wireless applications},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208070},
doi = {10.1109/ISVDAT.2015.7208070},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SharmaPD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SharmaUALBGZ15,
author = {Ashish Sharma and
Prachi Upadhyay and
Ruby Ansar and
Vijay Laxmi and
Lava Bhargava and
Manoj Singh Gaur and
Mark Zwolinski},
title = {A framework for thermal aware reliability estimation in 2D NoC},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208063},
doi = {10.1109/ISVDAT.2015.7208063},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SharmaUALBGZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SinghD15,
author = {Namrata Singh and
Sujay Deb},
title = {Analysis and design guidelines for customized logic families in {CMOS}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208133},
doi = {10.1109/ISVDAT.2015.7208133},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SinghD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SinhaNH15,
author = {Rohan Sinha and
Bhawana Singh Nirwan and
Mohammad S. Hashmi},
title = {A new row decoding architecture for fast wordline charging in {NOR}
type Flash memories},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208131},
doi = {10.1109/ISVDAT.2015.7208131},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SinhaNH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SinhaS15,
author = {Rohan Sinha and
Pranay Samanta},
title = {Analysis of stability and different speed boosting assist techniques
towards the design and optimization of high speed {SRAM} cell},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208097},
doi = {10.1109/ISVDAT.2015.7208097},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SinhaS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SkaggsRRBP15,
author = {Michael Skaggs and
Sushmita Kadiyala Rao and
Ryan W. Robucci and
Nilanjan Banerjee and
Chintan Patel},
title = {Transient current estimation using {S3C} (Standard cell current transient
characterization)},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208110},
doi = {10.1109/ISVDAT.2015.7208110},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SkaggsRRBP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/Sudha15,
author = {N. Sudha},
title = {Multicore processor - Architecture and programming},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208159},
doi = {10.1109/ISVDAT.2015.7208159},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/Sudha15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/SudhaC15,
author = {N. Sudha and
D. Bharat Chandrahas},
title = {A pipelined memory-efficient architecture for face detection and tracking
on a multicore environment},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208145},
doi = {10.1109/ISVDAT.2015.7208145},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/SudhaC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/TalatuleZZ15,
author = {Samta D. Talatule and
Pravin Zode and
Pradnya Zode},
title = {A secure architecture for the design for testability structures},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208090},
doi = {10.1109/ISVDAT.2015.7208090},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/TalatuleZZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/Talukdar15,
author = {Priyankar Talukdar},
title = {On logic depth per pipelining stage with power aware flop, wave and
hybrid pipelining with gate size and area constraints},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208053},
doi = {10.1109/ISVDAT.2015.7208053},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/Talukdar15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/Talukdar15a,
author = {Priyankar Talukdar},
title = {{BONY:} An algorithm to generate large synthetic combinational benchmark
circuits},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208094},
doi = {10.1109/ISVDAT.2015.7208094},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/Talukdar15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/TewariS15,
author = {Shikhar Tewari and
Kirmender Singh},
title = {Intuitive design of {PTAT} and {CTAT} circuits for {MOSFET} based
temperature sensor using Inversion Coefficient based approach},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208077},
doi = {10.1109/ISVDAT.2015.7208077},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/TewariS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/TrivediDMDP15,
author = {Rakesh Trivedi and
N. M. Devashrayee and
Usha Sandeep Mehta and
N. M. Desai and
Himanshu Patel},
title = {Development of Radiation Hardened by Design(RHBD) primitive gates
using 0.18{\(\mu\)}m {CMOS} technology},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208046},
doi = {10.1109/ISVDAT.2015.7208046},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vdat/TrivediDMDP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/UpadhyaySS15,
author = {Darshana Upadhyay and
Trishla Shah and
Priyanka Sharma},
title = {Cryptanalysis of hardware based stream ciphers and implementation
of {GSM} stream cipher to propose a novel approach for designing n-bit
{LFSR} stream cipher},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208129},
doi = {10.1109/ISVDAT.2015.7208129},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/UpadhyaySS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/VanapalliKD15,
author = {Kartheek Vanapalli and
Hemangee K. Kapoor and
Shirshendu Das},
title = {An efficient searching mechanism for dynamic {NUCA} in chip multiprocessors},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208079},
doi = {10.1109/ISVDAT.2015.7208079},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/VanapalliKD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/VarshaARP15,
author = {Rangwani Varsha and
Rajat Arora and
T. V. S. Ram and
Amit Patel},
title = {Design and implementation of {DVB-S2} transport stream for onboard
processing satellite},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208128},
doi = {10.1109/ISVDAT.2015.7208128},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/VarshaARP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/VermaP15,
author = {Gagan Deep Verma and
Manisha Pattanaik},
title = {Performance study of side block oxide band gap engineered {SONOS:}
{A} device simulation approach},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208146},
doi = {10.1109/ISVDAT.2015.7208146},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/VermaP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/WadhwaT15,
author = {Sanjay Kumar Wadhwa and
Avinash Chandra Tripathi},
title = {Measurement of de-assertion threshold of power-on-reset circuits},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208109},
doi = {10.1109/ISVDAT.2015.7208109},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/WadhwaT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/WarisMKMC15,
author = {Mohammad Waris and
Urvi Mehta and
Rajiv Kumaran and
Sanjeev Mehta and
Arup Roy Chowdhury},
title = {An all digital delay lock loop architecture for high precision timing
generator},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208138},
doi = {10.1109/ISVDAT.2015.7208138},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/WarisMKMC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/YadavDJG15,
author = {Jitendra Yadav and
Pallavi Das and
Abhinav Jain and
Anuj Grover},
title = {Area compact 5T portless {SRAM} cell for high density cache in 65nm
{CMOS}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208095},
doi = {10.1109/ISVDAT.2015.7208095},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/YadavDJG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/YadavLGB15,
author = {Sonal Yadav and
Vijay Laxmi and
Manoj Singh Gaur and
Megha Bhargava},
title = {C\({}^{\mbox{2}}\)-DLM: Cache coherence aware dual link mesh for on-chip
interconnect},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208068},
doi = {10.1109/ISVDAT.2015.7208068},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/YadavLGB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/YadavSSCMSK15,
author = {Jitendra Yadav and
Soumendu Sinha and
Amit Sharma and
Rekha Chaudhary and
Ravindra Mukhiya and
Rishi Sharma and
Vinod K. Khanna},
title = {Simulation and characterization of dual-gate {SOI} MOSFET, on-chip
fabricated with {ISFET}},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208080},
doi = {10.1109/ISVDAT.2015.7208080},
timestamp = {Fri, 23 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/YadavSSCMSK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/ZodeD15,
author = {Pravin Zode and
Raghavendra B. Deshmukh},
title = {Side channel attack resistant architecture for elliptic curve cryptography},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208123},
doi = {10.1109/ISVDAT.2015.7208123},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/ZodeD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vdat/2015,
title = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://ieeexplore.ieee.org/xpl/conhome/7166536/proceeding},
isbn = {978-1-4799-1743-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vdat/2015.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/MehtaDRA15,
title = {Super-scale architecture enhancement of {LEON3} core for {DSP} application},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
note = {Withdrawn.},
url = {https://doi.org/10.1109/ISVDAT.2015.7208067},
doi = {10.1109/ISVDAT.2015.7208067},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/MehtaDRA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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