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@inproceedings{DBLP:conf/mtdt/BanerjeeCB05,
  author       = {Shibaji Banerjee and
                  Dipanwita Roy Chowdhury and
                  Bhargab B. Bhattacharya},
  title        = {A programmable built-in self-test for embedded DRAMs},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {58--63},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.14},
  doi          = {10.1109/MTDT.2005.14},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/BanerjeeCB05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/BreitwischLJMZ05,
  author       = {Matthew J. Breitwisch and
                  Chung Hon Lam and
                  Jeffrey B. Johnson and
                  Steven W. Mittl and
                  Jian W. Zhu},
  title        = {A novel {CMOS} compatible embedded nonvolatile memory with zero process
                  adder},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {9--12},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.12},
  doi          = {10.1109/MTDT.2005.12},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/BreitwischLJMZ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/ChangWK05,
  author       = {Meng{-}Fan Chang and
                  Kuei{-}Ann Wen and
                  Ding{-}Ming Kwai},
  title        = {Via-programmable read-only memory design for full code coverage using
                  a dynamic bit-line shielding technique},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {16--21},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.36},
  doi          = {10.1109/MTDT.2005.36},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/ChangWK05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/ChengH05,
  author       = {Shin{-}Pao Cheng and
                  Shi{-}Yu Huang},
  title        = {A low-power {SRAM} design using quiet-bitline architecture},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {135--139},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.10},
  doi          = {10.1109/MTDT.2005.10},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/ChengH05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/DuMCR05,
  author       = {Xiaogang Du and
                  Nilanjan Mukherjee and
                  Wu{-}Tung Cheng and
                  Sudhakar M. Reddy},
  title        = {Full-speed field programmable memory {BIST} supporting multi-level
                  looping},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {67--71},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.25},
  doi          = {10.1109/MTDT.2005.25},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/DuMCR05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/HamdiouiAGW05,
  author       = {Said Hamdioui and
                  Zaid Al{-}Ars and
                  Ad J. van de Goor and
                  Rob Wadsworth},
  title        = {Impact of stresses on the fault coverage of memory tests},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {103--108},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.26},
  doi          = {10.1109/MTDT.2005.26},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/HamdiouiAGW05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/HsiaoK05,
  author       = {Ching{-}Hua Hsiao and
                  Ding{-}Ming Kwai},
  title        = {Measurement and characterization of 6T {SRAM} cell current},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {140--145},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.28},
  doi          = {10.1109/MTDT.2005.28},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/HsiaoK05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/HuaCH05,
  author       = {Chung{-}Hsien Hua and
                  Tung{-}Shuan Cheng and
                  Wei Hwang},
  title        = {Distributed data-retention power gating techniques for column and
                  row co-controlled embedded {SRAM}},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {129--134},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.21},
  doi          = {10.1109/MTDT.2005.21},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/HuaCH05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/KushidaOHT05,
  author       = {Keiichi Kushida and
                  Nobuaki Otsuka and
                  Osamu Hirabayashi and
                  Yasuhisa Takeyama},
  title        = {{DFT} techniques for memory macro with built-in {ECC}},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {109--114},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.19},
  doi          = {10.1109/MTDT.2005.19},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/KushidaOHT05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/LeeJSTCL05,
  author       = {Yang{-}Han Lee and
                  Yih{-}Guang Jan and
                  Jei{-}Jung Shen and
                  Shian{-}Wei Tzeng and
                  Ming{-}Hsueh Chuang and
                  Jheng{-}Yao Lin},
  title        = {{DFT} architecture for a dynamic fault model of the embedded mask
                  {ROM} of {SOC}},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {78--82},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.8},
  doi          = {10.1109/MTDT.2005.8},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/LeeJSTCL05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/LeeWK05,
  author       = {Kung{-}Hong Lee and
                  Shih{-}Chen Wang and
                  Ya{-}Chin King},
  title        = {Novel self-convergent scheme logic-process-based multilevel/analog
                  {EEPROM} memory},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {3--8},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.29},
  doi          = {10.1109/MTDT.2005.29},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/LeeWK05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/LiH05,
  author       = {Jin{-}Fu Li and
                  Yu{-}Jane Huang},
  title        = {An error detection and correction scheme for RAMs with partial-write
                  function},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {115--120},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.16},
  doi          = {10.1109/MTDT.2005.16},
  timestamp    = {Tue, 17 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtdt/LiH05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/LiSWLS05,
  author       = {Simon C. Li and
                  J. P. Su and
                  T.{-}H. Wu and
                  J. M. Lee and
                  M. F. Shu},
  title        = {Dielectric tunnel parameters of CoFe/Al-O/CoFe in {MTJ} for 1T1MTJ
                  {MRAM} applications},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {29--34},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.20},
  doi          = {10.1109/MTDT.2005.20},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/LiSWLS05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/LinLHLLHWHLH05,
  author       = {Ching{-}Yuan Lin and
                  Chung{-}Hung Lin and
                  Chien{-}Hung Ho and
                  Wei{-}Wu Liao and
                  Shu{-}Yueh Lee and
                  Ming{-}Chou Ho and
                  Shih{-}Chen Wang and
                  Shih{-}Chan Huang and
                  Yuan{-}Tai Lin and
                  Charles Ching{-}Hsiang Hsu},
  title        = {Embedded {OTP} fuse in {CMOS} logic process},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {13--15},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.22},
  doi          = {10.1109/MTDT.2005.22},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/LinLHLLHWHLH05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/LinesMOPDPCNMPM05,
  author       = {Valerie Lines and
                  Robert McKenzie and
                  Hakjune Oh and
                  Hong{-}Beom Pyeon and
                  Matthew Dunn and
                  Susan Palapar and
                  Susan Coleman and
                  Peter Nyasulu and
                  Tony Mai and
                  Seanna Pike and
                  John McCready and
                  Jody Defazio and
                  Jin{-}Ki Kim and
                  Robert Penchuk and
                  Zvika Greenfield and
                  Fredy Lange and
                  Alberto Mandler and
                  Eric C. Jones and
                  Matthew Silverstein},
  title        = {A 1GHz embedded {DRAM} macro and fully programmable {BIST} with at-speed
                  bitmap capability},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {47--51},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.5},
  doi          = {10.1109/MTDT.2005.5},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/LinesMOPDPCNMPM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/LuTH05,
  author       = {Shyue{-}Kung Lu and
                  Yu{-}Cheng Tsai and
                  Shih{-}Chang Huang},
  title        = {A {BIRA} algorithm for embedded memories with 2D redundancy},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {121--126},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.6},
  doi          = {10.1109/MTDT.2005.6},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/LuTH05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/McGaughyWH05,
  author       = {Bruce McGaughy and
                  S. W{\"{u}}nsche and
                  K. K. Hung},
  title        = {Advanced simulation technology and its application in memory design
                  and verification},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {xv--xx},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.27},
  doi          = {10.1109/MTDT.2005.27},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/McGaughyWH05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/OkhoninFJ05,
  author       = {Serguei Okhonin and
                  Pierre Fazan and
                  Mark{-}Eric Jones},
  title        = {Zero capacitor embedded memory technology for system on chip},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {xxi--xxv},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.4655409},
  doi          = {10.1109/MTDT.2005.4655409},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/OkhoninFJ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/RaiterC05,
  author       = {Kamlesh R. Raiter and
                  Bruce F. Cockburn},
  title        = {An investigation into three-level ferroelectric memory},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {38--43},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.17},
  doi          = {10.1109/MTDT.2005.17},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/RaiterC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/ShenHCL05,
  author       = {Sheng{-}Chih Shen and
                  Hung{-}Ming Hsu and
                  Yi{-}Wei Chang and
                  Kuen{-}Jong Lee},
  title        = {A high speed {BIST} architecture for {DDR-SDRAM} testing},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {52--57},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.9},
  doi          = {10.1109/MTDT.2005.9},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/ShenHCL05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/SinghBD05,
  author       = {Amandeep Singh and
                  Debashish Bose and
                  Sandeep Darisala},
  title        = {Software based in-system memory test for highly available systems},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {89--94},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.34},
  doi          = {10.1109/MTDT.2005.34},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/SinghBD05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/SungCC05,
  author       = {Star Sung and
                  Thomas Chang and
                  Juei Lung Chen},
  title        = {A nor-type {MLC} {ROM} with novel sensing scheme for embedded applications},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {22--25},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.11},
  doi          = {10.1109/MTDT.2005.11},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/SungCC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/TsaiWC05,
  author       = {Po{-}Chang Tsai and
                  Sying{-}Jyan Wang and
                  Feng{-}Ming Chang},
  title        = {FSM-based programmable memory {BIST} with macro command},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {72--77},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.24},
  doi          = {10.1109/MTDT.2005.24},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/TsaiWC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/WangL05,
  author       = {Wei{-}Lun Wang and
                  Kuen{-}Jong Lee},
  title        = {A complete memory address generator for scan based March algorithms},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {83--88},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.7},
  doi          = {10.1109/MTDT.2005.7},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/WangL05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/WeyLQ05,
  author       = {Chin{-}Long Wey and
                  Meng{-}Yao Liu and
                  Shaolei Quan},
  title        = {Reliability enhancement of {CMOS} SRAMs},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {146--151},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.32},
  doi          = {10.1109/MTDT.2005.32},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/WeyLQ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/WuFK05,
  author       = {Meng{-}Yi Wu and
                  Shin{-}Chang Feng and
                  Ya{-}Chin King},
  title        = {A novel single poly-silicon {EEPROM} using trench floating gate},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {35--37},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.13},
  doi          = {10.1109/MTDT.2005.13},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/WuFK05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/YehKWHC05,
  author       = {Jen{-}Chieh Yeh and
                  Shyr{-}Fen Kuo and
                  Cheng{-}Wen Wu and
                  Chih{-}Tsun Huang and
                  Chao{-}Hsun Chen},
  title        = {A systematic approach to reducing semiconductor memory test time in
                  mass production},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {97--102},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.15},
  doi          = {10.1109/MTDT.2005.15},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtdt/YehKWHC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/mtdt/2005,
  title        = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/10032/proceeding},
  isbn         = {0-7695-2313-7},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtdt/2005.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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