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@inproceedings{DBLP:conf/memsys/AgrawalF17,
author = {Ankit Agrawal and
Gerhard Fohler},
title = {DRAM-related challenges in task scheduling with timing predictability
on {COTS} multi-cores for safety-critical systems},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {265--267},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132417},
doi = {10.1145/3132402.3132417},
timestamp = {Tue, 08 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/AgrawalF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/AsifuzzamanVR17,
author = {Kazi Asifuzzaman and
Rommel S{\'{a}}nchez Verdejo and
Petar Radojkovic},
title = {Enabling a reliable {STT-MRAM} main memory simulation},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {283--292},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132416},
doi = {10.1145/3132402.3132416},
timestamp = {Sat, 05 Jan 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/AsifuzzamanVR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/AwadHHRHH17,
author = {Amro Awad and
Simon D. Hammond and
Clay Hughes and
Arun Rodrigues and
K. Scott Hemmert and
Robert J. Hoekstra},
title = {Performance analysis for using non-volatile memory DIMMs: opportunities
and challenges},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {411--420},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132422},
doi = {10.1145/3132402.3132422},
timestamp = {Wed, 03 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/AwadHHRHH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/AwanOAIBV17,
author = {Ahsan Javed Awan and
Moriyoshi Ohara and
Eduard Ayguad{\'{e}} and
Kazuaki Ishizaki and
Mats Brorsson and
Vladimir Vlassov},
title = {Identifying the potential of near data processing for apache spark},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {60--67},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132427},
doi = {10.1145/3132402.3132427},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/AwanOAIBV17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/Beard17,
author = {Jonathan C. Beard},
title = {The sparse data reduction engine: chopping sparse data one byte at
a time},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {34--48},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132431},
doi = {10.1145/3132402.3132431},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/Beard17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/BiglariF17,
author = {Mehrdad Biglari and
Dietmar Fey},
title = {Memristive voltage divider: a bipolar ReRAM-based unit for non-volatile
flip-flops},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {217--222},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132432},
doi = {10.1145/3132402.3132432},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/BiglariF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/CampoC17,
author = {Fernando Martin del Campo and
Paul Chow},
title = {Task replication and control for highly parallel in-memory stores},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {312--326},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132428},
doi = {10.1145/3132402.3132428},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/CampoC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/ChouJQ17,
author = {Chia{-}Chen Chou and
Aamer Jaleel and
Moinuddin K. Qureshi},
title = {{BATMAN:} techniques for maximizing system bandwidth of memory systems
with stacked-DRAM},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {268--280},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132404},
doi = {10.1145/3132402.3132404},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/ChouJQ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/CongFGJR17,
author = {Jason Cong and
Zhenman Fang and
Michael Gill and
Farnoosh Javadi and
Glenn Reinman},
title = {{AIM:} accelerating computational genomics through scalable and noninvasive
accelerator-interposed memory},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {3--14},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132406},
doi = {10.1145/3132402.3132406},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/CongFGJR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/DoudaliG17,
author = {Thaleia Dimitra Doudali and
Ada Gavrilovska},
title = {CoMerge: toward efficient data placement in shared heterogeneous memory
systems},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {251--261},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132418},
doi = {10.1145/3132402.3132418},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/DoudaliG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/FedorovKQGR17,
author = {Viacheslav V. Fedorov and
Jinchun Kim and
Mian Qin and
Paul V. Gratz and
A. L. Narasimha Reddy},
title = {Speculative paging for future {NVM} storage},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {399--410},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132409},
doi = {10.1145/3132402.3132409},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/FedorovKQGR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/GarciaJWD17,
author = {Andr{\'{e}}s Amaya Garc{\'{\i}}a and
Ren{\'{e}} de Jong and
William Wang and
Stephan Diestelhorst},
title = {Composing lifetime enhancing techniques for non-volatile main memories},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {363--373},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132411},
doi = {10.1145/3132402.3132411},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/GarciaJWD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/GargY17,
author = {Kartikay Garg and
Jeffrey S. Young},
title = {Evaluating hybrid memory cube infrastructure to support high-performance
sparse algorithms},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {112--114},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132435},
doi = {10.1145/3132402.3132435},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/GargY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/GarmanGS17,
author = {Christopher Garman and
Xiaochen Guo and
Michael F. Spear},
title = {A study of unnecessary write backs},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {127--129},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132438},
doi = {10.1145/3132402.3132438},
timestamp = {Thu, 19 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/GarmanGS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/HameedMC17,
author = {Fazal Hameed and
Christian Menard and
Jer{\'{o}}nimo Castrill{\'{o}}n},
title = {Efficient {STT-RAM} last-level-cache architecture to replace {DRAM}
cache},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {141--151},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132414},
doi = {10.1145/3132402.3132414},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/HameedMC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/HealyH17,
author = {Michael B. Healy and
Seokin Hong},
title = {CramSim: controller and memory simulator},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {83--85},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132408},
doi = {10.1145/3132402.3132408},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/HealyH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/HemaniBG17,
author = {Rakhi Hemani and
Subhasis Banerjee and
Apala Guha},
title = {The interaction of last-level-cache mechanisms on modern processors},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {249--250},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132425},
doi = {10.1145/3132402.3132425},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/HemaniBG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/Jagtap0EWHW17,
author = {Radhika Jagtap and
Matthias Jung and
Wendy Elsasser and
Christian Weis and
Andreas Hansson and
Norbert Wehn},
title = {Integrating {DRAM} power-down modes in gem5 and quantifying their
impact},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {86--95},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132444},
doi = {10.1145/3132402.3132444},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/Jagtap0EWHW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/JinTPS17,
author = {Yanqin Jin and
Hung{-}Wei Tseng and
Yannis Papakonstantinou and
Steven Swanson},
title = {Improving {SSD} lifetime with byte-addressable metadata},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {374--384},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132420},
doi = {10.1145/3132402.3132420},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/JinTPS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/KerseyKY17,
author = {Chad D. Kersey and
Hyesoon Kim and
Sudhakar Yalamanchili},
title = {Lightweight {SIMT} core designs for intelligent 3D stacked {DRAM}},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {49--59},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132426},
doi = {10.1145/3132402.3132426},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/KerseyKY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/KnyagininS17,
author = {Dmitry Knyaginin and
Per Stenstr{\"{o}}m},
title = {Rock: a framework for pruning the design space of hybrid main memory
systems},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {337--347},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132412},
doi = {10.1145/3132402.3132412},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/KnyagininS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/Leon17,
author = {Edgar A. Le{\'{o}}n},
title = {mpibind: a memory-centric affinity algorithm for hybrid applications},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {262--264},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132415},
doi = {10.1145/3132402.3132415},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/Leon17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/LiOZ17,
author = {Mengjie Li and
Matheus Ogleari and
Jishen Zhao},
title = {Logging in persistent memory: to cache, or not to cache?},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {177--179},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132429},
doi = {10.1145/3132402.3132429},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/LiOZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/LloydG17,
author = {G. Scott Lloyd and
Maya B. Gokhale},
title = {Near memory key/value lookup acceleration},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {26--33},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132434},
doi = {10.1145/3132402.3132434},
timestamp = {Mon, 20 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/LloydG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/MalekVPTS17,
author = {Alirad Malek and
Evangelos Vasilakis and
Vassilis Papaefstathiou and
Pedro Trancoso and
Ioannis Sourdis},
title = {Odd-ECC: on-demand {DRAM} error correcting codes},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {96--111},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132443},
doi = {10.1145/3132402.3132443},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/MalekVPTS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/MathewZ0KWJW17,
author = {Deepak M. Mathew and
{\'{E}}der F. Zulian and
Matthias Jung and
Kira Kraft and
Christian Weis and
Bruce L. Jacob and
Norbert Wehn},
title = {Using run-time reverse-engineering to optimize {DRAM} refresh},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {115--124},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132419},
doi = {10.1145/3132402.3132419},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/MathewZ0KWJW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/MizrachiBC17,
author = {Kfir Mizrachi and
Ilan Bloom and
Yuval Cassuto},
title = {Memory reliability for cells with strong bit-coupling interference},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {196--204},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132413},
doi = {10.1145/3132402.3132413},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/MizrachiBC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/PourshiraziZ17,
author = {Bahareh Pourshirazi and
Zhichun Zhu},
title = {{NEMO:} an energy-efficient hybrid main memory system for mobile devices},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {351--362},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132445},
doi = {10.1145/3132402.3132445},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/PourshiraziZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/QayumBC17,
author = {Mohammad A. Qayum and
Abdel{-}Hameed A. Badawy and
Jeanine E. Cook},
title = {DyAdHyTM: a low overhead dynamically adaptive hybrid transactional
memory with application to large graphs},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {327--336},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132442},
doi = {10.1145/3132402.3132442},
timestamp = {Fri, 24 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/QayumBC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/ReedANS17,
author = {Elizabeth Reed and
Alaa R. Alameldeen and
Helia Naeimi and
Patrick Stolt},
title = {Probabilistic replacement strategies for improving the lifetimes of
NVM-based caches},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {166--176},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132433},
doi = {10.1145/3132402.3132433},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/ReedANS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/RimborgTC17,
author = {Mats Rimborg and
Pedro Trancoso and
Gunnar Carlstedt},
title = {{PHOENIX:} efficient computation in memory},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {15--25},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132430},
doi = {10.1145/3132402.3132430},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/RimborgTC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/SaadeldeenDSC17,
author = {Heba Saadeldeen and
Zhaoxia Deng and
Timothy Sherwood and
Frederic T. Chong},
title = {Thermal-aware, heterogeneous materials for improved energy and reliability
in 3D {PCM} architectures},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {223--236},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132407},
doi = {10.1145/3132402.3132407},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/SaadeldeenDSC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/SeyedzadehKJM17,
author = {Seyed Mohammad Seyedzadeh and
Donald Kline Jr. and
Alex K. Jones and
Rami G. Melhem},
title = {Mitigating bitline crosstalk noise in {DRAM} memories},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {205--216},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132410},
doi = {10.1145/3132402.3132410},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/SeyedzadehKJM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/SiddiqueB17,
author = {Nafiul Alam Siddique and
Abdel{-}Hameed A. Badawy},
title = {SprBlk cache: enabling fault resilience at low voltages},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {130--140},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132441},
doi = {10.1145/3132402.3132441},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/SiddiqueB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/SiddiqueBCR17,
author = {Nafiul Alam Siddique and
Abdel{-}Hameed A. Badawy and
Jeanine E. Cook and
David Resnick},
title = {LMStr: exploring shared hardware controlled scratchpad memory for
multicores},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {152--165},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132440},
doi = {10.1145/3132402.3132440},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/SiddiqueBCR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/SieglBB17,
author = {Patrick Siegl and
Rainer Buchty and
Mladen Berekovic},
title = {A bandwidth accurate, flexible and rapid simulating multi-HMC modeling
tool},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {71--82},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132403},
doi = {10.1145/3132402.3132403},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/SieglBB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/TannuCQ17,
author = {Swamit S. Tannu and
Douglas M. Carmean and
Moinuddin K. Qureshi},
title = {Cryogenic-DRAM based memory system for scalable quantum computers:
a feasibility study},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {189--195},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132436},
doi = {10.1145/3132402.3132436},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/TannuCQ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/TavanaZAKDK17,
author = {Mohammad Khavari Tavana and
Amir Kavyan Ziabari and
Mohammad Arjomand and
Mahmut T. Kandemir and
Chita R. Das and
David R. Kaeli},
title = {{REMAP:} a reliability/endurance mechanism for advancing {PCM}},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {385--398},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132421},
doi = {10.1145/3132402.3132421},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/TavanaZAKDK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/TineY17,
author = {Blaise{-}Pascal Tine and
Sudhakar Yalamanchili},
title = {Pagevault: securing off-chip memory using page-based authentication},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {293--304},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132439},
doi = {10.1145/3132402.3132439},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/TineY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/WareGLMVWHB17,
author = {Frederick A. Ware and
Liji Gopalakrishnan and
Eric Linstadt and
Sally A. McKee and
Thomas Vogelsang and
Kenneth L. Wright and
Craig Hampel and
Gary Bronner},
title = {Do superconducting processors really need cryogenic memories?: the
case for cold {DRAM}},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {183--188},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132424},
doi = {10.1145/3132402.3132424},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/WareGLMVWHB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/YeDJ17,
author = {Chencheng Ye and
Chen Ding and
Hai Jin},
title = {Memory equalizer for lateral management of heterogeneous memory},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {239--248},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132437},
doi = {10.1145/3132402.3132437},
timestamp = {Tue, 28 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/YeDJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/ZengG17,
author = {Yuan Zeng and
Xiaochen Guo},
title = {Long short term memory based hardware prefetcher: a case study},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {305--311},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132405},
doi = {10.1145/3132402.3132405},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/ZengG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/memsys/2017,
title = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3132402},
isbn = {978-1-4503-5335-9},
timestamp = {Fri, 13 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/2017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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