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@inproceedings{DBLP:conf/iscas/AdriaensenR94,
author = {Karel Adriaensen and
Pascal Roobrouck},
title = {Synchronous Traffic to Asynchronous Switch-Fabric Shaper},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {151--154},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409220},
doi = {10.1109/ISCAS.1994.409220},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AdriaensenR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Al-ArianB94,
author = {Sami A. Al{-}Arian and
Randy E. Bolling},
title = {Improving the Testability of {VLSI} Circuits through Partitioning},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {199--202},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409231},
doi = {10.1109/ISCAS.1994.409231},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Al-ArianB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AlbaharnaCC94,
author = {Osama T. Albaharna and
Peter Y. K. Cheung and
Thomas J. Clarke},
title = {Virtual Hardware and the Limits of Computational Speed-up},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {159--162},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409222},
doi = {10.1109/ISCAS.1994.409222},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AlbaharnaCC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AnneRSPB94,
author = {Pramod Anne and
Aditya Reddy and
Naveed A. Sherwani and
Anand Panyam and
Siddharth Bhingarde},
title = {Comparative Analysis of New {CMOS} Leaf Cells for {OTC} Routing},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {191--194},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409229},
doi = {10.1109/ISCAS.1994.409229},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AnneRSPB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BaekNLOH94,
author = {Jongseob Baek and
Seunghyun Nam and
Moonkey Lee and
Chuldong Oh and
Kisoo Hwang},
title = {A Fast Array Architecture for Block Matching Algorithm},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {211--214},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409234},
doi = {10.1109/ISCAS.1994.409234},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BaekNLOH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BaschirottoBCGPRRRT94,
author = {Andrea Baschirotto and
M. Bosetti and
Rinaldo Castello and
Alberto Gola and
Gianluigi Ezio Pessina and
Pier Giorgio Rancoita and
M. Rattaggi and
M. Redaelli and
G. Terzi},
title = {High Speed Monolithic Read-Out System for High Energy Physics Experiments},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {107--110},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409209},
doi = {10.1109/ISCAS.1994.409209},
timestamp = {Fri, 07 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BaschirottoBCGPRRRT94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BolchiniBSS94,
author = {Cristiana Bolchini and
Giacomo Buonanno and
Donatella Sciuto and
Renato Stefanelli},
title = {{CMOS} Reliability Improvements Through a New Fault Tolerant Technique},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {83--86},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409202},
doi = {10.1109/ISCAS.1994.409202},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BolchiniBSS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BollingA94,
author = {Randy E. Bolling and
Sami A. Al{-}Arian},
title = {Reconfigurable Linear Feedback Register Design, Analysis {\&}
Applications},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {87--90},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409203},
doi = {10.1109/ISCAS.1994.409203},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BollingA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BraceyRH94,
author = {Mark Bracey and
William Redman{-}White and
John B. Hughes},
title = {A Switched-Current Sigma Delta Converter for Direct Photodiode Interfacing},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {287--290},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409253},
doi = {10.1109/ISCAS.1994.409253},
timestamp = {Tue, 05 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BraceyRH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BrownHDA94,
author = {James E. C. Brown and
Paul J. Hurst and
Lawrence Der and
Iskender Agi},
title = {A Comparison of Analog {DFE} Architectures for Disk-Drive Applications},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {99--102},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409206},
doi = {10.1109/ISCAS.1994.409206},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BrownHDA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BurlesonCKC94,
author = {Wayne P. Burleson and
Leonard W. Cotten and
Fabian Klass and
Maciej J. Ciesielski},
title = {Forum: Wave-pipelining: Is it Practical?},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {163--166},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409223},
doi = {10.1109/ISCAS.1994.409223},
timestamp = {Fri, 16 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BurlesonCKC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CherkauerF94,
author = {Brian S. Cherkauer and
Eby G. Friedman},
title = {Unification of Speed, Power, Area {\&} Reliability in {CMOS} Tapered
Buffer Design},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {111--114},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409210},
doi = {10.1109/ISCAS.1994.409210},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/CherkauerF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Ciocoiu94,
author = {Iulian B. Ciocoiu},
title = {Circuit Implementation of a Nonmonotone Activation Function},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {363--366},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409272},
doi = {10.1109/ISCAS.1994.409272},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Ciocoiu94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ClarkNS94,
author = {C. T. Clark and
Graham R. Nudd and
S. Summerfield},
title = {Current Mode Techniques for Multiple Valued Arithmetic and Logic},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {279--282},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409251},
doi = {10.1109/ISCAS.1994.409251},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ClarkNS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DelbruckM94,
author = {Tobi Delbr{\"{u}}ck and
Carver Mead},
title = {Adaptive Photoreceptor with Wide Dynamic Range},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {339--342},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409266},
doi = {10.1109/ISCAS.1994.409266},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/DelbruckM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DempsterM94,
author = {Andrew G. Dempster and
Malcolm D. Macleod},
title = {Use of Multiplier Blocks to Reduce Filter Complexity},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {263--266},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409247},
doi = {10.1109/ISCAS.1994.409247},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DempsterM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DucNM94,
author = {Philippe Duc and
Didier Nicoulaz and
Daniel Mlynek},
title = {A {RISC} Controller with Customisation Facility for Flexible System
Integration},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {251--254},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409244},
doi = {10.1109/ISCAS.1994.409244},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DucNM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/El-ZeinHC94,
author = {Ali El{-}Zein and
Monjurul Haque and
Salim Chowdhury},
title = {Simulating Nonuniform Lossy Lines with Frequency Dependent Parameters
by the Method of Characteristics},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {327--330},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409263},
doi = {10.1109/ISCAS.1994.409263},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/El-ZeinHC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FahmiESS94,
author = {Maher N. Fahmi and
Fayez El Guibaly and
Sreenivasachar Sunder and
Dale J. Shpak},
title = {Design of Novel Serial-Parallel Inner-Product Processors},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {55--58},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409195},
doi = {10.1109/ISCAS.1994.409195},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/FahmiESS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FennTB94,
author = {Sebastian T. J. Fenn and
David Taylor and
Mohammed Benaissa},
title = {A Dual Basis Systolic Divider for GF(2\({}^{\mbox{m}}\))},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {307--310},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409258},
doi = {10.1109/ISCAS.1994.409258},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/FennTB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FriedmanKVAHY94,
author = {Eby G. Friedman and
Sung{-}Mo Kang and
Eric A. Vittoz and
David J. Allstot and
Erik P. Harris and
Ran{-}Hong Yan},
title = {Forum: From 100 Milliwatts/MIPS to 10 Microwatts/MIPS},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {1--6},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409182},
doi = {10.1109/ISCAS.1994.409182},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/FriedmanKVAHY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GaoS94,
author = {Weinan Gao and
W. Martin Snelgrove},
title = {Floating Gate Charge-Sharing: a Novel Circuit for Analog Trimming},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {315--318},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409260},
doi = {10.1109/ISCAS.1994.409260},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GaoS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GhannoumCS94,
author = {Sameh Ghannoum and
Dmitri Chtchvyrkov and
Yvon Savaria},
title = {A Comparative Study of Single-Phase Clocked Latches Using Estimation
Criteria},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {347--350},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409268},
doi = {10.1109/ISCAS.1994.409268},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GhannoumCS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GolshanH94,
author = {Reza Golshan and
Baher Haroun},
title = {A Novel Reduced Swing {CMOS} Bus Interface Circuit for High Speed
Low Power {VLSI} Systems},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {351--354},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409269},
doi = {10.1109/ISCAS.1994.409269},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GolshanH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GuE94,
author = {Richard X. Gu and
Mohamed I. Elmasry},
title = {An All-N-Logic High-Speed Single-Phase Dynamic {CMOS} Logic},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {7--10},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409183},
doi = {10.1109/ISCAS.1994.409183},
timestamp = {Mon, 18 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GuE94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GuoLJ94,
author = {Jiun{-}In Guo and
Chi{-}Min Liu and
Chein{-}Wei Jen},
title = {A General Approach to Design {VLSI} Arrays for the Multi-dimensional
Discrete Hartley Transform},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {235--238},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409240},
doi = {10.1109/ISCAS.1994.409240},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GuoLJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GuptaC94,
author = {Gagan Gupta and
Chaitali Chakrabarti},
title = {{VLSI} Architectures for Hierarchical Block Matching},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {215--218},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409235},
doi = {10.1109/ISCAS.1994.409235},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GuptaC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HamidaKS94,
author = {Naim Ben{-}Hamida and
Bozena Kaminska and
Yvon Savaria},
title = {Pseudo-Random Vector Compaction for Sequential Testability},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {63--66},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409197},
doi = {10.1109/ISCAS.1994.409197},
timestamp = {Fri, 17 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/HamidaKS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HaqueEC94,
author = {Monjurul Haque and
Ali El{-}Zein and
Salim Chowdhury},
title = {Transient Simulation of Nonuniform Transmission Lines by Asymptotic
Waveform Evaluation},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {331--334},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409264},
doi = {10.1109/ISCAS.1994.409264},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HaqueEC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HarrerNRC94,
author = {Hubert Harrer and
Josef A. Nossek and
Tam{\'{a}}s Roska and
Leon O. Chua},
title = {A Current-Mode {DTCNN} Universal Chip},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {135--138},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409215},
doi = {10.1109/ISCAS.1994.409215},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HarrerNRC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuangCC94,
author = {Sheng{-}Chieh Huang and
Liang{-}Gee Chen and
Thou{-}Ho Chen},
title = {The Chip Design of {A} 32-b Logarithmic Number System},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {167--170},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409224},
doi = {10.1109/ISCAS.1994.409224},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HuangCC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuangR94,
author = {Qiuting Huang and
Robert Rogenmoser},
title = {A Glitch-Free Single-Phase {CMOS} {DFF} for Gigahertz Applications},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {11--14},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409184},
doi = {10.1109/ISCAS.1994.409184},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HuangR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuangW94,
author = {Hong{-}Yi Huang and
Chung{-}Yu Wu},
title = {New {CMOS} Differential Logic Circuits for True-Single-Phase Pipelined
Systems},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {15--18},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409185},
doi = {10.1109/ISCAS.1994.409185},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HuangW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JamaliRKE94,
author = {Mohsin M. Jamali and
S. Ravindranath and
Subhash C. Kwatra and
A. G. Eldin},
title = {{ASIC} Design of a Generalized Covariance Matrix Processor for {DOA}
Algorithms},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {75--78},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409200},
doi = {10.1109/ISCAS.1994.409200},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JamaliRKE94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KadimT94,
author = {H. J. Kadim and
G. E. Taylor},
title = {Logic Value Assignment Contribution to Testability Analysis},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {195--198},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409230},
doi = {10.1109/ISCAS.1994.409230},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KadimT94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KarkadaCS94,
author = {Srikanth Karkada and
Chaitali Chakrabarti and
Andreas Spanias},
title = {High Sample Rate Architectures for Block Adaptive Filters},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {131--134},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409214},
doi = {10.1109/ISCAS.1994.409214},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KarkadaCS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KhooJ94,
author = {Kei{-}Yong Khoo and
Alan N. Willson Jr.},
title = {Low Power {CMOS} Clock Buffer},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {355--358},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409270},
doi = {10.1109/ISCAS.1994.409270},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KhooJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimKS94,
author = {Jaewon Kim and
Sung{-}Mo Kang and
Sachin S. Sapatnekar},
title = {High Performance {CMOS} Macromodule Layout Synthesis},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {179--182},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409219},
doi = {10.1109/ISCAS.1994.409219},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KimKS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimPKJK94,
author = {Daejong Kim and
Jaejin Park and
Sungjoon Kim and
Deog{-}Kyoon Jeong and
Wonchan Kim},
title = {A Multibit Delta-Sigma {D/A} Converter Using a Charge Integrating
Sub-Converter},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {319--322},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409261},
doi = {10.1109/ISCAS.1994.409261},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KimPKJK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimWG94,
author = {Beomsup Kim and
Todd C. Weigandt and
Paul R. Gray},
title = {{PLL/DLL} System Noise Analysis for Low Jitter Clock Synthesizer Design},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {31--34},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409189},
doi = {10.1109/ISCAS.1994.409189},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KimWG94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KlassFG94,
author = {Fabian Klass and
Michael J. Flynn and
Ad J. van de Goor},
title = {A 16x16-bit Static {CMOS} Wave-Pipelined Multiplier},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {143--146},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409217},
doi = {10.1109/ISCAS.1994.409217},
timestamp = {Tue, 25 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KlassFG94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KuCCJ94,
author = {Chung{-}Wei Ku and
Liang{-}Gee Chen and
Tzi{-}Dar Chiueh and
Her{-}Ming Jong},
title = {Tree-Structure Architecture and {VLSI} Implementation for Vector Quantization
Algorithms},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {139--142},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409216},
doi = {10.1109/ISCAS.1994.409216},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KuCCJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KuoSL94,
author = {James B. Kuo and
K. W. Su and
J. H. Lou},
title = {A BiCMOS Dynamic Multiplier Using Wallace Tree Reduction Architecture
and 1.5V Full-Swing BiCMOS Dynamic Logic Circuit},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {323--326},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409262},
doi = {10.1109/ISCAS.1994.409262},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KuoSL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Lam94,
author = {Stephen P. S. Lam},
title = {A 2\({}^{\mbox{1}}\)/\({}_{\mbox{2}}\)-Dimensional Systolic Array
Architecture},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {243--246},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409242},
doi = {10.1109/ISCAS.1994.409242},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Lam94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiuM94,
author = {Shih{-}Chii Liu and
Carver Mead},
title = {Continuous-Time Adaptive Delay System},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {119--122},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409212},
doi = {10.1109/ISCAS.1994.409212},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LiuM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LuckeC94,
author = {Lori Lucke and
Chaitali Chakrabarti},
title = {A Digit-Serial Architecture for Gray-Scale Morphological Filtering},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {207--210},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409233},
doi = {10.1109/ISCAS.1994.409233},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LuckeC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MadhwapathySBP94,
author = {Sreekrishna Madhwapathy and
Naveed A. Sherwani and
Siddharth Bhingarde and
Anand Panyam},
title = {An Efficient Four Layer Over-the-Cell Router},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {187--190},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409228},
doi = {10.1109/ISCAS.1994.409228},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MadhwapathySBP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ManSNS94,
author = {Erik De Man and
Matthias Sch{\"{o}}binger and
Tobias G. Noll and
Georg Sebald},
title = {A 60-MBaud Single-Chip QAM-Processor for the Complete Base-Band Signal
Processing of {QAM} Demodulators},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {275--278},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409250},
doi = {10.1109/ISCAS.1994.409250},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ManSNS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MariatosMHG94,
author = {Evaggelinos P. Mariatos and
D. E. Metafas and
John Ant. Hallas and
Constantinos E. Goutis},
title = {A Fast {DCT} Processor, Based on Special Purpose {CORDIC} Rotators},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {271--274},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409249},
doi = {10.1109/ISCAS.1994.409249},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MariatosMHG94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MeadorH94,
author = {Jack L. Meador and
Paul Hylander},
title = {A Pulse Coded Winner-Take-All Circuit},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {299--302},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409256},
doi = {10.1109/ISCAS.1994.409256},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MeadorH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MidtgaardS94,
author = {Jacob Midtgaard and
Christer Svensson},
title = {5.8Gb/s 16: 1 Multiplexer and 1: 16 Demultiplexer Using 1.2{\(\mathrm{\mu}\)}m
BiCMOS},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {43--46},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409192},
doi = {10.1109/ISCAS.1994.409192},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MidtgaardS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NekiliSB94,
author = {Mohamed Nekili and
Yvon Savaria and
Guy Bois},
title = {A Fast Low-Power Driver for Long Interconnections in {VLSI} Systems},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {343--346},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409267},
doi = {10.1109/ISCAS.1994.409267},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/NekiliSB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NevesF94,
author = {Jos{\'{e}} Luis Neves and
Eby G. Friedman},
title = {Circuit Synthesis of Clock Distribution Networks Based on Non-Zero
Clock Skew},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {175--178},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409226},
doi = {10.1109/ISCAS.1994.409226},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/NevesF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NourjiD94,
author = {Kamal Nourji and
Nicolas Demassieux},
title = {Optimization of Real-Time {VLSI} Architectures for Distributed Arithmetic-Based
Algorithms: Application to {HDTV} Filters},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {223--226},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409237},
doi = {10.1109/ISCAS.1994.409237},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/NourjiD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PaliourasS94,
author = {Vassilis Paliouras and
Thanos Stouraitis},
title = {Systematic Design of Multi-Modulus/Multi-Function Residue Number System
Processors},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {79--82},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409201},
doi = {10.1109/ISCAS.1994.409201},
timestamp = {Sun, 04 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PaliourasS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PassosSB94,
author = {Nelson L. Passos and
Edwin Hsing{-}Mean Sha and
Steven C. Bass},
title = {Partitioning and Retiming of Multi-Dimensional Systems},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {227--230},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409238},
doi = {10.1109/ISCAS.1994.409238},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PassosSB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PatyraL94,
author = {Marek J. Patyra and
John E. Long},
title = {Synthesis of Current Mode Building Blocks for Fuzzy Logic Control
Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {283--286},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409252},
doi = {10.1109/ISCAS.1994.409252},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PatyraL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PlanetP94,
author = {Patricia Planet and
Gilles Privat},
title = {Convergence Control of Relaxation Processes with Fine-Grain Locally-Connected
Two-Scale Automata Networks},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {219--222},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409236},
doi = {10.1109/ISCAS.1994.409236},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PlanetP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RajIBBDMW94,
author = {V. K. Raj and
R. V. Idate and
A. W. Booth and
M. Botlo and
J. Dorenbosch and
E. C. Milner and
E. M. Wang},
title = {Design of an {ASIC} to Implement a New Data Tranfer Protocol for High
Energy Physics},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {39--42},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409191},
doi = {10.1109/ISCAS.1994.409191},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RajIBBDMW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RamaswamyM94,
author = {Arun Ramaswamy and
Wasfy B. Mikhael},
title = {An Efficient Coding Technique for Multi-Transform Image Representation},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {71--74},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409199},
doi = {10.1109/ISCAS.1994.409199},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RamaswamyM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Ramirez-AnguloTD94,
author = {Jaime Ram{\'{\i}}rez{-}Angulo and
Kevin Treece and
Mark DeYong},
title = {Real Time Solution of Laplace equation using Analog {VLSI} Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {95--98},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409205},
doi = {10.1109/ISCAS.1994.409205},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Ramirez-AnguloTD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RenaudinH94,
author = {Marc Renaudin and
Bachar El{-}Hassan},
title = {The Design of Fast Asynchronous Adder Structures and their Implementation
Using {D.C.V.S.} Logic},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {291--294},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409254},
doi = {10.1109/ISCAS.1994.409254},
timestamp = {Sat, 21 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RenaudinH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SagishimaKHKAOS94,
author = {Takayuki Sagishima and
Kozo Kimura and
Hiroaki Hirata and
Tokuzo Kiyohara and
Shigeo Asahara and
Takao Onoye and
Isao Shirakawa},
title = {Multi-Threaded Processor for Image Generation},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {231--234},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409239},
doi = {10.1109/ISCAS.1994.409239},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SagishimaKHKAOS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SavariaCC94,
author = {Yvon Savaria and
Dmitri Chtchvyrkov and
John F. Currie},
title = {A Fast {CMOS} Voltage-Controlled Ring Oscillator},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {359--362},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409271},
doi = {10.1109/ISCAS.1994.409271},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SavariaCC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SchinSL94,
author = {D. Schin and
Yinan N. Shen and
Fabrizio Lombardi},
title = {An Approach for {UIO} Generation for {FSM} Verification and Validation},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {303--306},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409257},
doi = {10.1109/ISCAS.1994.409257},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SchinSL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ShakibaJM94,
author = {Mohammad Hossein Shakiba and
David A. Johns and
Kenneth W. Martin},
title = {Analog Implementation of Class-IV Partial-Response Viterbi Detector},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {91--94},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409204},
doi = {10.1109/ISCAS.1994.409204},
timestamp = {Tue, 05 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ShakibaJM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SharafE94,
author = {Khaled M. Sharaf and
Mohamed I. Elmasry},
title = {BiCMOS Active-Pull-Down Non-Threshold Logic Cicuits for High-Speed
Low-Power Applications},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {19--22},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409186},
doi = {10.1109/ISCAS.1994.409186},
timestamp = {Mon, 18 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SharafE94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ShenTD94,
author = {Wen{-}Zen Shen and
Yi{-}Hsin Tao and
Lan{-}Rong Dung},
title = {On the Reduction of Recorder Buffer Size for Discrete Fourier Transform
Processor Design},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {171--174},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409225},
doi = {10.1109/ISCAS.1994.409225},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ShenTD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ShewYHL94,
author = {Paul{-}Waie Shew and
Jin{-}Tai Yan and
Pei{-}Yung Hsiao and
Yong{-}Ching Lim},
title = {Efficient Algorithms for Two and Three-Layer Over-the-Cell Channel
Routing},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {183--186},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409227},
doi = {10.1109/ISCAS.1994.409227},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ShewYHL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ShinJK94,
author = {Kyung{-}Wook Shin and
Heung{-}Woo Jeon and
Yong{-}Seum Kang},
title = {An Efficient {VLSI} Implementation of Vector-Radix 2-D {DCT} using
Mesh-Connected 2-D Array},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {47--50},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409193},
doi = {10.1109/ISCAS.1994.409193},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ShinJK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SimonBSN94,
author = {Sven Simon and
Ernst G. Bernard and
Matthias Sauer and
Josef A. Nossek},
title = {A New Retiming Algorithm for Circuit Design},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {35--38},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409190},
doi = {10.1109/ISCAS.1994.409190},
timestamp = {Tue, 05 Dec 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/SimonBSN94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SrinivasP94,
author = {Hosahalli R. Srinivas and
Keshab K. Parhi},
title = {A Fast Radix-4 Division Algorithm},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {311--314},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409259},
doi = {10.1109/ISCAS.1994.409259},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SrinivasP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SutiknoKO94,
author = {Sarwono Sutikno and
Mineo Kaneko and
Mahoki Onoda},
title = {A Distributed Reconfiguration Controller for Linear Array Harvest
Problem: Hierarchically Quasi-Normalized Neural Approach},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {67--70},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409198},
doi = {10.1109/ISCAS.1994.409198},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SutiknoKO94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TanEW94,
author = {Nianxiong Tan and
Sven Eriksson and
Lars Wanhammar},
title = {A Power-Saving Technique for Bit-Serial {DSP} ASICs},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {51--54},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409194},
doi = {10.1109/ISCAS.1994.409194},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TanEW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TanEW94a,
author = {Nianxiong Tan and
Sven Eriksson and
Lars Wanhammar},
title = {A Novel Bit-Serial Design of Comb Filters for Oversampling {A/D} Converters},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {259--262},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409246},
doi = {10.1109/ISCAS.1994.409246},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TanEW94a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TawfikGA94,
author = {A. Tawfik and
Fayez El Guibaly and
Panajotis Agathoklis},
title = {{VLSI} Array Processors Implementation of Block-State {IIR} Digital
Filtentrs},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {267--270},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409248},
doi = {10.1109/ISCAS.1994.409248},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TawfikGA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TsengCW94,
author = {Yuh{-}Kuang Tseng and
Kuo{-}Hsing Cheng and
Chung{-}Yu Wu},
title = {Feedback-Controlled Enhance-Pull-Down BiCMOS for Sub-3-V Digital Circuit},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {23--26},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409187},
doi = {10.1109/ISCAS.1994.409187},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TsengCW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/VaupelM94,
author = {Martin Vaupel and
Heinrich Meyr},
title = {High Speed FIR-Filter Architectures with Scalable Sample Rates},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {127--130},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409207},
doi = {10.1109/ISCAS.1994.409207},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/VaupelM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/VazquezRH94,
author = {Diego V{\'{a}}zquez and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {A Low-Cost Strategy for Testing Analog Filters},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {123--126},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409213},
doi = {10.1109/ISCAS.1994.409213},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/VazquezRH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangCL94,
author = {Ping{-}Tsung Wang and
Kun{-}Nen Chen and
Yen{-}Tai Lai},
title = {A High Performance {FPGA} with Hierarchical Interconnection Structure},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {239--242},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409241},
doi = {10.1109/ISCAS.1994.409241},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WangCL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangWJM94,
author = {June Wang and
Zhongde Wang and
Graham A. Jullien and
William C. Miller},
title = {Area-Time Analysis of Carry Lookahead Adders Using Enhanced Multiple
Output Domino Logic},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {59--62},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409196},
doi = {10.1109/ISCAS.1994.409196},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WangWJM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Wei94,
author = {Shyue{-}Win Wei},
title = {{VLSI} Architectures for Computing Exponentiations, Multiplicative
Inverses, and Divisions in GF(2\({}^{\mbox{m}}\))},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {203--206},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409232},
doi = {10.1109/ISCAS.1994.409232},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Wei94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WeigandtKG94,
author = {Todd C. Weigandt and
Beomsup Kim and
Paul R. Gray},
title = {Analysis of Timing Jitter in {CMOS} Ring Oscillators},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {27--30},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409188},
doi = {10.1109/ISCAS.1994.409188},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WeigandtKG94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WilliamsN94,
author = {Maini Williams and
Jari Nurmi},
title = {Multipurpose Chip for Physiological Measurements},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {255--258},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409245},
doi = {10.1109/ISCAS.1994.409245},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WilliamsN94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WoodburnRM94,
author = {Robin Woodburn and
H. Martin Reekie and
Alan F. Murray},
title = {Pulse-Stream Circuits for On-Chip Learning in Analogue {VLSI} Neural
Networks},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {103--106},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409208},
doi = {10.1109/ISCAS.1994.409208},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WoodburnRM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WuC94,
author = {Cheng{-}Wen Wu and
Yung{-}Fa Chou},
title = {General Modular Multiplication by Block Multiplication and Table Lookup},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {295--298},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409255},
doi = {10.1109/ISCAS.1994.409255},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WuC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WuL94,
author = {An{-}Yeu Wu and
K. J. Ray Liu},
title = {A Low-Power and Low-Complexity {DCT/IDCT} {VLSI} Architecture Based
On Backward Chebyshev Recursion},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {155--158},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409221},
doi = {10.1109/ISCAS.1994.409221},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WuL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YajnikJ94a,
author = {Shalini Yajnik and
Niraj K. Jha},
title = {Synthesis of Fault Tolerant Architectures for Molecular Dynamics},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {247--250},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409243},
doi = {10.1109/ISCAS.1994.409243},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/YajnikJ94a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YangL94,
author = {Ren{-}Yang Yang and
Chen{-}Yi Lee},
title = {High-Throughput Data Compressor Designs Using Content Addressable
Memory},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {147--150},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409218},
doi = {10.1109/ISCAS.1994.409218},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/YangL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YuG94,
author = {Chong{-}Gun Yu and
Randall L. Geiger},
title = {An Accurate and Matching-Free Threshold Voltage Extraction Scheme
for {MOS} Transistors},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {115--118},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409211},
doi = {10.1109/ISCAS.1994.409211},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/YuG94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhouCJM94,
author = {P. Zhou and
J. C. Czilli and
Graham A. Jullien and
William C. Miller},
title = {Current Input {TSPC} Latch for High Speed, Complex Switching Trees},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {335--338},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409265},
doi = {10.1109/ISCAS.1994.409265},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZhouCJM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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