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export results for "toc:db/conf/hotchips/hotchips2020.bht:"
@inproceedings{DBLP:conf/hotchips/0058XLSGLLHLCLP20, author = {Chen Chen and Xiaoyan Xiang and Chang Liu and Yunhai Shang and Ren Guo and Dongqi Liu and Yimin Lu and Ziyi Hao and Jiahui Luo and Zhijian Chen and Chunqiang Li and Yu Pu and Jianyi Meng and Xiaolang Yan and Yuan Xie and Xiaoning Qi}, title = {Xuantie-910: Innovating Cloud and Edge Computing by {RISC-V}}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--19}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220630}, doi = {10.1109/HCS49909.2020.9220630}, timestamp = {Tue, 20 Oct 2020 15:27:17 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/0058XLSGLLHLCLP20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/AgrawalK20, author = {Anurag Agrawal and Changhoon Kim}, title = {Intel Tofino2 - {A} 12.9Tbps P4-Programmable Ethernet Switch}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--32}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220636}, doi = {10.1109/HCS49909.2020.9220636}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/AgrawalK20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/AndrewsG20, author = {Jeff Andrews and Mark Grossman}, title = {Xbox Series {X} System Architecture}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--29}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220538}, doi = {10.1109/HCS49909.2020.9220538}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/AndrewsG20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/AroraBW20, author = {Sonu Arora and Dan Bouvier and Chris Weaver}, title = {{AMD} Next Generation 7NM Ryzen{\texttrademark} 4000 {APU} "Renoir"}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--30}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220414}, doi = {10.1109/HCS49909.2020.9220414}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/AroraBW20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/BajicV20, author = {Ljubisa Bajic and Jasmina Vasiljevic}, title = {Compute substrate for Software 2.0}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--31}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220687}, doi = {10.1109/HCS49909.2020.9220687}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/BajicV20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/Belov20, author = {Dan Belov}, title = {{AI} Research at Scale-Opportunities on the Road Ahead}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--88}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220397}, doi = {10.1109/HCS49909.2020.9220397}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/Belov20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/Blythe20, author = {David Blythe}, title = {The X\({}^{\mbox{e}}\) {GPU} Architecture}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--27}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220591}, doi = {10.1109/HCS49909.2020.9220591}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/Blythe20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/ChoquetteG20, author = {Jack Choquette and Wish Gandhi}, title = {{NVIDIA} {A100} {GPU:} Performance {\&} Innovation for {GPU} Computing}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--43}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220622}, doi = {10.1109/HCS49909.2020.9220622}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/ChoquetteG20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/GanusovICM20, author = {Ilya K. Ganusov and Mahesh A. Iyer and Ning Cheng and Alon Meisler}, title = {Agilex{\texttrademark} Generation of Intel{\textregistered} FPGAs}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--26}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220557}, doi = {10.1109/HCS49909.2020.9220557}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/GanusovICM20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/JiaoHL20, author = {Yang Jiao and Liang Han and Xin Long}, title = {Hanguang 800 {NPU} - The Ultimate {AI} Inference Solution for Data Centers}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--29}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220619}, doi = {10.1109/HCS49909.2020.9220619}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/JiaoHL20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/KoCDWTRW020, author = {Glenn G. Ko and Yuji Chai and Marco Donato and Paul N. Whatmough and Thierry Tambe and Rob A. Rutenbar and Gu{-}Yeon Wei and David Brooks}, title = {A Scalable Bayesian Inference Accelerator for Unsupervised Learning}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--27}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220686}, doi = {10.1109/HCS49909.2020.9220686}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/KoCDWTRW020.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/Matus20, author = {Francis Matus}, title = {Distributed Services Architecture}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--17}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220629}, doi = {10.1109/HCS49909.2020.9220629}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/Matus20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/NorriePYKLLYJP20, author = {Thomas Norrie and Nishant Patil and Doe Hyun Yoon and George Kurian and Sheng Li and James Laudon and Cliff Young and Norman P. Jouppi and David A. Patterson}, title = {Google's Training Chips Revealed: TPUv2 and TPUv3}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--70}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220735}, doi = {10.1109/HCS49909.2020.9220735}, timestamp = {Thu, 13 Apr 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/NorriePYKLLYJP20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/OuyangNWQMGKHBZ20, author = {Jian Ouyang and Mijung Noh and Yong Wang and Wei Qi and Yin Ma and Canghai Gu and SoonGon Kim and Ki{-}il Hong and Wang{-}Keun Bae and Zhibiao Zhao and Jing Wang and Peng Wu and Xiaozhang Gong and Jiaxin Shi and Hefei Zhu and Xueliang Du}, title = {Baidu Kunlun An {AI} processor for diversified workloads}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--18}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220641}, doi = {10.1109/HCS49909.2020.9220641}, timestamp = {Sun, 06 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/OuyangNWQMGKHBZ20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/Papazian20, author = {Irma Esmer Papazian}, title = {New 3rd Gen Intel\({}^{\mbox{{\textregistered}}}\) Xeon\({}^{\mbox{{\textregistered}}}\) Scalable Processor (Codename: Ice Lake-SP)}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--22}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220434}, doi = {10.1109/HCS49909.2020.9220434}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/Papazian20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/Ramey20, author = {Carl Ramey}, title = {Silicon Photonics for Artificial Intelligence Acceleration : HotChips 32}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--26}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220525}, doi = {10.1109/HCS49909.2020.9220525}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/Ramey20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/Saporito20, author = {Anthony Saporito}, title = {The {IBM} z15 processor chip set}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--17}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220508}, doi = {10.1109/HCS49909.2020.9220508}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/Saporito20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/SkillmanE20, author = {Allan Skillman and Tomas Eds{\"{o}}}, title = {A Technical Overview of Cortex-M55 and Ethos-U55: Arm's Most Capable Processors for Endpoint {AI}}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--20}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220415}, doi = {10.1109/HCS49909.2020.9220415}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/SkillmanE20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/StarkeT20, author = {William J. Starke and Brian W. Thompto}, title = {IBM's {POWER10} Processor}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--43}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220618}, doi = {10.1109/HCS49909.2020.9220618}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/StarkeT20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/Sugumar20, author = {Rabin Sugumar}, title = {ThunderX3 Next-Generation Arm-Based Server}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--19}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220418}, doi = {10.1109/HCS49909.2020.9220418}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/Sugumar20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/Vera20, author = {Xavier Vera}, title = {Inside Tiger Lake: Intel's Next Generation Mobile Client {CPU}}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--26}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220443}, doi = {10.1109/HCS49909.2020.9220443}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/Vera20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/VoogelFOCADMDTW20, author = {Martin Voogel and Yohan Frans and Matt Ouellette and Jason Coppens and Sagheer Ahmad and Jaideep Dastidar and Ehab Mohsen and Faisal Dada and Mike Thompson and Ralph Wittig and Trevor Bauer and Gaurav Singh}, title = {Xilinx Versal{\texttrademark} Premium}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--46}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220682}, doi = {10.1109/HCS49909.2020.9220682}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/VoogelFOCADMDTW20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/ZarubaSB20, author = {Florian Zaruba and Fabian Schuiki and Luca Benini}, title = {A 4096-core {RISC-V} Chiplet Architecture for Ultra-efficient Floating-point Computing}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--24}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220474}, doi = {10.1109/HCS49909.2020.9220474}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/ZarubaSB20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/ZxtZS20, author = {Xiantao Zxt and Zhengxiao Zx and Justin Song}, title = {High-density Multi-tenant Bare-metal Cloud with Memory Expansion SoC and Power Management}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--18}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9220447}, doi = {10.1109/HCS49909.2020.9220447}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/ZxtZS20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/posters20, title = {Hot Chips 2020 Posters}, booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, pages = {1--159}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/HCS49909.2020.9250188}, doi = {10.1109/HCS49909.2020.9250188}, timestamp = {Tue, 22 Dec 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hotchips/posters20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/hotchips/2020, title = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August 16-18, 2020}, publisher = {{IEEE}}, year = {2020}, url = {https://ieeexplore.ieee.org/xpl/conhome/9217408/proceeding}, isbn = {978-1-7281-7129-6}, timestamp = {Tue, 20 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hotchips/2020.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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