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@inproceedings{DBLP:conf/hldvt/BeardoBFS00, author = {M. Beardo and Francesco Bruschi and Fabrizio Ferrandi and Donatella Sciuto}, title = {An approach to functional testing of {VLIW} architectures}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {29--33}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889555}, doi = {10.1109/HLDVT.2000.889555}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/BeardoBFS00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/ChoiYL00, author = {Hoon Choi and Byeong{-}Whee Yun and Yun{-}Tae Lee}, title = {Simulation strategy after model checking: experience in industrial {SOC} design}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {77--79}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889563}, doi = {10.1109/HLDVT.2000.889563}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/ChoiYL00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/CornoCRS00, author = {Fulvio Corno and Gianluca Cumani and Matteo Sonza Reorda and Giovanni Squillero}, title = {An RT-level fault model with high gate level correlation}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {3--8}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889551}, doi = {10.1109/HLDVT.2000.889551}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/CornoCRS00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/FedericiBS00, author = {Dominique Federici and Paul Bisgambiglia and Jean Fran{\c{c}}ois Santucci}, title = {High level fault simulation: experiments and results on ITC'99 benchmarks}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {118--123}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889571}, doi = {10.1109/HLDVT.2000.889571}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/FedericiBS00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/HajjarCM00, author = {Amjad Hajjar and Tom Chen and Anneliese von Mayrhauser}, title = {On statistical behavior of branch coverage in testing behavioral {VHDL} models}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {89--94}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889565}, doi = {10.1109/HLDVT.2000.889565}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/HajjarCM00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/HansenR00, author = {Cordula Hansen and Wolfgang Rosenstiel}, title = {Transformation of algorithmic simulation vector sets considering mapping problems of {I/O} operations}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {173--178}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889580}, doi = {10.1109/HLDVT.2000.889580}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/HansenR00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/HsiehB00, author = {Harry Hsieh and Felice Balarin}, title = {Refining abstract equivalence analysis for embedded system design}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {139--146}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889575}, doi = {10.1109/HLDVT.2000.889575}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/HsiehB00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/HsiehL00, author = {Yee{-}Wing Hsieh and Steven P. Levitan}, title = {Abstraction techniques for verification of multiple tightly coupled counters, registers and comparators}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {133--138}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889574}, doi = {10.1109/HLDVT.2000.889574}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/HsiehL00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/JahanpourC00, author = {M. S. Jahanpour and Eduard Cerny}, title = {Compositional verification of an {ATM} switch module using interface recognizer/suppliers {(IRS)}}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {71--76}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889562}, doi = {10.1109/HLDVT.2000.889562}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/JahanpourC00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/JiangKAH00, author = {Tianjing Jiang and Robert H. Klenke and James H. Aylor and Gang Han}, title = {System level testability analysis using Petri nets}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {112--117}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889570}, doi = {10.1109/HLDVT.2000.889570}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/JiangKAH00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/JonesG00, author = {Michael D. Jones and Ganesh Gopalakrishnan}, title = {Toward automated abstraction for protocols on branching networks}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {147--152}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889576}, doi = {10.1109/HLDVT.2000.889576}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/JonesG00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/Koerner00, author = {Stefan Koerner}, title = {Code simulation concept for {S/390} processors using an emulation system}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {101--102}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889568}, doi = {10.1109/HLDVT.2000.889568}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/Koerner00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/LajoloRRVL00, author = {Marcello Lajolo and Maurizio Rebaudengo and Matteo Sonza Reorda and Massimo Violante and Luciano Lavagno}, title = {Behavioral-level test vector generation for system-on-chip designs}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {21--26}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889554}, doi = {10.1109/HLDVT.2000.889554}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/LajoloRRVL00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/LazarescuBHLL00, author = {Mihai T. Lazarescu and Jwahar R. Bammi and Edwin A. Harcourt and Luciano Lavagno and Marcello Lajolo}, title = {Compilation-based software performance estimation for system level design}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {167--172}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889579}, doi = {10.1109/HLDVT.2000.889579}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/LazarescuBHLL00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/MayrhauserCKARH00, author = {Anneliese von Mayrhauser and Tom Chen and Jan Kok and Chuck Anderson and Anita Read and Amjad Hajjar}, title = {On choosing test criteria for behavioral level hardware design verification}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {124--130}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889572}, doi = {10.1109/HLDVT.2000.889572}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/MayrhauserCKARH00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/PanigrahiTD00, author = {Debashis Panigrahi and Clark N. Taylor and Sujit Dey}, title = {Interface based hardware/software validation of a system-on-chip}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {53--58}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889559}, doi = {10.1109/HLDVT.2000.889559}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/PanigrahiTD00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/PaoliNS00, author = {Christophe Paoli and Marie{-}Laure Nivet and Jean Fran{\c{c}}ois Santucci}, title = {Use of constraint solving in order to generate test vectors for behavioral validation}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {15--20}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889553}, doi = {10.1109/HLDVT.2000.889553}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/PaoliNS00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/PaskoCSV00, author = {Robert Pasko and Radim Cmar and Patrick Schaumont and Serge Vernalde}, title = {Functional verification of an embedded network component by co-simulation with a real network}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {64--67}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889561}, doi = {10.1109/HLDVT.2000.889561}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/PaskoCSV00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/PflanzGV00, author = {Matthias Pflanz and Christian Galke and Heinrich Theodor Vierhaus}, title = {A new method for on-line state machine observation for embedded microprocessors}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {34--39}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889556}, doi = {10.1109/HLDVT.2000.889556}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/PflanzGV00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/RadhakrishnanTV00, author = {Rajesh Radhakrishnan and Elena Teica and Ranga Vemuri}, title = {An approach to high-level synthesis system validation using formally verified transformations}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {80--85}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889564}, doi = {10.1109/HLDVT.2000.889564}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/RadhakrishnanTV00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/RufHKR00, author = {J{\"{u}}rgen Ruf and Dirk W. Hoffmann and Thomas Kropf and Wolfgang Rosenstiel}, title = {Checking temporal properties under simulation of executable system descriptions}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {161--166}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889578}, doi = {10.1109/HLDVT.2000.889578}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/RufHKR00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/SeshadriH00, author = {Sandhya Seshadri and Michael S. Hsiao}, title = {Formal operator testability methods for behavioral-level {DFT} using value ranges}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {105--111}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889569}, doi = {10.1109/HLDVT.2000.889569}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/SeshadriH00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/TomiyamaYD00, author = {Hiroyuki Tomiyama and Taisei Yoshino and Nikil D. Dutt}, title = {Verification of in-order execution in pipelined processors}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {40--44}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889557}, doi = {10.1109/HLDVT.2000.889557}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/TomiyamaYD00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/TomkoT00, author = {Karen A. Tomko and Anurag Tiwari}, title = {Hardware/software co-debugging for reconfigurable computing}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {59--63}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889560}, doi = {10.1109/HLDVT.2000.889560}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/TomkoT00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/VedulaA00, author = {Vivekananda M. Vedula and Jacob A. Abraham}, title = {A novel methodology for hierarchical test generation using functional constraint composition}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {9--14}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889552}, doi = {10.1109/HLDVT.2000.889552}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/VedulaA00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/VermeulenR00, author = {Bart Vermeulen and Gert{-}Jan van Rootselaar}, title = {Silicon debug of a co-processor array for video applications}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {47--52}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889558}, doi = {10.1109/HLDVT.2000.889558}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/VermeulenR00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/WolfE00, author = {Fabian Wolf and Rolf Ernst}, title = {Data flow based cache prediction using local simulation}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {155--160}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889577}, doi = {10.1109/HLDVT.2000.889577}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/WolfE00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/YamashitaYFC00, author = {Hajime Yamashita and Hiroto Yasuura and Eko Fajar and Yun Cao}, title = {Variable size analysis and validation of computation quality}, booktitle = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, pages = {95--100}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HLDVT.2000.889566}, doi = {10.1109/HLDVT.2000.889566}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/YamashitaYFC00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/hldvt/2000, title = {Proceedings of the {IEEE} International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://ieeexplore.ieee.org/xpl/conhome/7154/proceeding}, isbn = {0-7695-0786-7}, timestamp = {Wed, 16 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hldvt/2000.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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