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@inproceedings{DBLP:conf/hipeac/Atabaki18,
  author       = {Amir Atabaki},
  editor       = {S{\"{o}}ren Sonntag and
                  Jos{\'{e}} Manuel Garc{\'{\i}}a Carrasco and
                  S{\'{e}}bastien Rumley and
                  Alessandro Cilardo},
  title        = {Monolithic Optical Interconnects in Zero-Change {CMOS}},
  booktitle    = {Proceedings of the 3rd International Workshop on Advanced Interconnect
                  Solutions and Technologies for Emerging Computing Systems, {AISTECS}
                  2018, Manchester, United Kingdom, January 22-22, 2018},
  pages        = {4:1--4:5},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3186608.3186612},
  doi          = {10.1145/3186608.3186612},
  timestamp    = {Wed, 21 Nov 2018 12:44:20 +0100},
  biburl       = {https://dblp.org/rec/conf/hipeac/Atabaki18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hipeac/CaloBKFBBBP18,
  author       = {Giovanna Cal{\`{o}} and
                  Gaetano Bellanca and
                  Ali Emre Kaplan and
                  Franco Fuschini and
                  Marina Barbiroli and
                  Michele Bozzetti and
                  Paolo Bassi and
                  Vincenzo Petruzzelli},
  editor       = {S{\"{o}}ren Sonntag and
                  Jos{\'{e}} Manuel Garc{\'{\i}}a Carrasco and
                  S{\'{e}}bastien Rumley and
                  Alessandro Cilardo},
  title        = {Integrated Vivaldi antennas, an enabling technology for optical wireless
                  networks on chip},
  booktitle    = {Proceedings of the 3rd International Workshop on Advanced Interconnect
                  Solutions and Technologies for Emerging Computing Systems, {AISTECS}
                  2018, Manchester, United Kingdom, January 22-22, 2018},
  pages        = {1:1--1:4},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3186608.3186609},
  doi          = {10.1145/3186608.3186609},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hipeac/CaloBKFBBBP18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hipeac/LebiednikAKK18,
  author       = {Brian Lebiednik and
                  Sergi Abadal and
                  Hyoukjun Kwon and
                  Tushar Krishna},
  editor       = {S{\"{o}}ren Sonntag and
                  Jos{\'{e}} Manuel Garc{\'{\i}}a Carrasco and
                  S{\'{e}}bastien Rumley and
                  Alessandro Cilardo},
  title        = {Spoofing Prevention via {RF} Power Profiling in Wireless Network-on-Chip},
  booktitle    = {Proceedings of the 3rd International Workshop on Advanced Interconnect
                  Solutions and Technologies for Emerging Computing Systems, {AISTECS}
                  2018, Manchester, United Kingdom, January 22-22, 2018},
  pages        = {2:1--2:4},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3186608.3186610},
  doi          = {10.1145/3186608.3186610},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hipeac/LebiednikAKK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hipeac/SyrivelisRKP18,
  author       = {Dimitris Syrivelis and
                  Andrea Reale and
                  Kostas Katrinis and
                  Christian Pinto},
  editor       = {S{\"{o}}ren Sonntag and
                  Jos{\'{e}} Manuel Garc{\'{\i}}a Carrasco and
                  S{\'{e}}bastien Rumley and
                  Alessandro Cilardo},
  title        = {A Software-defined SoC Memory Bus Bridge Architecture for Disaggregated
                  Computing},
  booktitle    = {Proceedings of the 3rd International Workshop on Advanced Interconnect
                  Solutions and Technologies for Emerging Computing Systems, {AISTECS}
                  2018, Manchester, United Kingdom, January 22-22, 2018},
  pages        = {3:1--3:4},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3186608.3186611},
  doi          = {10.1145/3186608.3186611},
  timestamp    = {Wed, 21 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hipeac/SyrivelisRKP18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/hipeac/2018aistecs,
  editor       = {S{\"{o}}ren Sonntag and
                  Jos{\'{e}} Manuel Garc{\'{\i}}a Carrasco and
                  S{\'{e}}bastien Rumley and
                  Alessandro Cilardo},
  title        = {Proceedings of the 3rd International Workshop on Advanced Interconnect
                  Solutions and Technologies for Emerging Computing Systems, {AISTECS}
                  2018, Manchester, United Kingdom, January 22-22, 2018},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3186608},
  doi          = {10.1145/3186608},
  timestamp    = {Wed, 21 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hipeac/2018aistecs.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}