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@inproceedings{DBLP:conf/date/AartsEK96,
author = {Emile H. L. Aarts and
Gerben Essink and
Erwin A. de Kock},
title = {Recursive Bipartitioning of Signal Flow Graphs for Programmable Video
Signal Processors},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {460--466},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494341},
doi = {10.1109/EDTC.1996.494341},
timestamp = {Fri, 20 May 2022 15:52:30 +0200},
biburl = {https://dblp.org/rec/conf/date/AartsEK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AbidCJ96,
author = {Mohamed Abid and
Adel Changuel and
Ahmed Amine Jerraya},
title = {A Hardware/Software Codesign Case Study: Design of a Robot Arm Controller},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {599},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494363},
doi = {10.1109/EDTC.1996.494363},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/AbidCJ96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AllemandCJP96,
author = {Michel Allemand and
Solange Coupet{-}Grimal and
Line Jakubiec and
Jean{-}Luc Paillet},
title = {A System for Modelling and Proving Circuits},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {605},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494369},
doi = {10.1109/EDTC.1996.494369},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/AllemandCJP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AtzemaZ96,
author = {Bert Atzema and
Taco Zwemstra},
title = {Exploit Analog {IFA} to Improve Specification Based Tests},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {542--546},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494353},
doi = {10.1109/EDTC.1996.494353},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/AtzemaZ96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Baba-AliF96,
author = {Ahmed Riadh Baba{-}Ali and
A. Farah},
title = {An Efficient Algorithm for Signal Flow Determination in Digital {CMOS}
{VLSI}},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {288--293},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494315},
doi = {10.1109/EDTC.1996.494315},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Baba-AliF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Baker96,
author = {Keith Baker},
title = {{IDDQ:} you heard the hype, but what's really coming?},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {116--119},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494135},
doi = {10.1109/EDTC.1996.494135},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Baker96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BeckerDKR96,
author = {Bernd Becker and
Rolf Drechsler and
Rolf Krieger and
Sudhakar M. Reddy},
title = {A Fast Optimal Robust Path Delay Fault Testable Adder},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {491--499},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494346},
doi = {10.1109/EDTC.1996.494346},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/BeckerDKR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Bender96,
author = {Armin Bender},
title = {Design of an Optimal Loosely Coupled Heterogeneous Multiprocessor
System},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {275--281},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494313},
doi = {10.1109/EDTC.1996.494313},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Bender96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BergamaschiR96,
author = {Reinaldo A. Bergamaschi and
Salil Raje},
title = {Observable Time Windows: Verifying the Results of High-Level Synthesis},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {350--356},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494324},
doi = {10.1109/EDTC.1996.494324},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/BergamaschiR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BernardSN96,
author = {Ernst G. Bernard and
Sven Simon and
Josef A. Nossek},
title = {Built-in self test architectures for multistage interconnection networks},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {176--180},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494145},
doi = {10.1109/EDTC.1996.494145},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/BernardSN96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BoutamineGER96,
author = {Hicham Boutamine and
Alain Guyot and
Bachar El{-}Hassan and
Marc Renaudin},
title = {Asynchronous {SRT} Dividers: The Real Cost},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {195--199},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494148},
doi = {10.1109/EDTC.1996.494148},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/BoutamineGER96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ButtgenbachT96,
author = {Stephanus B{\"{u}}ttgenbach and
O. Than},
title = {{SUZANA:} {A} 3D {CAD} Tool for Anisotropically Etched Silicon Microstructures},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {454--459},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494340},
doi = {10.1109/EDTC.1996.494340},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ButtgenbachT96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CarrabinaHMSB96,
author = {Jordi Carrabina and
L. H{\'{e}}brard and
Angel Merlos and
Joaqu{\'{\i}}n Saiz and
J. Bausells},
title = {Design Kit for Microsystems Design for an Enhanced {CMOS} Process},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {619},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494383},
doi = {10.1109/EDTC.1996.494383},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/CarrabinaHMSB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CasarBK96,
author = {Ales Casar and
Zmago Brezocnik and
Tatjana Kapus},
title = {Exploiting Partitioned Transition Relations for Efficient Symbolic
Model Checking in {CTL}},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {606},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494370},
doi = {10.1109/EDTC.1996.494370},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/CasarBK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CaufapeF96,
author = {S. Caufape and
Joan Figueras},
title = {Power Optimization of Delay Constrained {CMOS} Bus Drivers},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {205--213},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494150},
doi = {10.1109/EDTC.1996.494150},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/CaufapeF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CavalleraGLP96,
author = {P. Cavallera and
Patrick Girard and
Christian Landrault and
Serge Pravossoudovitch},
title = {{DFSIM:} {A} Gate-Delay Fault Simulator for Sequential Circuits},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {79--87},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494160},
doi = {10.1109/EDTC.1996.494160},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/CavalleraGLP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ChanO96,
author = {Wah Chan and
Alex Orailoglu},
title = {High-level synthesis of gracefully degradable ASICs},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {50--54},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494127},
doi = {10.1109/EDTC.1996.494127},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ChanO96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ChangM96,
author = {Shih{-}Chieh Chang and
Malgorzata Marek{-}Sadowska},
title = {Perturb and Simplify: Optimizing Combinational Circuits with External
Don't Cares},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {402--406},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494332},
doi = {10.1109/EDTC.1996.494332},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ChangM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ChenW96,
author = {Y. P. Chen and
D. F. Wong},
title = {An Algorithm for Zero-Skew Clock Tree Routing with Buffer Insertion},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {230--236},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494154},
doi = {10.1109/EDTC.1996.494154},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ChenW96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ChengRK96,
author = {Yi{-}Kan Cheng and
Elyse Rosenbaum and
Sung{-}Mo Kang},
title = {{ETS-A:} {A} New Electrothermal Simulator for {CMOS} {VLSI} Circuits},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {566--570},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494357},
doi = {10.1109/EDTC.1996.494357},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ChengRK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Cobley96,
author = {R. A. Cobley},
title = {Approaches to On-chip Testing of Mixed Signal Macros in ASICs},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {553--559},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494355},
doi = {10.1109/EDTC.1996.494355},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Cobley96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Conesa96,
author = {J. L. Conesa},
title = {Design challenges of high speed {ATM} communication ASICs},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {27--29},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494123},
doi = {10.1109/EDTC.1996.494123},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Conesa96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ConwayN96,
author = {Tom Conway and
John Nelson},
title = {{VLSI} Design of a High Speed Soft Decision Viterbi Detector},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {598},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494362},
doi = {10.1109/EDTC.1996.494362},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ConwayN96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CornoPR96,
author = {Fulvio Corno and
Paolo Prinetto and
Matteo Sonza Reorda},
title = {Self-Checking and Fault Tolerant Approaches Can Help {BIST} Fault
Coverage: {A} Case Study},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {610},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494374},
doi = {10.1109/EDTC.1996.494374},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/CornoPR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CornoPRRM96,
author = {Fulvio Corno and
Paolo Prinetto and
Maurizio Rebaudengo and
Matteo Sonza Reorda and
R. Mosca},
title = {Advanced Techniques for GA-based sequential ATPGs},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {375--379},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494328},
doi = {10.1109/EDTC.1996.494328},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/CornoPRRM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CorsiMM96,
author = {Francesco Corsi and
Cristoforo Marzocca and
S. Martino},
title = {Assessing the Quality Level of Digital {CMOS} IC's under the Hypothesis
of Non-Uniform Distribution of Fault Probabilities},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {72--78},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494130},
doi = {10.1109/EDTC.1996.494130},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/CorsiMM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Coudert96,
author = {Olivier Coudert},
title = {Gate Sizing: {A} General Purpose Optimization Approach},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {214--218},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494151},
doi = {10.1109/EDTC.1996.494151},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Coudert96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/DislisJ96,
author = {Chryssa Dislis and
Ian P. Jalowiecki},
title = {Economics Modelling and Optimisation of {MCM} Test Strategies},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {615},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494379},
doi = {10.1109/EDTC.1996.494379},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/DislisJ96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/DrechslerBR96,
author = {Rolf Drechsler and
Bernd Becker and
Stefan Ruppertz},
title = {K*BMDs: {A} New Data Structure for Verification},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {2--8},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494118},
doi = {10.1109/EDTC.1996.494118},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/DrechslerBR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/DrozdHL96,
author = {Alexander V. Drozd and
Wael Hassonah and
Michel Lobachov},
title = {Hardware Check of Arithmetic Devices with Abridged Execution of Operations},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {611},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494375},
doi = {10.1109/EDTC.1996.494375},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/DrozdHL96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/EijkJ96,
author = {C. A. J. van Eijk and
Jochen A. G. Jess},
title = {Exploiting Functional Dependencies in Finite State Machine Verification},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {9--14},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494119},
doi = {10.1109/EDTC.1996.494119},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/EijkJ96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/EliasM96,
author = {P. J. H. Elias and
N. P. van der Meijs},
title = {Including Higher-Order Moments of {RC} Interconnections in Layout-to-Circuit
Extraction},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {362--367},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494326},
doi = {10.1109/EDTC.1996.494326},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/EliasM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/FavalliBM96,
author = {Michele Favalli and
Luca Benini and
Giovanni De Micheli},
title = {Design for Testability of Gated-Clock FSMs},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {589--597},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494361},
doi = {10.1109/EDTC.1996.494361},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/FavalliBM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/FernandezS96,
author = {V{\'{\i}}ctor Fern{\'{a}}ndez and
Pablo S{\'{a}}nchez},
title = {Partial Scan High-Level Synthesis},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {481--485},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494344},
doi = {10.1109/EDTC.1996.494344},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/FernandezS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/FrosslKG96,
author = {J{\"{u}}rgen Fr{\"{o}}{\ss}l and
Thomas Kropf and
Joachim Gerlach},
title = {An Efficient Algorithm for Real-Time Symbolic Model Checking},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {15--21},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494120},
doi = {10.1109/EDTC.1996.494120},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/FrosslKG96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GargLSSUWY96,
author = {Vivek Garg and
Steve Lacy and
David E. Schimmel and
Darrell Stogner and
Craig D. Ulmer and
D. Scott Wills and
Sudhakar Yalamanchili},
title = {Incorporating Multi-Chip Module Packaging Constraints into System
Design},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {508--513},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494348},
doi = {10.1109/EDTC.1996.494348},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/GargLSSUWY96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GenderenMS96,
author = {Arjan J. van Genderen and
N. P. van der Meijs and
T. Smedes},
title = {Fast Computation of Substrate Resistances in Large Circuits},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {560--565},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494356},
doi = {10.1109/EDTC.1996.494356},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/GenderenMS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GongGB96,
author = {Jie Gong and
Daniel D. Gajski and
Smita Bakshi},
title = {Model Refinement for Hardware-Software Codesign},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {270--274},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494312},
doi = {10.1109/EDTC.1996.494312},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/GongGB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GoorOS96,
author = {Ad J. van de Goor and
Aad Offerman and
Ivo Schanstra},
title = {Towards a Uniform Notation for Memory Tests},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {420--427},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494335},
doi = {10.1109/EDTC.1996.494335},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/GoorOS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Guignet96,
author = {Jean Bruce Guignet},
title = {Generalized Recognition of Gates: {A} {VLSI} Abstraction Tool},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {608},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494372},
doi = {10.1109/EDTC.1996.494372},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Guignet96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GulbinsS96,
author = {Matthias Gulbins and
Bernd Straube},
title = {Applying Behavioural Level Test Generation to High-Level Design Validation},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {613},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494377},
doi = {10.1109/EDTC.1996.494377},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/GulbinsS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Gupta96,
author = {Rajesh K. Gupta},
title = {Operation Serializability for Embedded Systems},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {108--115},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494134},
doi = {10.1109/EDTC.1996.494134},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Gupta96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GuptaTH96,
author = {Avaneendra Gupta and
Siang{-}Chun The and
John P. Hayes},
title = {{XPRESS:} {A} Cell Layout Generator with Integrated Transistor Folding},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {393--401},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494331},
doi = {10.1109/EDTC.1996.494331},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/GuptaTH96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HeinkelG96,
author = {Ulrich Heinkel and
Wolfram Glauert},
title = {An Approach for a Dynamic Generation/Validation System for the Functional
Simulation Considering Timing Constraints},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {302--309},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494317},
doi = {10.1109/EDTC.1996.494317},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/HeinkelG96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HsiaoRP96,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Alternating Strategies for Sequential Circuit {ATPG}},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {368--374},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494327},
doi = {10.1109/EDTC.1996.494327},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/HsiaoRP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/IkedaOAITK96,
author = {Mitsuo Ikeda and
Tsuneo Okubo and
Tetsuya Abe and
Yoshinori Ito and
Yutaka Tashiro and
Ryota Kasai},
title = {A Hardware/Software Concurrent Design for a Real-Time SP@ML {MPEG2}
Video-Encoder Chip Set},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {320--327},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494320},
doi = {10.1109/EDTC.1996.494320},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/IkedaOAITK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/InamoriNWE96,
author = {Minoru Inamori and
Jiro Naganuma and
Haruo Wakabayashi and
Makoto Endo},
title = {A Memory-based Architecture for {MPEG2} System Protocol LSIs},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {500--507},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494347},
doi = {10.1109/EDTC.1996.494347},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/InamoriNWE96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/IyerLA96,
author = {Mahesh A. Iyer and
David E. Long and
Miron Abramovici},
title = {Surprises in Sequential Redundancy Identification},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {88--95},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494131},
doi = {10.1109/EDTC.1996.494131},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/IyerLA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/JanssenCM96,
author = {Martin Janssen and
Francky Catthoor and
Hugo De Man},
title = {A Specification Invariant Technique for Regularity Improvement between
Flow-Graph Clusters},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {138--143},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494139},
doi = {10.1109/EDTC.1996.494139},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/JanssenCM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/JohanssonHB96,
author = {Tor{-}Bj{\"{o}}rn Johansson and
Kay Hameyer and
Ronnie Belmans},
title = {Methods and Tools for the Design of Electrostatic Micromotors},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {618},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494382},
doi = {10.1109/EDTC.1996.494382},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/JohanssonHB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KagarisTM96,
author = {Dimitrios Kagaris and
Spyros Tragoudas and
Amitava Majumdar},
title = {Deterministic Test Pattern Reproduction by a Counter},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {37--41},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494125},
doi = {10.1109/EDTC.1996.494125},
timestamp = {Thu, 18 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/KagarisTM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KaramCB96,
author = {Jean{-}Michel Karam and
Bernard Courtois and
M. Bauge},
title = {High level {CAD} melds microsystems with foundries},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {442--447},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494338},
doi = {10.1109/EDTC.1996.494338},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/KaramCB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KaramCPHRGS96,
author = {Jean{-}Michel Karam and
Bernard Courtois and
Andr{\'{a}}s Poppe and
Klaus Hofmann and
M{\'{a}}rta Rencz and
Manfred Glesner and
Vladim{\'{\i}}r Sz{\'{e}}kely},
title = {Applied design and analysis of microsystems},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {528--532},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494351},
doi = {10.1109/EDTC.1996.494351},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/KaramCPHRGS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KarkowskiO96,
author = {Ireneusz Karkowski and
Ralph H. J. M. Otten},
title = {An Automatic Hardware-Software Partitioner Based on the Possibilistic
Programming},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {467--472},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494342},
doi = {10.1109/EDTC.1996.494342},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/KarkowskiO96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KiriyamaNYBMS96,
author = {Takashi Kiriyama and
Naomasa Nakajima and
Shinobu Yoshimura and
Stuart C. Burgess and
David Moore and
Narito Shibaike},
title = {A conceptual design environment for micromechanisms},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {448--453},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494339},
doi = {10.1109/EDTC.1996.494339},
timestamp = {Fri, 28 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/KiriyamaNYBMS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KrsticC96,
author = {Angela Krstic and
Kwang{-}Ting Cheng},
title = {Resynthesis of Combinational Circuts for Path Count Reduction and
for Path Delay Fault Testability},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {486--490},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494345},
doi = {10.1109/EDTC.1996.494345},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/KrsticC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeglWE96,
author = {Christian Legl and
Bernd Wurth and
Klaus Eckl},
title = {An Implicit Algorithm for Support Minimization during Functional Decomposition},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {412--419},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494334},
doi = {10.1109/EDTC.1996.494334},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LeglWE96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Lin96,
author = {Bill Lin},
title = {System design tools for broadband telecom network applications},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {23--26},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494122},
doi = {10.1109/EDTC.1996.494122},
timestamp = {Mon, 01 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Lin96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LinMCL96,
author = {Chih{-}Chang Lin and
Malgorzata Marek{-}Sadowska and
Kuang{-}Chien Chen and
Mike Tien{-}Chien Lee},
title = {Sequential Permissible Functions and their Application to Circuit
Optimization},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {334--339},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494322},
doi = {10.1109/EDTC.1996.494322},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LinMCL96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LuthiC96,
author = {Eric L{\"{u}}thi and
Emmanuel Casseau},
title = {High Rate Soft Output Viterbi Decoder},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {315--319},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494319},
doi = {10.1109/EDTC.1996.494319},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LuthiC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MarwedelBDLM96,
author = {Peter Marwedel and
Steven Bashford and
Rainer D{\"{o}}mer and
Birger Landwehr and
Ingolf Markhof},
title = {A Technique for Avoiding Isomorphic Netlists in Architectural Synthesis},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {600},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494364},
doi = {10.1109/EDTC.1996.494364},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MarwedelBDLM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MathurL96,
author = {Anmol Mathur and
C. L. Liu},
title = {Timing Driven Placement Reconfiguration for Fault Tolerance and Yield
Enhancement in FPGAs},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {165--169},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494143},
doi = {10.1109/EDTC.1996.494143},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MathurL96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MendiasHF96,
author = {Jos{\'{e}} M. Mend{\'{\i}}as and
Rom{\'{a}}n Hermida and
Milagros Fern{\'{a}}ndez},
title = {Algebraic Support for Transformational Hardware Allocation},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {601},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494365},
doi = {10.1109/EDTC.1996.494365},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MendiasHF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MikitjukYG96,
author = {V. G. Mikitjuk and
V. N. Yarmolik and
Ad J. van de Goor},
title = {{RAM} Testing Algorithm for Detection Linked Coupling Faults},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {435--441},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494337},
doi = {10.1109/EDTC.1996.494337},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MikitjukYG96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Miller96,
author = {D. Michael Miller},
title = {A spectral method for Boolean function matching},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {602},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494366},
doi = {10.1109/EDTC.1996.494366},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Miller96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MirCLK96,
author = {Salvador Mir and
Bernard Courtois and
Marcelo Lubaszewski and
Vladimir Kolarik},
title = {Automatic Test Generation for Maximal Diagnosis of Linear Analogue
Circuits},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {254--258},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494157},
doi = {10.1109/EDTC.1996.494157},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MirCLK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MohamedMT96,
author = {Firas Mohamed and
Meryem Marzouki and
Mohamed Hedi Touati},
title = {{FLAMES:} {A} Fuzzy Logic {ATMS} and Model-based Expert System for
Analog Diagnosis},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {259--263},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494158},
doi = {10.1109/EDTC.1996.494158},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MohamedMT96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MurthiR96,
author = {A. Murthi and
F. Rocaries},
title = {An Automated Design Environment for Micromechanical Sensors},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {617},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494381},
doi = {10.1109/EDTC.1996.494381},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MurthiR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MusollC96,
author = {Enric Musoll and
Jordi Cortadella},
title = {Optimizing {CMOS} Circuits for Low Power Using Transistor Reordering},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {219--223},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494152},
doi = {10.1109/EDTC.1996.494152},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MusollC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NicolaidisMF96,
author = {Michael Nicolaidis and
Salvador Manich and
Joan Figueras},
title = {Achieving Fault Secureness in Parity Prediction Arithmetic Operators:
General Conditions and Implementations},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {186--194},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494147},
doi = {10.1109/EDTC.1996.494147},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/NicolaidisMF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NiemannM96,
author = {Ralf Niemann and
Peter Marwedel},
title = {Hardware/Software Partitioning using Integer Programming},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {473--480},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494343},
doi = {10.1109/EDTC.1996.494343},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/NiemannM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/OhmBK96,
author = {Seong Yong Ohm and
Douglas M. Blough and
Fadi J. Kurdahi},
title = {High-Level Synthesis of Recoverable Microarchitectures},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {55--62},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494128},
doi = {10.1109/EDTC.1996.494128},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/OhmBK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/OliverK96,
author = {Joan Oliver and
Hans G. Kerkhoff},
title = {Test Structures on {MCM} Active Substrate: Is it worthwhile?},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {126--130},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494137},
doi = {10.1109/EDTC.1996.494137},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/OliverK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PanP96,
author = {Kuo{-}Rueih Ricky Pan and
Massoud Pedram},
title = {{FPGA} synthesis for minimum area, delay and power},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {603},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494367},
doi = {10.1109/EDTC.1996.494367},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/PanP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PandaD96,
author = {Preeti Ranjan Panda and
Nikil D. Dutt},
title = {Reducing Address Bus Transitions for Low Power Memory Mapping},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {63--71},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494129},
doi = {10.1109/EDTC.1996.494129},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/PandaD96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PastorRCK96,
author = {Enric Pastor and
Oriol Roig and
Jordi Cortadella and
Alex Kondratyev},
title = {Structural Methods for the Synthesis of Speed-Independent Circuits},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {340--349},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494323},
doi = {10.1109/EDTC.1996.494323},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/PastorRCK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Pierre96,
author = {Laurence Pierre},
title = {Formal Specification of a Reactive System: An Exercise in VHDL, {LOTOS}
and {UNITY}},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {607},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494371},
doi = {10.1109/EDTC.1996.494371},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Pierre96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PomeranzR96,
author = {Irith Pomeranz and
Sudhakar M. Reddy},
title = {On Test Generation for Interconnected Finite-State Machines - The
Output Sequence Justification Problem},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {380--387},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494329},
doi = {10.1109/EDTC.1996.494329},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/PomeranzR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PraetLGGM96,
author = {Johan Van Praet and
Dirk Lanneer and
Gert Goossens and
Werner Geurts and
Hugo De Man},
title = {A Graph Based Processor Model for Retargetable Code Generation},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {102--107},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494133},
doi = {10.1109/EDTC.1996.494133},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/PraetLGGM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PyoOP96,
author = {Iksoo Pyo and
Jaewon Oh and
Massoud Pedram},
title = {Constructing Minimal Spanning/Steiner Trees with Bounded Path Length},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {244--253},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494156},
doi = {10.1109/EDTC.1996.494156},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/PyoOP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RajskiT96,
author = {Janusz Rajski and
Jerzy Tyszer},
title = {Multiplicative Window Generators of Pseudo-random Test Vectors},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {42--49},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494126},
doi = {10.1109/EDTC.1996.494126},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RajskiT96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RamanLJ96,
author = {Srilata Raman and
C. L. Liu and
Larry G. Jones},
title = {A Timing-Constrained Incremental Routing Algorithm for Symmetrical
FPGAs},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {170--175},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494144},
doi = {10.1109/EDTC.1996.494144},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RamanLJ96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ReebW96,
author = {Birgit Reeb and
Hans{-}Joachim Wunderlich},
title = {Deterministic Pattern Generation for Weighted Random Pattern Testing},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {30--36},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494124},
doi = {10.1109/EDTC.1996.494124},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ReebW96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RullanFOMR96,
author = {M. Rull{\'{a}}n and
Carles Ferrer and
Joan Oliver and
Diego Mateo and
Antonio Rubio},
title = {Analysis of {ISSQ/IDDQ} Testing Implementation and Circuit Partitioning
in {CMOS} Cell-Based Design},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {584--588},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494360},
doi = {10.1109/EDTC.1996.494360},
timestamp = {Tue, 11 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RullanFOMR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Sachdev96,
author = {Manoj Sachdev},
title = {Test and Testability Techniques for Open Defects in {RAM} Address
Decoders},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {428--434},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494336},
doi = {10.1109/EDTC.1996.494336},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Sachdev96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SanzGM96,
author = {C{\'{e}}sar Sanz and
Mat{\'{\i}}as J. Garrido and
Juan M. Meneses},
title = {{VLSI} Architecture for Motion Estimation using the Block-Matching
Algorithm},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {310--314},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494318},
doi = {10.1109/EDTC.1996.494318},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SanzGM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SasidharCZ96,
author = {Koppolu Sasidhar and
Abhijit Chatterjee and
Yervant Zorian},
title = {Relay Propagation Scheme for Testing of MCMs on Large Area Substrates},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {131--137},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494138},
doi = {10.1109/EDTC.1996.494138},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SasidharCZ96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SatoOM96,
author = {Hidenori Sato and
Akira Onozawa and
Hiroaki Matsuda},
title = {A Balanced-Mesh Clock Routing Technique Using Circuit Partitioning},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {237--243},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494155},
doi = {10.1109/EDTC.1996.494155},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SatoOM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ScherberBM96,
author = {Frank Scherber and
Erich Barke and
Wolfgang Meier},
title = {{PALACE:} {A} Parallel and Hierarchical Layout Analyzer and Circuit
Extractor},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {357--361},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494325},
doi = {10.1109/EDTC.1996.494325},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ScherberBM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ShinC96,
author = {Youngsoo Shin and
Kiyoung Choi},
title = {Thread-based software synthesis for embedded system design},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {282--287},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494314},
doi = {10.1109/EDTC.1996.494314},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ShinC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ShipleBT96,
author = {Thomas R. Shiple and
G{\'{e}}rard Berry and
Herv{\'{e}} J. Touati},
title = {Constructive Analysis of Cyclic Circuits},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {328--333},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494321},
doi = {10.1109/EDTC.1996.494321},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ShipleBT96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ShirakawaHMHY96,
author = {Kazuhiro Shirakawa and
Kazushige Higuchi and
Toshiaki Miyazaki and
Kazuhiro Hayashi and
Kazuhisa Yamada},
title = {{FORM:} {A} Frame-Oriented Representation Method for Digital Telecommunication
System Design},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {514--521},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494349},
doi = {10.1109/EDTC.1996.494349},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ShirakawaHMHY96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SilvaM96,
author = {Jos{\'{e}} Machado da Silva and
Jos{\'{e}} Silva Matos},
title = {Evaluation of iDD/vOUT Cross-Correlation for Mixed Current/Voltage
Testing of Analogue and Mixed-Signal Circuits},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {264--269},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494159},
doi = {10.1109/EDTC.1996.494159},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SilvaM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SousaSC96,
author = {Jos{\'{e}} T. de Sousa and
T. Shen and
Peter Y. K. Cheung},
title = {Realistic Fault Extraction for Boards},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {612},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494376},
doi = {10.1109/EDTC.1996.494376},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SousaSC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SuJT96,
author = {Chauchin Su and
Shyh{-}Jye Jou and
Yuan{-}Tzu Ting},
title = {Decentralized {BIST} for 1149.1 and 1149.5 Based Interconnects},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {120--125},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494136},
doi = {10.1109/EDTC.1996.494136},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SuJT96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SussLEGJHR96,
author = {Wolfgang S{\"{u}}{\ss} and
K. Lindemann and
Horst Eggert and
Martina Gorges{-}Schleuter and
Wilfried Jakob and
W. Hoffmann and
Reinhard Rapp},
title = {Step by Step from Specification to Realization of an Electrochemical
Microsystem},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {533--541},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494352},
doi = {10.1109/EDTC.1996.494352},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SussLEGJHR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SzekelyPRFCP96,
author = {Vladim{\'{\i}}r Sz{\'{e}}kely and
Andr{\'{a}}s Poppe and
M{\'{a}}rta Rencz and
Gabor Farkas and
Alpar Csendes and
Andras Pahi},
title = {An Efficient Method for the Self-Consistent Electro-Thermal Simulation
and its Integration into a {CAD} Framework},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {604},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494368},
doi = {10.1109/EDTC.1996.494368},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SzekelyPRFCP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Takashima0K96,
author = {Yasuhiro Takashima and
Atsushi Takahashi and
Yoji Kajitani},
title = {Detailed-Routability of FPGAs with Extremal Switch-Block Structures},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {160--164},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494142},
doi = {10.1109/EDTC.1996.494142},
timestamp = {Mon, 01 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Takashima0K96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TomiyamaY96,
author = {Hiroyuki Tomiyama and
Hiroto Yasuura},
title = {Optimal Code Placement of Embedded Software for Instruction Caches},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {96--101},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494132},
doi = {10.1109/EDTC.1996.494132},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/TomiyamaY96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TouatiMM96,
author = {Mohamed Hedi Touati and
Firas Mohamed and
Meryem Marzouki},
title = {System Fault Diagnosis based on a Fuzzy Qualitative Approach},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {616},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494380},
doi = {10.1109/EDTC.1996.494380},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/TouatiMM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TrullemansZ96,
author = {Anne{-}Marie Trullemans and
Q. Zhang},
title = {Rapid Gate Matching with Don't Cares},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {407--411},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494333},
doi = {10.1109/EDTC.1996.494333},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/TrullemansZ96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TruzziBR96,
author = {Claudio Truzzi and
Eric Beyne and
Edwin Ringoot},
title = {Design of Test Modules for the Analysis of {MCM} Interconnects},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {614},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494378},
doi = {10.1109/EDTC.1996.494378},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/TruzziBR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TurgisAA96,
author = {S. Turgis and
Nadine Az{\'{e}}mard and
Daniel Auvergne},
title = {Design and selection of buffers for minimum power-delay product},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {224--229},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494153},
doi = {10.1109/EDTC.1996.494153},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/TurgisAA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/VelascoMCL96,
author = {A. Josep Velasco and
Xavier Marin and
Jordi Carrabina and
Rafael Peset Llopis},
title = {A Combined Pairing and Chaining Algorithm for {CMOS} Layout Generation},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {609},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494373},
doi = {10.1109/EDTC.1996.494373},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/VelascoMCL96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/VermeirenSH96,
author = {Wolfgang Vermeiren and
Bernd Straube and
Andreas Holubek},
title = {Defect-Oriented Experiments in Fault Modelling and Fault Simulation
of Microsystem Components},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {522--527},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494350},
doi = {10.1109/EDTC.1996.494350},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/VermeirenSH96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/VoskampR96,
author = {Eckart Voskamp and
Wolfgang Rosenstiel},
title = {Error Detection in Fault Secure Controllers using State Encoding},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {200--204},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494149},
doi = {10.1109/EDTC.1996.494149},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/VoskampR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WeninWGS96,
author = {Jacques Wenin and
Geert van Wauwe and
Mark Genoe and
Danny Sallaerts},
title = {The Use of Microelectronics for Future Telecom and Multimedia Systems},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {22},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494121},
doi = {10.1109/EDTC.1996.494121},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/WeninWGS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WilliamsKMDM96,
author = {Thomas W. Williams and
Rohit Kapur and
M. Ray Mercer and
Robert H. Dennard and
Wojciech Maly},
title = {Iddq Testing for High Performance {CMOS} - The Next Ten Years},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {578--583},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494359},
doi = {10.1109/EDTC.1996.494359},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/WilliamsKMDM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WolfKH96,
author = {Markus Wolf and
Ulrich Kleine and
Bedrich J. Hosticka},
title = {A Novel Analog Module Generator Environment},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {388--392},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494330},
doi = {10.1109/EDTC.1996.494330},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/WolfKH96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/XuK96,
author = {Min Xu and
Fadi J. Kurdahi},
title = {Area and Timing Estimation for Lookup Table Based FPGAs},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {151--159},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494141},
doi = {10.1109/EDTC.1996.494141},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/XuK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/YangFWL96,
author = {H. Z. Yang and
C. Z. Fan and
H. Wang and
R. S. Liu},
title = {Simulated Annealing Algorithm with Multi-Molecule: An Approach to
Analog Synthesis},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {571--577},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494358},
doi = {10.1109/EDTC.1996.494358},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/YangFWL96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZejdaCSR96,
author = {Jindrich Zejda and
Eduard Cerny and
S. Shenoy and
Nicholas C. Rumin},
title = {Bounding Switching Activity in {CMOS} Circuits Using Constraint Resolution},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {294--301},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494316},
doi = {10.1109/EDTC.1996.494316},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ZejdaCSR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZhaoP96,
author = {Wei Zhao and
Christos A. Papachristou},
title = {An evolution programming approach on multiple behaviors for the design
of application specific programmable processors},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {144--150},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494140},
doi = {10.1109/EDTC.1996.494140},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ZhaoP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZorianB96,
author = {Yervant Zorian and
Hakim Bederr},
title = {Designing Self-Testable Multi-Chip Modules},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {181--185},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494146},
doi = {10.1109/EDTC.1996.494146},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ZorianB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZwolinskiCW96,
author = {Mark Zwolinski and
Chris D. Chalk and
Brian R. Wilkins},
title = {Analogue Fault Modelling and Simulation for Supply Current Monitoring},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {547--552},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494354},
doi = {10.1109/EDTC.1996.494354},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ZwolinskiCW96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/date/1996,
title = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://ieeexplore.ieee.org/xpl/conhome/3563/proceeding},
doi = {10.5555/787259},
isbn = {0-8186-7423-7},
timestamp = {Fri, 20 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/1996.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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