Search dblp for Publications

• > Home > Search

@article{DBLP:journals/vlsi/BiswalMBK15,
  author       = {Pradeep Kumar Biswal and
                  K. Mishra and
                  Santosh Biswas and
                  Hemangee K. Kapoor},
  title        = {A Discrete Event System Approach to Online Testing of Speed Independent
                  Circuits},
  journal      = {{VLSI} Design},
  volume       = {2015},
  pages        = {651785:1--651785:16},
  year         = {2015},
  url          = {https://doi.org/10.1155/2015/651785},
  doi          = {10.1155/2015/651785},
  timestamp    = {Sun, 02 Jun 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsi/BiswalMBK15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsi/ChenC15,
  author       = {Jian Chen and
                  Chien{-}In Henry Chen},
  title        = {Process Variation Aware Wide Tuning Band Pass Filter for Steep Roll-Off
                  High Rejection},
  journal      = {{VLSI} Design},
  volume       = {2015},
  pages        = {408035:1--408035:9},
  year         = {2015},
  url          = {https://doi.org/10.1155/2015/408035},
  doi          = {10.1155/2015/408035},
  timestamp    = {Sun, 02 Jun 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsi/ChenC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsi/HoeJ15,
  author       = {David H. K. Hoe and
                  Xiaoyu Jin},
  title        = {The Design of Low Noise Amplifiers in Deep Submicron {CMOS} Processes:
                  {A} Convex Optimization Approach},
  journal      = {{VLSI} Design},
  volume       = {2015},
  pages        = {312639:1--312639:16},
  year         = {2015},
  url          = {https://doi.org/10.1155/2015/312639},
  doi          = {10.1155/2015/312639},
  timestamp    = {Sun, 02 Jun 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsi/HoeJ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsi/KaiZYY15,
  author       = {Kai Huang and
                  Peng Zhu and
                  Rongjie Yan and
                  Xiaolang Yan},
  title        = {Functional Testbench Qualification by Mutation Analysis},
  journal      = {{VLSI} Design},
  volume       = {2015},
  pages        = {256474:1--256474:9},
  year         = {2015},
  url          = {https://doi.org/10.1155/2015/256474},
  doi          = {10.1155/2015/256474},
  timestamp    = {Tue, 07 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsi/KaiZYY15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsi/NaeiniO15,
  author       = {Mahshid Mojtabavi Naeini and
                  Chia Yee Ooi},
  title        = {A Novel Scan Architecture for Low Power Scan-Based Testing},
  journal      = {{VLSI} Design},
  volume       = {2015},
  pages        = {264071:1--264071:13},
  year         = {2015},
  url          = {https://doi.org/10.1155/2015/264071},
  doi          = {10.1155/2015/264071},
  timestamp    = {Sun, 02 Jun 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsi/NaeiniO15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsi/TacoLA15,
  author       = {Ramiro Taco and
                  Marco Lanuzza and
                  Domenico Albano},
  title        = {Ultra-Low-Voltage Self-Body Biasing Scheme and Its Application to
                  Basic Arithmetic Circuits},
  journal      = {{VLSI} Design},
  volume       = {2015},
  pages        = {540482:1--540482:10},
  year         = {2015},
  url          = {https://doi.org/10.1155/2015/540482},
  doi          = {10.1155/2015/540482},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsi/TacoLA15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsi/ViswanathG15,
  author       = {Kalannagari Viswanath and
                  Ramalingam Gunasundari},
  title        = {Analysis and Implementation of Kidney Stone Detection by Reaction
                  Diffusion Level Set Segmentation Using Xilinx System Generator on
                  {FPGA}},
  journal      = {{VLSI} Design},
  volume       = {2015},
  pages        = {581961:1--581961:10},
  year         = {2015},
  url          = {https://doi.org/10.1155/2015/581961},
  doi          = {10.1155/2015/581961},
  timestamp    = {Sun, 02 Jun 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsi/ViswanathG15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsi/WangS15,
  author       = {Xiao Wang and
                  Zelin Shi},
  title        = {A New {CDS} Structure for High Density {FPA} with Low Power},
  journal      = {{VLSI} Design},
  volume       = {2015},
  pages        = {767161:1--767161:7},
  year         = {2015},
  url          = {https://doi.org/10.1155/2015/767161},
  doi          = {10.1155/2015/767161},
  timestamp    = {Sun, 02 Jun 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsi/WangS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsi/WangSX15,
  author       = {Xiao Wang and
                  Zelin Shi and
                  Baoshu Xu},
  title        = {A Modularized Noise Analysis Method with Its Application in Readout
                  Circuit Design},
  journal      = {{VLSI} Design},
  volume       = {2015},
  pages        = {593019:1--593019:10},
  year         = {2015},
  url          = {https://doi.org/10.1155/2015/593019},
  doi          = {10.1155/2015/593019},
  timestamp    = {Sun, 02 Jun 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsi/WangSX15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}