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@article{DBLP:journals/tcad/0004KMMRRTW15,
author = {Amit Kumar and
Mark Kassab and
Elham K. Moghaddam and
Nilanjan Mukherjee and
Janusz Rajski and
Sudhakar M. Reddy and
Jerzy Tyszer and
Chen Wang},
title = {Isometric Test Data Compression},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1847--1859},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2432133},
doi = {10.1109/TCAD.2015.2432133},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/0004KMMRRTW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AgostaBPS15,
author = {Giovanni Agosta and
Alessandro Barenghi and
Gerardo Pelosi and
Michele Scandale},
title = {The {MEET} Approach: Securing Cryptographic Embedded Software Against
Side Channel Attacks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1320--1333},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2430320},
doi = {10.1109/TCAD.2015.2430320},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AgostaBPS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AgrawalC15,
author = {Mukesh Agrawal and
Krishnendu Chakrabarty},
title = {Test-Cost Modeling and Optimal Test-Flow Selection of 3-D-Stacked
ICs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1523--1536},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2419227},
doi = {10.1109/TCAD.2015.2419227},
timestamp = {Thu, 09 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/AgrawalC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AgrawalCW15,
author = {Mukesh Agrawal and
Krishnendu Chakrabarty and
Randy Widialaksono},
title = {Reuse-Based Optimization for Prebond and Post-Bond Testing of 3-D-Stacked
ICs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {122--135},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2369747},
doi = {10.1109/TCAD.2014.2369747},
timestamp = {Thu, 09 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/AgrawalCW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AhrensGK0P0T15,
author = {Markus Ahrens and
Michael Gester and
Niko Klewinghaus and
Dirk M{\"{u}}ller and
Sven Peyer and
Christian Schulte and
Gustavo E. T{\'{e}}llez},
title = {Detailed Routing Algorithms for Advanced Technology Nodes},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {563--576},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2385755},
doi = {10.1109/TCAD.2014.2385755},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AhrensGK0P0T15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AkopyanSCAAMIND15,
author = {Filipp Akopyan and
Jun Sawada and
Andrew Cassidy and
Rodrigo Alvarez{-}Icaza and
John V. Arthur and
Paul Merolla and
Nabil Imam and
Yutaka Y. Nakamura and
Pallab Datta and
Gi{-}Joon Nam and
Brian Taba and
Michael P. Beakes and
Bernard Brezzo and
Jente B. Kuang and
Rajit Manohar and
William P. Risk and
Bryan L. Jackson and
Dharmendra S. Modha},
title = {TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable
Neurosynaptic Chip},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1537--1557},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2474396},
doi = {10.1109/TCAD.2015.2474396},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AkopyanSCAAMIND15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AlaghiH15,
author = {Armin Alaghi and
John P. Hayes},
title = {{STRAUSS:} Spectral Transform Use in Stochastic Circuit Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1770--1783},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2432138},
doi = {10.1109/TCAD.2015.2432138},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AlaghiH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AlamNF15,
author = {Mohsen Riahi Alam and
Mostafa Ersali Salehi Nasab and
Sied Mehdi Fakhraie},
title = {Power Efficient High-Level Synthesis by Centralized and Fine-Grained
Clock Gating},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {1954--1963},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2445734},
doi = {10.1109/TCAD.2015.2445734},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AlamNF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AliSSK15,
author = {Sk Subidh Ali and
Samah Mohamed Saeed and
Ozgur Sinanoglu and
Ramesh Karri},
title = {Novel Test-Mode-Only Scan Attack and Countermeasure for Compression-Based
Scan Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {808--821},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2398423},
doi = {10.1109/TCAD.2015.2398423},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/AliSSK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AzarderakhshK15,
author = {Reza Azarderakhsh and
Mehran Mozaffari Kermani},
title = {High-Performance Two-Dimensional Finite Field Multiplication and Exponentiation
for Cryptographic Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1569--1576},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2424928},
doi = {10.1109/TCAD.2015.2424928},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AzarderakhshK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AzarderakhshKJ15,
author = {Reza Azarderakhsh and
Mehran Mozaffari Kermani and
Kimmo J{\"{a}}rvinen},
title = {Secure and Efficient Architectures for Single Exponentiations in Finite
Fields Suitable for High-Performance Cryptographic Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {332--340},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387866},
doi = {10.1109/TCAD.2014.2387866},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AzarderakhshKJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BanerjeeDWSC15,
author = {Debashis Banerjee and
Shyam Kumar Devarakond and
Xian Wang and
Shreyas Sen and
Abhijit Chatterjee},
title = {Real-Time Use-Aware Adaptive {RF} Transceiver Systems for Energy Efficiency
Under {BER} Constraints},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1209--1222},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2419617},
doi = {10.1109/TCAD.2015.2419617},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BanerjeeDWSC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BaoFS15,
author = {Chongxi Bao and
Domenic Forte and
Ankur Srivastava},
title = {Temperature Tracking: Toward Robust Run-Time Detection of Hardware
Trojans},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1577--1585},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2424929},
doi = {10.1109/TCAD.2015.2424929},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/BaoFS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BaranowskiKW15,
author = {Rafal Baranowski and
Michael A. Kochte and
Hans{-}Joachim Wunderlich},
title = {Fine-Grained Access Management in Reconfigurable Scan Networks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {937--946},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2391266},
doi = {10.1109/TCAD.2015.2391266},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BaranowskiKW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Becker15,
author = {Georg T. Becker},
title = {On the Pitfalls of Using Arbiter-PUFs as Building Blocks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1295--1307},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2427259},
doi = {10.1109/TCAD.2015.2427259},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Becker15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BilginGNNR15,
author = {Beg{\"{u}}l Bilgin and
Benedikt Gierlichs and
Svetla Nikova and
Ventzislav Nikov and
Vincent Rijmen},
title = {Trade-Offs for Threshold Implementations Illustrated on {AES}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1188--1200},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2419623},
doi = {10.1109/TCAD.2015.2419623},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BilginGNNR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BolchiniCGQS15,
author = {Cristiana Bolchini and
Luca Cassano and
Paolo Garza and
Elisa Quintarelli and
Fabio Salice},
title = {An Expert {CAD} Flow for Incremental Functional Diagnosis of Complex
Electronic Boards},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {835--848},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2396997},
doi = {10.1109/TCAD.2015.2396997},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BolchiniCGQS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BroichG15,
author = {Rene Broich and
Hans Grobler},
title = {Soft-Core Dataflow Processor Architecture Optimized for Radar Signal
Processing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {43--51},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2363388},
doi = {10.1109/TCAD.2014.2363388},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BroichG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CaoZCC15,
author = {Yuan Cao and
Le Zhang and
Chip{-}Hong Chang and
Shoushun Chen},
title = {A Low-Power Hybrid {RO} {PUF} With Improved Thermal Stability for
Lightweight Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1143--1147},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2424955},
doi = {10.1109/TCAD.2015.2424955},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CaoZCC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChakrabortyR15,
author = {Samarjit Chakraborty and
S. Ramesh},
title = {Guest Editorial Special Section on Automotive Embedded Systems and
Software},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1701--1703},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2488378},
doi = {10.1109/TCAD.2015.2488378},
timestamp = {Tue, 14 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChakrabortyR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChangWPTM15,
author = {Jyun{-}Hao Chang and
Hsin{-}I Wu and
Hsien{-}Lun Pai and
Ren{-}Song Tsay and
Wai{-}Kei Mak},
title = {Highly Efficient and Effective Approach for Synchronization-Function-Level
Parallel Multicore Instruction-Set Simulations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1822--1835},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2434954},
doi = {10.1109/TCAD.2015.2434954},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChangWPTM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChatterjeeFN15,
author = {Sandeep Chatterjee and
Mohammad Fawaz and
Farid N. Najm},
title = {Redundancy-Aware Power Grid Electromigration Checking Under Workload
Uncertainties},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1509--1522},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2419215},
doi = {10.1109/TCAD.2015.2419215},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChatterjeeFN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenAJ15,
author = {Chao Chen and
Jos{\'{e}} L. Abell{\'{a}}n and
Ajay Joshi},
title = {Managing Laser Power in Silicon-Photonic NoC Through Cache and NoC
Reconfiguration},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {972--985},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2402172},
doi = {10.1109/TCAD.2015.2402172},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChenAJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenWSHC15,
author = {Yu{-}Guang Chen and
Wan{-}Yu Wen and
Yiyu Shi and
Wing{-}Kai Hon and
Shih{-}Chieh Chang},
title = {Novel Spare {TSV} Deployment for 3-D ICs Considering Yield and Timing
Constraints},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {577--588},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2385759},
doi = {10.1109/TCAD.2014.2385759},
timestamp = {Tue, 13 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChenWSHC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChhabraRJTPBK15,
author = {Amit Chhabra and
Harsh Rawat and
Mohit Jain and
Pascal Tessier and
Daniel Pierredon and
Laurent Bergher and
Promod Kumar},
title = {{FALPEM:} Framework for Architectural-Level Power Estimation and Optimization
for Large Memory Sub-Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1138--1142},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387859},
doi = {10.1109/TCAD.2014.2387859},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChhabraRJTPBK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChienCHLW15,
author = {Hsi{-}An Chien and
Ye{-}Hong Chen and
Szu{-}Yuan Han and
Hsiu{-}Yu Lai and
Ting{-}Chi Wang},
title = {On Refining Row-Based Detailed Placement for Triple Patterning Lithography},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {778--793},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2408253},
doi = {10.1109/TCAD.2015.2408253},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChienCHLW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChuM15,
author = {Chris C. N. Chu and
Wai{-}Kei Mak},
title = {Flexible Packed Stencil Design With Multiple Shaping Apertures and
Overlapping Shots for E-beam Lithography},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1652--1663},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2427256},
doi = {10.1109/TCAD.2015.2427256},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChuM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChungK15,
author = {Jaeyong Chung and
Jibum Kim},
title = {Segment Delay Learning From Quantized Path Delay Measurements},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {1038--1042},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2419631},
doi = {10.1109/TCAD.2015.2419631},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChungK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CiuprinaIJH15,
author = {Gabriela Ciuprina and
Daniel Ioan and
Rick Janssen and
Edwin van der Heijden},
title = {{MEEC} Models for {RFIC} Design Based on Coupled Electric and Magnetic
Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {395--408},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387863},
doi = {10.1109/TCAD.2014.2387863},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CiuprinaIJH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CortezHKLMS15,
author = {Mafalda Cortez and
Said Hamdioui and
Ali Kaichouhi and
Vincent van der Leest and
Roel Maes and
Geert Jan Schrijen},
title = {Intelligent Voltage Ramp-Up Time Adaptation for Temperature Noise
Reduction on Memory-Based {PUF} Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1162--1175},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2422844},
doi = {10.1109/TCAD.2015.2422844},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CortezHKLMS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CourbonFLT15,
author = {Franck Courbon and
Jacques J. A. Fournier and
Philippe Loubet{-}Moundi and
Assia Tria},
title = {Combining Image Processing and Laser Fault Injections for Characterizing
a Hardware {AES}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {928--936},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2391773},
doi = {10.1109/TCAD.2015.2391773},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CourbonFLT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DavoodiHOS15,
author = {Azadeh Davoodi and
Jiang Hu and
Muhammet Mustafa Ozdal and
Cliff C. N. Sze},
title = {Guest Editorial: Special Section on Physical Design Techniques for
Advanced Technology Nodes},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {501},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2410671},
doi = {10.1109/TCAD.2015.2410671},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DavoodiHOS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DelvauxGSV15,
author = {Jeroen Delvaux and
Dawu Gu and
Dries Schellekens and
Ingrid Verbauwhede},
title = {Helper Data Algorithms for PUF-Based Key Generation: Overview and
Analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {889--902},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2370531},
doi = {10.1109/TCAD.2014.2370531},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DelvauxGSV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DeutschCM15,
author = {Sergej Deutsch and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {Robust Optimization of Test-Access Architectures Under Realistic Scenarios},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1873--1884},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2432139},
doi = {10.1109/TCAD.2015.2432139},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/DeutschCM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DinhYH15,
author = {Trung Anh Dinh and
Shigeru Yamashita and
Tsung{-}Yi Ho},
title = {An Optimal Pin-Count Design With Logic Optimization for Digital Microfluidic
Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {629--641},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394502},
doi = {10.1109/TCAD.2015.2394502},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DinhYH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DinizSBH15,
author = {Cl{\'{a}}udio Machado Diniz and
Muhammad Shafique and
Sergio Bampi and
J{\"{o}}rg Henkel},
title = {A Reconfigurable Hardware Architecture for Fractional Pixel Interpolation
in High Efficiency Video Coding},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {238--251},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2384517},
doi = {10.1109/TCAD.2014.2384517},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DinizSBH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DongAL15,
author = {Sheqin Dong and
Jianchang Ao and
Fuqi Luo},
title = {Delay-Driven and Antenna-Aware Layer Assignment in Global Routing
Under Multitier Interconnect Structure},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {740--752},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2404871},
doi = {10.1109/TCAD.2015.2404871},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DongAL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DongZC15,
author = {Chuansheng Dong and
Haibo Zeng and
Minghua Chen},
title = {Online Algorithms for Automotive Idling Reduction With Effective Statistics},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1742--1755},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2469779},
doi = {10.1109/TCAD.2015.2469779},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DongZC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DuLCPTW15,
author = {Zidong Du and
Avinash Lingamneni and
Yunji Chen and
Krishna V. Palem and
Olivier Temam and
Chengyong Wu},
title = {Leveraging the Error Resilience of Neural Networks for Designing Highly
Energy Efficient Accelerators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1223--1235},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2419628},
doi = {10.1109/TCAD.2015.2419628},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DuLCPTW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DuanZCD15,
author = {Qing Duan and
Jun Zeng and
Krishnendu Chakrabarty and
Gary Dispoto},
title = {Accurate Predictions of Process-Execution Time and Process Status
Based on Support-Vector Regression for Enterprise Information Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {354--366},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387831},
doi = {10.1109/TCAD.2014.2387831},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/DuanZCD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/EbeidFQ15,
author = {Emad Samuel Malki Ebeid and
Franco Fummi and
Davide Quaglia},
title = {Model-Driven Design of Network Aspects of Distributed Embedded Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {603--614},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394395},
doi = {10.1109/TCAD.2015.2394395},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/EbeidFQ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/EbrahimiETCACS15,
author = {Mojtaba Ebrahimi and
Adrian Evans and
Mehdi Baradaran Tahoori and
Enrico Costenaro and
Dan Alexandrescu and
Vikas Chandra and
Razi Seyyedi},
title = {Comprehensive Analysis of Sequential and Combinational Soft Errors
in an Embedded Processor},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1586--1599},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2422845},
doi = {10.1109/TCAD.2015.2422845},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/EbrahimiETCACS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/EldibWTS15,
author = {Hassan Eldib and
Chao Wang and
Mostafa M. I. Taha and
Patrick Schaumont},
title = {Quantitative Masking Strength: Quantifying the Power Side-Channel
Resistance of Software Code},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1558--1568},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2424951},
doi = {10.1109/TCAD.2015.2424951},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/EldibWTS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ErbKRSWB15,
author = {Dominik Erb and
Michael A. Kochte and
Sven Reimer and
Matthias Sauer and
Hans{-}Joachim Wunderlich and
Bernd Becker},
title = {Accurate QBF-Based Test Pattern Generation in Presence of Unknown
Values},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {2025--2038},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2440315},
doi = {10.1109/TCAD.2015.2440315},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ErbKRSWB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/EwetzK15,
author = {Rickard Ewetz and
Cheng{-}Kok Koh},
title = {Cost-Effective Robustness in Clock Networks Using Near-Tree Structures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {515--528},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2391253},
doi = {10.1109/TCAD.2015.2391253},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/EwetzK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FeitenSSTPB15,
author = {Linus Feiten and
Matthias Sauer and
Tobias Schubert and
Victor Tomashevich and
Ilia Polian and
Bernd Becker},
title = {Formal Vulnerability Analysis of Security Components},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1358--1369},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2448687},
doi = {10.1109/TCAD.2015.2448687},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FeitenSSTPB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Garcia-VargasN15,
author = {Ignacio Garcia{-}Vargas and
Raouf Senhadji{-}Navarro},
title = {Finite State Machines With Input Multiplexing: {A} Performance Study},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {867--871},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2406859},
doi = {10.1109/TCAD.2015.2406859},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Garcia-VargasN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GengLLCGS15,
author = {Hui Geng and
Jianming Liu and
Pei{-}Wen Luo and
Liang{-}Chia Cheng and
Steven L. Grant and
Yiyu Shi},
title = {Selective Body Biasing for Post-Silicon Tuning of Sub-Threshold Designs:
An Adaptive Filtering Approach},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {713--725},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2401552},
doi = {10.1109/TCAD.2015.2401552},
timestamp = {Tue, 13 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/GengLLCGS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GiaquintaMP15,
author = {Emanuele Giaquinta and
Anadi Mishra and
Laura Pozzi},
title = {Maximum Convex Subgraphs Under {I/O} Constraint for Automatic Identification
of Custom Instructions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {483--494},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387375},
doi = {10.1109/TCAD.2014.2387375},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GiaquintaMP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GornikMOP15,
author = {Andreas Gornik and
Amir Moradi and
J{\"{u}}rgen Oehm and
Christof Paar},
title = {A Hardware-Based Countermeasure to Reduce Side-Channel Leakage: Design,
Implementation, and Evaluation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1308--1319},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2423274},
doi = {10.1109/TCAD.2015.2423274},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/GornikMOP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GrammatikakisPP15,
author = {Miltos D. Grammatikakis and
Kyprianos Papadimitriou and
Polydoros Petrakis and
Antonis Papagrigoriou and
George Kornaros and
Ioannis Christoforakis and
Othon Tomoutzoglou and
George Tsamis and
Marcello Coppola},
title = {Security in MPSoCs: {A} NoC Firewall and an Evaluation Framework},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1344--1357},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2448684},
doi = {10.1109/TCAD.2015.2448684},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GrammatikakisPP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GupteW15,
author = {Naval Gupte and
Jia Wang},
title = {Secure Power Grid Simulation on Cloud},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {422--432},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387372},
doi = {10.1109/TCAD.2014.2387372},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GupteW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Hajj15,
author = {Ibrahim N. Hajj},
title = {On Device Modeling for Circuit Simulation With Application to Carbon-Nanotube
and Graphene Nano-Ribbon Field-Effect Transistors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {495--499},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387864},
doi = {10.1109/TCAD.2014.2387864},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Hajj15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HajraM15,
author = {Suvadeep Hajra and
Debdeep Mukhopadhyay},
title = {Reaching the Limit of Nonprofiling {DPA}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {915--927},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387830},
doi = {10.1109/TCAD.2014.2387830},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HajraM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HanZF15,
author = {Lengfei Han and
Xueqian Zhao and
Zhuo Feng},
title = {An Adaptive Graph Sparsification Approach to Scalable Harmonic Balance
Analysis of Strongly Nonlinear Post-Layout {RF} Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {173--185},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2376991},
doi = {10.1109/TCAD.2014.2376991},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HanZF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HernandezA15,
author = {Carles Hern{\'{a}}ndez and
Jaume Abella},
title = {Timely Error Detection for Effective Recovery in Light-Lockstep Automotive
Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1718--1729},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2434958},
doi = {10.1109/TCAD.2015.2434958},
timestamp = {Fri, 14 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HernandezA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Hills0SWLBWM15,
author = {Gage Hills and
Jie Zhang and
Max Marcel Shulaker and
Hai Wei and
Chi{-}Shuen Lee and
Arjun Balasingam and
H.{-}S. Philip Wong and
Subhasish Mitra},
title = {Rapid Co-Optimization of Processing and Circuit Design to Overcome
Carbon Nanotube Variations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1082--1095},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2415492},
doi = {10.1109/TCAD.2015.2415492},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Hills0SWLBWM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HoOCT15,
author = {Kuan{-}Hsien Ho and
Hung{-}Chih Ou and
Yao{-}Wen Chang and
Hui{-}Fang Tsao},
title = {Coupling-Aware Length-Ratio-Matching Routing for Capacitor Arrays
in Analog Integrated Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {161--172},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2379656},
doi = {10.1109/TCAD.2014.2379656},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HoOCT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HuangLKCM15,
author = {Ke Huang and
Yu Liu and
Nenad Korolija and
John M. Carulli and
Yiorgos Makris},
title = {Recycled {IC} Detection Based on Statistical Methods},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {947--960},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2409267},
doi = {10.1109/TCAD.2015.2409267},
timestamp = {Wed, 27 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HuangLKCM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HuangTLZTC15,
author = {Shi{-}Yu Huang and
Meng{-}Ting Tsai and
Hua{-}Xuan Li and
Zeng{-}Fu Zeng and
Kun{-}Han Hans Tsai and
Wu{-}Tung Cheng},
title = {Nonintrusive On-Line Transition-Time Binning and Timing Failure Threat
Detection for Die-to-Die Interconnects},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {2039--2048},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2440322},
doi = {10.1109/TCAD.2015.2440322},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HuangTLZTC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HuangTZTC15,
author = {Shi{-}Yu Huang and
Meng{-}Ting Tsai and
Zeng{-}Fu Zeng and
Kun{-}Han Hans Tsai and
Wu{-}Tung Cheng},
title = {General Timing-Aware Built-In Self-Repair for Die-to-Die Interconnects},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1836--1846},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2432131},
doi = {10.1109/TCAD.2015.2432131},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HuangTZTC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HuangYHTWC15,
author = {Ching{-}Yi Huang and
Zheng{-}Shan Yu and
Yung{-}Chun Hu and
Tung{-}Chen Tsou and
Chun{-}Yao Wang and
Yung{-}Chih Chen},
title = {Correctness Analysis and Power Optimization for Probabilistic Boolean
Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {615--628},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394378},
doi = {10.1109/TCAD.2015.2394378},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HuangYHTWC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JafarzadehPEHA15,
author = {Nima Jafarzadeh and
Maurizio Palesi and
Saeedeh Eskandari and
Shaahin Hessabi and
Ali Afzali{-}Kusha},
title = {Low Energy yet Reliable Data Communication Scheme for Network-on-Chip},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {1892--1904},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2440311},
doi = {10.1109/TCAD.2015.2440311},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JafarzadehPEHA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JiaoMFDD15,
author = {Fanshu Jiao and
Sergio Montano and
Cristian Ferent and
Alex Doboli and
Simona Doboli},
title = {Analog Circuit Design Knowledge Mining: Discovering Topological Similarities
and Uncovering Design Reasoning Strategies},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1045--1058},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2418287},
doi = {10.1109/TCAD.2015.2418287},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JiaoMFDD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JinDDS15,
author = {Xiaoqing Jin and
Alexandre Donz{\'{e}} and
Jyotirmoy V. Deshmukh and
Sanjit A. Seshia},
title = {Mining Requirements From Closed-Loop Control Models},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1704--1717},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2421907},
doi = {10.1109/TCAD.2015.2421907},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JinDDS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JungS15,
author = {Sanghyuk Jung and
Yong Ho Song},
title = {Garbage Collection for Low Performance Variation in {NAND} Flash Storage
Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {16--28},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2369501},
doi = {10.1109/TCAD.2014.2369501},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JungS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KannanKKS15,
author = {Sachhidh Kannan and
Naghmeh Karimi and
Ramesh Karri and
Ozgur Sinanoglu},
title = {Modeling, Detection, and Diagnosis of Faults in Multilevel Memristor
Memories},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {822--834},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394434},
doi = {10.1109/TCAD.2015.2394434},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KannanKKS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KannanKSK15,
author = {Sachhidh Kannan and
Naghmeh Karimi and
Ozgur Sinanoglu and
Ramesh Karri},
title = {Security Vulnerabilities of Emerging Nonvolatile Main Memories and
Countermeasures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {2--15},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2369741},
doi = {10.1109/TCAD.2014.2369741},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KannanKSK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KarriKSMMSB15,
author = {Ramesh Karri and
Farinaz Koushanfar and
Ozgur Sinanoglu and
Yiorgos Makris and
Ken Mai and
Ahmad{-}Reza Sadeghi and
Swarup Bhunia},
title = {Guest Editorial Special Section on Hardware Security and Trust},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {873--874},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2432680},
doi = {10.1109/TCAD.2015.2432680},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KarriKSMMSB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KermaniMA15,
author = {Mehran Mozaffari Kermani and
Niranjan Manoharan and
Reza Azarderakhsh},
title = {Reliable Radix-4 Complex Division for Fault-Sensitive Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {656--667},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394389},
doi = {10.1109/TCAD.2015.2394389},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KermaniMA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KhanSBH15,
author = {Muhammad Usman Karim Khan and
Muhammad Shafique and
Lars Bauer and
J{\"{o}}rg Henkel},
title = {Multicast FullHD {H.264} Intra Video Encoder Architecture},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {2049--2053},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2446933},
doi = {10.1109/TCAD.2015.2446933},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KhanSBH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KhandelwalADCDC15,
author = {Sourabh Khandelwal and
Harshit Agarwal and
Juan Pablo Duarte and
Kaiman Chan and
Sagnik Dey and
Yogesh Singh Chauhan and
Chenming Hu},
title = {Modeling {STI} Edge Parasitic Current for Accurate Circuit Simulations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1291--1294},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2419626},
doi = {10.1109/TCAD.2015.2419626},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KhandelwalADCDC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KnechtelYL15,
author = {Johann Knechtel and
Evangeline F. Y. Young and
Jens Lienig},
title = {Planning Massive Interconnects in 3-D Chips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1808--1821},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2432141},
doi = {10.1109/TCAD.2015.2432141},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KnechtelYL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KodamaINNNKI015,
author = {Chikaaki Kodama and
Hirotaka Ichikawa and
Koichi Nakayama and
Fumiharu Nakajima and
Shigeki Nojima and
Toshiya Kotani and
Takeshi Ihara and
Atsushi Takahashi},
title = {Self-Aligned Double and Quadruple Patterning Aware Grid Routing Methods},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {753--765},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2404878},
doi = {10.1109/TCAD.2015.2404878},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KodamaINNNKI015.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Koranne15,
author = {Sandeep Koranne},
title = {Design and Analysis of Silicon Photonics Wave Guides Using Symbolic
Methods},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {341--353},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394398},
doi = {10.1109/TCAD.2015.2394398},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Koranne15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Koranne15a,
author = {Sandeep Koranne},
title = {D{\'{E}}J{\`{A}} {VU:} An Entropy Reduced Hash Function for {VLSI}
Layout Databases},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1798--1807},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2432132},
doi = {10.1109/TCAD.2015.2432132},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Koranne15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KorobkovAV15,
author = {Alexander Korobkov and
Amit Agarwal and
Subramanian Venkateswaran},
title = {Efficient FinFET Device Model Implementation for {SPICE} Simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1696--1699},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2424956},
doi = {10.1109/TCAD.2015.2424956},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KorobkovAV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KungKM15,
author = {Jaeha Kung and
Duckhwan Kim and
Saibal Mukhopadhyay},
title = {On the Impact of Energy-Accuracy Tradeoff in a Digital Cellular Neural
Network for Image Processing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1070--1081},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2406853},
doi = {10.1109/TCAD.2015.2406853},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KungKM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LahaKMRDK15,
author = {Soumyasanta Laha and
Savas Kaya and
David W. Matolak and
William Rayess and
Dominic DiTomaso and
Avinash Karanth Kodi},
title = {A New Frontier in Ultralow Power Wireless Links: Network-on-Chip and
Chip-to-Chip Interconnects},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {186--198},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2379640},
doi = {10.1109/TCAD.2014.2379640},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LahaKMRDK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeePHY15,
author = {Yu{-}Min Lee and
Chi{-}Wen Pan and
Pei{-}Yu Huang and
Chi{-}Ping Yang},
title = {LUTSim: {A} Look-Up Table-Based Thermal Simulator for 3-D ICs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1250--1263},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2401578},
doi = {10.1109/TCAD.2015.2401578},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LeePHY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeeWP15,
author = {Woojoo Lee and
Yanzhi Wang and
Massoud Pedram},
title = {Optimizing a Reconfigurable Power Distribution Network in a Multicore
Platform},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1110--1123},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2396998},
doi = {10.1109/TCAD.2015.2396998},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LeeWP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiGSWCY15,
author = {Boxun Li and
Peng Gu and
Yi Shan and
Yu Wang and
Yiran Chen and
Huazhong Yang},
title = {RRAM-Based Analog Approximate Computing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {1905--1917},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2445741},
doi = {10.1109/TCAD.2015.2445741},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiGSWCY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiS15,
author = {Bing Li and
Ulf Schlichtmann},
title = {Statistical Timing Analysis and Criticality Computation for Circuits
With Post-Silicon Clock Tuning Elements},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1784--1797},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2432143},
doi = {10.1109/TCAD.2015.2432143},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiYWZZ15,
author = {Xiao Li and
Fan Yang and
Dake Wu and
Zhenya Zhou and
Xuan Zeng},
title = {{MOS} Table Models for Fast and Accurate Simulation of Analog and
Mixed-Signal Circuits Using Efficient Oscillation-Diminishing Interpolations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1481--1494},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2413392},
doi = {10.1109/TCAD.2015.2413392},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiYWZZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiangMJ15,
author = {Yun Liang and
Tulika Mitra and
Lei Ju},
title = {Instruction Cache Locking Using Temporal Reuse Profile},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1387--1400},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2418320},
doi = {10.1109/TCAD.2015.2418320},
timestamp = {Tue, 07 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiangMJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiangXSC15,
author = {Yun Liang and
Xiaolong Xie and
Guangyu Sun and
Deming Chen},
title = {An Efficient Compiler Framework for Cache Bypassing on GPUs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1677--1690},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2424962},
doi = {10.1109/TCAD.2015.2424962},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiangXSC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LimLK15,
author = {Jaeil Lim and
Hyunyul Lim and
Sungho Kang},
title = {3-D Stacked {DRAM} Refresh Management With Guaranteed Data Reliability},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1455--1466},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2413411},
doi = {10.1109/TCAD.2015.2413411},
timestamp = {Mon, 15 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LimLK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinCSBN15,
author = {Tao Lin and
Chris C. N. Chu and
Joseph R. Shinnerl and
Ismail Bustany and
Ivailo Nedelchev},
title = {{POLAR:} {A} High Performance Mixed-Size Wirelengh-Driven Placer With
Density Constraints},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {447--459},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394383},
doi = {10.1109/TCAD.2015.2394383},
timestamp = {Wed, 09 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinCSBN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinG15,
author = {Yaoyao Lin and
Emad Gad},
title = {Formulation of the Obreshkov-Based Transient Circuit Simulator in
the Presence of Nonlinear Memory Elements},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {86--94},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2364974},
doi = {10.1109/TCAD.2014.2364974},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinHC15,
author = {Mark Po{-}Hung Lin and
Chih{-}Cheng Hsu and
Yu{-}Chuan Chen},
title = {Clock-Tree Aware Multibit Flip-Flop Generation During Placement for
Power Optimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {280--292},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2376988},
doi = {10.1109/TCAD.2014.2376988},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LinHC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinL15,
author = {Jai{-}Ming Lin and
Che{-}Chun Lin},
title = {Placement Density Aware Power Switch Planning Methodology for Power
Gating Designs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {766--777},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2401573},
doi = {10.1109/TCAD.2015.2401573},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinL15a,
author = {Honghuang Lin and
Peng Li},
title = {Circuit Performance Classification With Active Learning Guided Sampling
for Support Vector Machines},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1467--1480},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2413840},
doi = {10.1109/TCAD.2015.2413840},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinL15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinRGDS15,
author = {Chung{-}Wei Lin and
Lei Rao and
Paolo Giusto and
Joseph D'Ambrosio and
Alberto L. Sangiovanni{-}Vincentelli},
title = {Efficient Wire Routing and Wire Sizing for Weight Minimization of
Automotive Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1730--1741},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2448680},
doi = {10.1109/TCAD.2015.2448680},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinRGDS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuCH15,
author = {Chia{-}Hung Liu and
Ting{-}Wei Chiang and
Juinn{-}Dar Huang},
title = {Reactant Minimization in Sample Preparation on Digital Microfluidic
Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1429--1440},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2418286},
doi = {10.1109/TCAD.2015.2418286},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuCH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuCW15,
author = {Wen{-}Hao Liu and
Tzu{-}Kai Chien and
Ting{-}Chi Wang},
title = {Region-Based and Panel-Based Algorithms for Unroutable Placement Recognition},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {502--514},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394432},
doi = {10.1109/TCAD.2015.2394432},
timestamp = {Fri, 09 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuCW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuDW15,
author = {Haotian Liu and
Luca Daniel and
Ngai Wong},
title = {Model Reduction and Simulation of Nonlinear Circuits via Tensor Decomposition},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1059--1069},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2409272},
doi = {10.1109/TCAD.2015.2409272},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuDW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuFC15,
author = {Iou{-}Jen Liu and
Shao{-}Yun Fang and
Yao{-}Wen Chang},
title = {Stitch-Aware Routing for Multiple E-Beam Lithography},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {471--482},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2385761},
doi = {10.1109/TCAD.2014.2385761},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuFC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuPM15,
author = {Guangshuo Liu and
Jinpyo Park and
Diana Marculescu},
title = {Procrustes\({}^{\mbox{1}}\): Power Constrained Performance Improvement
Using Extended Maximize-Then-Swap Algorithm},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1664--1676},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2421911},
doi = {10.1109/TCAD.2015.2421911},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuPM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuSH15,
author = {Chia{-}Hung Liu and
Kuo{-}Cheng Shen and
Juinn{-}Dar Huang},
title = {Reactant Minimization for Sample Preparation on Microfluidic Biochips
With Various Mixing Models},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {1918--1927},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2440312},
doi = {10.1109/TCAD.2015.2440312},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuSH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LuZCCCWSHLTC15,
author = {Jingwei Lu and
Hao Zhuang and
Pengwen Chen and
Hongliang Chang and
Chin{-}Chih Chang and
Yiu{-}Chung Wong and
Lu Sha and
Dennis J.{-}H. Huang and
Yufeng Luo and
Chin{-}Chi Teng and
Chung{-}Kuan Cheng},
title = {ePlace-MS: Electrostatics-Based Placement for Mixed-Size Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {685--698},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2391263},
doi = {10.1109/TCAD.2015.2391263},
timestamp = {Thu, 11 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LuZCCCWSHLTC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LuoBHC15,
author = {Yan Luo and
Bhargab B. Bhattacharya and
Tsung{-}Yi Ho and
Krishnendu Chakrabarty},
title = {Design and Optimization of a Cyberphysical Digital-Microfluidic Biochip
for the Polymerase Chain Reaction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {29--42},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2363396},
doi = {10.1109/TCAD.2014.2363396},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LuoBHC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MaffezzoniBZD15,
author = {Paolo Maffezzoni and
Bichoy Bahr and
Zheng Zhang and
Luca Daniel},
title = {Analysis and Design of Weakly Coupled {LC} Oscillator Arrays Based
on Phase-Domain Macromodels},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {77--85},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2365360},
doi = {10.1109/TCAD.2014.2365360},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MaffezzoniBZD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MahmutogluD15,
author = {Ahmet Gokcen Mahmutoglu and
Alper Demir},
title = {Modeling and Simulation of Low-Frequency Noise in Nano Devices: Stochastically
Correct and Carefully Crafted Numerical Techniques},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {794--807},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2376985},
doi = {10.1109/TCAD.2014.2376985},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MahmutogluD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MammoBDW15,
author = {Biruk W. Mammo and
Valeria Bertacco and
Andrew DeOrio and
Ilya Wagner},
title = {Post-Silicon Validation of Multiprocessor Memory Consistency},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {1027--1037},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2402171},
doi = {10.1109/TCAD.2015.2402171},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MammoBDW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MarianiPZS15,
author = {Giovanni Mariani and
Gianluca Palermo and
Vittorio Zaccaria and
Cristina Silvano},
title = {DeSpErate++: An Enhanced Design Space Exploration Framework Using
Predictive Simulation Scheduling},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {293--306},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2379634},
doi = {10.1109/TCAD.2014.2379634},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MarianiPZS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MeissnerH15,
author = {Markus Meissner and
Lars Hedrich},
title = {{FEATS:} Framework for Explorative Analog Topology Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {213--226},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2376987},
doi = {10.1109/TCAD.2014.2376987},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MeissnerH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MoctarLB15,
author = {Yehdhih Ould Mohammed Moctar and
Guy G. F. Lemieux and
Philip Brisk},
title = {Fast and Memory-Efficient Routing Algorithms for Field Programmable
Gate Arrays With Sparse Intracluster Routing Crossbars},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {1928--1941},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2445739},
doi = {10.1109/TCAD.2015.2445739},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MoctarLB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NarayananAD15,
author = {Vijaykrishnan Narayanan and
Charles J. Alpert and
Sara Dailey},
title = {Editorial},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {1},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2380491},
doi = {10.1109/TCAD.2014.2380491},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NarayananAD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NawinneJRRP15,
author = {Isuru Nawinne and
Haris Javaid and
Roshan G. Ragel and
Swarnalatha Radhakrishnan and
Sri Parameswaran},
title = {Exploring Multilevel Cache Hierarchies in Application Specific MPSoCs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {1991--2003},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2445736},
doi = {10.1109/TCAD.2015.2445736},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/NawinneJRRP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NepalADBMG15,
author = {Kundan Nepal and
Soha Alhelaly and
Jennifer Dworak and
R. Iris Bahar and
Theodore W. Manikas and
Ping Guikundan},
title = {Repairing a 3-D Die-Stack Using Available Programmable Logic},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {849--861},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2399441},
doi = {10.1109/TCAD.2015.2399441},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NepalADBMG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/OborilBET15,
author = {Fabian Oboril and
Rajendra Bishnoi and
Mojtaba Ebrahimi and
Mehdi Baradaran Tahoori},
title = {Evaluation of Hybrid Memory Technologies Using {SOT-MRAM} for On-Chip
Cache Hierarchy},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {367--380},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2391254},
doi = {10.1109/TCAD.2015.2391254},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/OborilBET15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/OzdalJNBS15,
author = {Muhammet Mustafa Ozdal and
Aamer Jaleel and
Paolo Narv{\'{a}}ez and
Steven M. Burns and
Ganapati Srinivasa},
title = {Wavelet-Based Trace Alignment Algorithms for Heterogeneous Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {381--394},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387856},
doi = {10.1109/TCAD.2014.2387856},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/OzdalJNBS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PaganiCH15,
author = {Santiago Pagani and
Jian{-}Jia Chen and
J{\"{o}}rg Henkel},
title = {Energy and Peak Power Efficiency Analysis for the Single Voltage Approximation
{(SVA)} Scheme},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1415--1428},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2406862},
doi = {10.1109/TCAD.2015.2406862},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PaganiCH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PajouhiVYRR15,
author = {Zoha Pajouhi and
Swagath Venkataramani and
Karthik Yogendra and
Anand Raghunathan and
Kaushik Roy},
title = {Exploring Spin-Transfer-Torque Devices for Logic Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1441--1454},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2413852},
doi = {10.1109/TCAD.2015.2413852},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PajouhiVYRR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PanCCCLL15,
author = {Po{-}Cheng Pan and
Ching{-}Yu Chin and
Hung{-}Ming Chen and
Tung{-}Chieh Chen and
Chin{-}Chieh Lee and
Jou{-}Chun Lin},
title = {A Fast Prototyping Framework for Analog Layout Migration With Planar
Preservation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1373--1386},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2418312},
doi = {10.1109/TCAD.2015.2418312},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PanCCCLL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PanthSDL15,
author = {Shreepad Panth and
Kambiz Samadi and
Yang Du and
Sung Kyu Lim},
title = {Placement-Driven Partitioning for Congestion Mitigation in Monolithic
3D {IC} Designs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {540--553},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387827},
doi = {10.1109/TCAD.2014.2387827},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PanthSDL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ParkJHKYY15,
author = {Hyunchan Park and
Hanchan Jo and
Cheol{-}Ho Hong and
Young{-}Pil Kim and
See{-}hwan Yoo and
Chuck Yoo},
title = {SSD-Tailor: Automated Customization System for Solid-State Drives},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {862--866},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394500},
doi = {10.1109/TCAD.2015.2394500},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ParkJHKYY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ParkK15,
author = {Heechun Park and
Taewhan Kim},
title = {Synthesis of {TSV} Fault-Tolerant 3-D Clock Trees},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {266--279},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2379645},
doi = {10.1109/TCAD.2014.2379645},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ParkK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PengPL15,
author = {Yarui Peng and
Dusan Petranovic and
Sung Kyu Lim},
title = {Multi-TSV and E-Field Sharing Aware Full-chip Extraction and Mitigation
of TSV-to-Wire Coupling},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {1964--1976},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2446934},
doi = {10.1109/TCAD.2015.2446934},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PengPL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PlazaM15,
author = {Stephen M. Plaza and
Igor L. Markov},
title = {Solving the Third-Shift Problem in {IC} Piracy With Test-Aware Logic
Locking},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {961--971},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2404876},
doi = {10.1109/TCAD.2015.2404876},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PlazaM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pomeranz15,
author = {Irith Pomeranz},
title = {A Multicycle Test Set Based on a Two-Cycle Test Set With Constant
Primary Input Vectors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1124--1132},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2408257},
doi = {10.1109/TCAD.2015.2408257},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Pomeranz15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pomeranz15a,
author = {Irith Pomeranz},
title = {Computation of Seeds for LFSR-Based Diagnostic Test Generation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {2004--2012},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2459031},
doi = {10.1109/TCAD.2015.2459031},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Pomeranz15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PrihozhyBRM15,
author = {Anatoly Prihozhy and
Endri Bezati and
Ab Al{-}Hadi Ab Rahman and
Marco Mattavelli},
title = {Synthesis and Optimization of Pipelines for {HW} Implementations of
Dataflow Programs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1613--1626},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2427278},
doi = {10.1109/TCAD.2015.2427278},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PrihozhyBRM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RajendranASK15,
author = {Jeyavijayan Rajendran and
Aman Ali and
Ozgur Sinanoglu and
Ramesh Karri},
title = {Belling the {CAD:} Toward Security-Centric Electronic System Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1756--1769},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2428707},
doi = {10.1109/TCAD.2015.2428707},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RajendranASK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RoyMMP15,
author = {Subhendu Roy and
Pavlos M. Mattheakis and
Laurent Masse{-}Navette and
David Z. Pan},
title = {Clock Tree Resynthesis for Multi-Corner Multi-Mode Timing Closure},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {589--602},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394310},
doi = {10.1109/TCAD.2015.2394310},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RoyMMP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SahooNMC15,
author = {Durga Prasad Sahoo and
Phuong Ha Nguyen and
Debdeep Mukhopadhyay and
Rajat Subhra Chakraborty},
title = {A Case of Lightweight {PUF} Constructions: Cryptanalysis and Machine
Learning Attacks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1334--1343},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2448677},
doi = {10.1109/TCAD.2015.2448677},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SahooNMC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SerafyS15,
author = {Caleb Serafy and
Ankur Srivastava},
title = {{TSV} Replacement and Shield Insertion for {TSV-TSV} Coupling Reduction
in 3-D Global Placement},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {554--562},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2385754},
doi = {10.1109/TCAD.2014.2385754},
timestamp = {Thu, 18 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SerafyS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShanFX15,
author = {Weiwei Shan and
Xingyuan Fu and
Zhipeng Xu},
title = {A Secure Reconfigurable Crypto {IC} With Countermeasures Against SPA,
DPA, and {EMA}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1201--1205},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2419621},
doi = {10.1109/TCAD.2015.2419621},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShanFX15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShinPMC15,
author = {Donghwa Shin and
Massimo Poncino and
Enrico Macii and
Naehyuck Chang},
title = {A Statistical Model-Based Cell-to-Cell Variability Management of Li-ion
Battery Pack},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {252--265},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2384506},
doi = {10.1109/TCAD.2014.2384506},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShinPMC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SierraCCB15,
author = {Roberto Sierra and
Carlos Carreras and
Gabriel Caffarena and
Carlos A. L{\'{o}}pez Bario},
title = {A Formal Method for Optimal High-Level Casting of Heterogeneous Fixed-Point
Adders and Subtractors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {52--62},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2365094},
doi = {10.1109/TCAD.2014.2365094},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SierraCCB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SoaresP15,
author = {Carlos Fernando Teod{\'{o}}sio Soares and
Antonio Petraglia},
title = {Automatic Placement to Improve Capacitance Matching Using a Generalized
Common-Centroid Layout and Spatial Correlation Optimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1691--1695},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2419624},
doi = {10.1109/TCAD.2015.2419624},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SoaresP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SuCLTWH15,
author = {Hong{-}Yan Su and
Chieh{-}Chu Chen and
Yih{-}Lang Li and
An{-}Chun Tu and
Chuh{-}Jen Wu and
Chen{-}Ming Huang},
title = {A Novel Fast Layout Encoding Method for Exact Multilayer Pattern Matching
With Pr{\"{u}}fer Encoding},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {95--108},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2364973},
doi = {10.1109/TCAD.2014.2364973},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SuCLTWH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SunLLLG15,
author = {Shupeng Sun and
Xin Li and
Hongzhou Liu and
Kangsheng Luo and
Ben Gu},
title = {Fast Statistical Analysis of Rare Circuit Failure Events via Scaled-Sigma
Sampling for High-Dimensional Variation Space},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1096--1109},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2404895},
doi = {10.1109/TCAD.2015.2404895},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SunLLLG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SwierczynskiFKP15,
author = {Pawel Swierczynski and
Marc Fyrbiak and
Philipp Koppe and
Christof Paar},
title = {{FPGA} Trojans Through Detecting and Weakening of Cryptographic Primitives},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1236--1249},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2399455},
doi = {10.1109/TCAD.2015.2399455},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SwierczynskiFKP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TamB15,
author = {Wing Chiu Jason Tam and
Ronald Shawn Blanton},
title = {{LASIC:} Layout Analysis for Systematic IC-Defect Identification Using
Clustering},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1278--1290},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2406854},
doi = {10.1109/TCAD.2015.2406854},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TamB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TangLP15,
author = {Minghua Tang and
Xiaola Lin and
Maurizio Palesi},
title = {An Offline Method for Designing Adaptive Routing Based on Pressure
Model},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {307--320},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2379649},
doi = {10.1109/TCAD.2014.2379649},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TangLP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Tannir15,
author = {Dani Tannir},
title = {Direct Sensitivity Analysis of Nonlinear Distortion in {RF} Circuits
Using Multidimensional Moments},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {321--331},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2384521},
doi = {10.1109/TCAD.2014.2384521},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Tannir15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TaouilMHM15,
author = {Mottaqiallah Taouil and
Mahmoud Masadeh and
Said Hamdioui and
Erik Jan Marinissen},
title = {Post-Bond Interconnect Test and Diagnosis for 3-D Memory Stacked on
Logic},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1860--1872},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2432142},
doi = {10.1109/TCAD.2015.2432142},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/TaouilMHM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TenentesKRYA15,
author = {Vasileios Tenentes and
S. Saqib Khursheed and
Daniele Rossi and
Sheng Yang and
Bashir M. Al{-}Hashimi},
title = {{DFT} Architecture With Power-Distribution-Network Consideration for
Delay-Based Power Gating Test},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {2013--2024},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2446939},
doi = {10.1109/TCAD.2015.2446939},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TenentesKRYA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TosunAMO15,
author = {Suleyman Tosun and
Vahid Babaei Ajabshir and
Ozge Mercanoglu and
{\"{O}}zcan {\"{O}}zturk},
title = {Fault-Tolerant Topology Generation Method for Application-Specific
Network-on-Chips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1495--1508},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2413848},
doi = {10.1109/TCAD.2015.2413848},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TosunAMO15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TsengLHS15,
author = {Tsun{-}Ming Tseng and
Bing Li and
Tsung{-}Yi Ho and
Ulf Schlichtmann},
title = {ILP-Based Alleviation of Dense Meander Segments With Prioritized Shifting
and Progressive Fixing in {PCB} Routing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {1000--1013},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2402657},
doi = {10.1109/TCAD.2015.2402657},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TsengLHS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TsoutsosM15,
author = {Nektarios Georgios Tsoutsos and
Michail Maniatakos},
title = {The {HEROIC} Framework: Encrypted Computation Without Shared Keys},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {875--888},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2419619},
doi = {10.1109/TCAD.2015.2419619},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TsoutsosM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VartziotisKCJP15,
author = {Fotis Vartziotis and
Xrysovalantis Kavousianos and
Krishnendu Chakrabarty and
Arvind Jain and
Rubin A. Parekhji},
title = {Time-Division Multiplexing for Testing DVFS-Based SoCs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {668--681},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394462},
doi = {10.1109/TCAD.2015.2394462},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/VartziotisKCJP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WainbergB15,
author = {Michael Wainberg and
Vaughn Betz},
title = {Robust Optimization of Multiple Timing Constraints},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {1942--1953},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2440316},
doi = {10.1109/TCAD.2015.2440316},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WainbergB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangCB15,
author = {Ran Wang and
Krishnendu Chakrabarty and
Sudipta Bhawmik},
title = {Interconnect Testing and Test-Path Scheduling for Interposer-Based
2.5-D ICs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {136--149},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2365097},
doi = {10.1109/TCAD.2014.2365097},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WangCB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangGYS15,
author = {Zhu Wang and
Zonghua Gu and
Min Yao and
Zili Shao},
title = {Endurance-Aware Allocation of Data Variables on NVM-Based Scratchpad
Memory in Real-Time Embedded Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1600--1612},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2422846},
doi = {10.1109/TCAD.2015.2422846},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangGYS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangSHGS15,
author = {Qian Wang and
Xiaoyu Song and
William N. N. Hung and
Ming Gu and
Jiaguang Sun},
title = {Scalable Verification of a Generic End-Around-Carry Adder for Floating-Point
Units by Coq},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {150--154},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2363391},
doi = {10.1109/TCAD.2014.2363391},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangSHGS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangWSTGAPDT15,
author = {Xiaoxiao Wang and
LeRoy Winemberg and
Donglin Su and
Dat Tran and
Saji George and
Nisar Ahmed and
Steve Palosh and
Allan Dobin and
Mark M. Tehranipoor},
title = {Aging Adaption in Integrated Circuits Using a Novel Built-In Sensor},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {109--121},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2366876},
doi = {10.1109/TCAD.2014.2366876},
timestamp = {Mon, 26 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangWSTGAPDT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangXWCWWYD15,
author = {Xuan Wang and
Jiang Xu and
Zhe Wang and
Kevin J. Chen and
Xiaowen Wu and
Zhehui Wang and
Peng Yang and
Luan H. K. Duong},
title = {An Analytical Study of Power Delivery Systems for Many-Core Processors
Using On-Chip and Off-Chip Voltage Regulators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {9},
pages = {1401--1414},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2413400},
doi = {10.1109/TCAD.2015.2413400},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WangXWCWWYD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuDLHCYW15,
author = {Chen Wu and
Chenchen Deng and
Leibo Liu and
Jie Han and
Jiqiang Chen and
Shouyi Yin and
Shaojun Wei},
title = {An Efficient Application Mapping Approach for the Co-Optimization
of Reliability, Energy, and Performance in Reconfigurable NoC Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1264--1277},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2422843},
doi = {10.1109/TCAD.2015.2422843},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WuDLHCYW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuLCYLH15,
author = {Po{-}Hsun Wu and
Mark Po{-}Hung Lin and
Tung{-}Chieh Chen and
Ching{-}Feng Yeh and
Xin Li and
Tsung{-}Yi Ho},
title = {A Novel Analog Physical Synthesis Methodology Integrating Existent
Design Expertise},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {199--212},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2379630},
doi = {10.1109/TCAD.2014.2379630},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WuLCYLH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/XuCYYP15,
author = {Xiaoqing Xu and
Brian Cline and
Greg Yeric and
Bei Yu and
David Z. Pan},
title = {Self-Aligned Double Patterning Aware Pin Access and Standard Cell
Layout Co-Optimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {699--712},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2399439},
doi = {10.1109/TCAD.2015.2399439},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/XuCYYP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/XuRHFB15,
author = {Xiaolin Xu and
Amir Rahmati and
Daniel E. Holcomb and
Kevin Fu and
Wayne P. Burleson},
title = {Reliable Physical Unclonable Functions Using Data Retention Voltage
of {SRAM} Cells},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {903--914},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2418288},
doi = {10.1109/TCAD.2015.2418288},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/XuRHFB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/XydisPZS15,
author = {Sotirios Xydis and
Gianluca Palermo and
Vittorio Zaccaria and
Cristina Silvano},
title = {{SPIRIT:} Spectral-Aware Pareto Iterative Refinement Optimization
for Supervised High-Level Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {155--159},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2363392},
doi = {10.1109/TCAD.2014.2363392},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/XydisPZS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YeZCG15,
author = {Fangming Ye and
Zhaobo Zhang and
Krishnendu Chakrabarty and
Xinli Gu},
title = {Information-Theoretic Syndrome Evaluation, Statistical Root-Cause
Analysis, and Correlation-Based Feature Selection for Guiding Board-Level
Fault Diagnosis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {1014--1026},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2399438},
doi = {10.1109/TCAD.2015.2399438},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/YeZCG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YenYY15,
author = {Mao{-}Hsu Yen and
Hung{-}Kuan Yen and
Chu Yu},
title = {Comment on "On Optimal Hyperuniversal and Rearrangeable Switch Box
Designs"},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1133--1137},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2408256},
doi = {10.1109/TCAD.2015.2408256},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YenYY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YuLJC15,
author = {Yen{-}Ting Yu and
Geng{-}He Lin and
Iris Hui{-}Ru Jiang and
Charles C. Chiang},
title = {Machine-Learning-Based Hotspot Detection Using Topological Classification
and Critical Feature Extraction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {460--470},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387858},
doi = {10.1109/TCAD.2014.2387858},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YuLJC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YuXGL0AP15,
author = {Bei Yu and
Xiaoqing Xu and
Jhih{-}Rong Gao and
Yibo Lin and
Zhuo Li and
Charles J. Alpert and
David Z. Pan},
title = {Methodology for Standard Cell Compliance and Detailed Placement for
Triple Patterning Lithography},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {726--739},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2401571},
doi = {10.1109/TCAD.2015.2401571},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YuXGL0AP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YuYDP15,
author = {Bei Yu and
Kun Yuan and
Duo Ding and
David Z. Pan},
title = {Layout Decomposition for Triple Patterning Lithography},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {433--446},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387840},
doi = {10.1109/TCAD.2014.2387840},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YuYDP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YuYH15,
author = {Shang{-}Tsung Yu and
Sheng{-}Han Yeh and
Tsung{-}Yi Ho},
title = {Reliability-Driven Chip-Level Design for High-Frequency Digital Microfluidic
Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {529--539},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2387828},
doi = {10.1109/TCAD.2014.2387828},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YuYH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangFCKR15,
author = {Le Zhang and
Xuanyao Fong and
Chip{-}Hong Chang and
Zhi{-}Hui Kong and
Kaushik Roy},
title = {Optimizating Emerging Nonvolatile Memories for Dual-Mode Applications:
Data Storage and Key Generator},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1176--1187},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2427251},
doi = {10.1109/TCAD.2015.2427251},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhangFCKR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangYOKD15,
author = {Zheng Zhang and
Xiu Yang and
Ivan V. Oseledets and
George E. Karniadakis and
Luca Daniel},
title = {Enabling High-Dimensional Hierarchical Uncertainty Quantification
by {ANOVA} and Tensor-Train Decomposition},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {1},
pages = {63--76},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2369505},
doi = {10.1109/TCAD.2014.2369505},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhangYOKD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangYWLX15,
author = {Jie Zhang and
Feng Yuan and
Lingxiao Wei and
Yannan Liu and
Qiang Xu},
title = {VeriTrust: Verification for Hardware Trust},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {7},
pages = {1148--1161},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2422836},
doi = {10.1109/TCAD.2015.2422836},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhangYWLX15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangYWS15,
author = {Chao Zhang and
Wenjian Yu and
Qing Wang and
Yiyu Shi},
title = {Fast Random Walk Based Capacitance Extraction for the 3-D {IC} Structures
With Cylindrical Inter-Tier-Vias},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {12},
pages = {1977--1990},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2440323},
doi = {10.1109/TCAD.2015.2440323},
timestamp = {Tue, 13 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhangYWS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhaoHF15,
author = {Xueqian Zhao and
Lengfei Han and
Zhuo Feng},
title = {A Performance-Guided Graph Sparsification Approach to Scalable and
Robust SPICE-Accurate Integrated Circuit Simulations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1639--1651},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2424958},
doi = {10.1109/TCAD.2015.2424958},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhaoHF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhaoJSZX15,
author = {Mengying Zhao and
Lei Jiang and
Liang Shi and
Youtao Zhang and
Chun Jason Xue},
title = {Wear Relief for High-Density Phase Change Memory Through Cell Morphing
Considering Process Variation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {2},
pages = {227--237},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2014.2376989},
doi = {10.1109/TCAD.2014.2376989},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhaoJSZX15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhaoL15,
author = {Xueqian Zhao and
Zhonghai Lu},
title = {Heuristics-Aided Tightness Evaluation of Analytical Bounds in Networks-on-Chip},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {6},
pages = {986--999},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2402176},
doi = {10.1109/TCAD.2015.2402176},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhaoL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhuCPF15,
author = {Wenxing Zhu and
Jianli Chen and
Zheng Peng and
Genghua Fan},
title = {Nonsmooth Optimization Method for {VLSI} Global Placement},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {4},
pages = {642--655},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2394484},
doi = {10.1109/TCAD.2015.2394484},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhuCPF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhuWLLZF15,
author = {Hengliang Zhu and
Yuanzhe Wang and
Frank Liu and
Xin Li and
Xuan Zeng and
Peter Feldmann},
title = {Efficient Transient Analysis of Power Delivery Network With Clock/Power
Gating by Sparse Approximation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {409--421},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2391256},
doi = {10.1109/TCAD.2015.2391256},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhuWLLZF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZuoloZMICPBO15,
author = {Lorenzo Zuolo and
Cristian Zambelli and
Rino Micheloni and
Marco Indaco and
Stefano Di Carlo and
Paolo Prinetto and
Davide Bertozzi and
Piero Olivo},
title = {SSDExplorer: {A} Virtual Platform for Performance/Reliability-Oriented
Fine-Grained Design Space Exploration of Solid State Drives},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {10},
pages = {1627--1638},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2422834},
doi = {10.1109/TCAD.2015.2422834},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZuoloZMICPBO15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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