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@article{DBLP:journals/taco/ChhabraRSP09,
  author       = {Siddhartha Chhabra and
                  Brian Rogers and
                  Yan Solihin and
                  Milos Prvulovic},
  title        = {Making secure processors {OS-} and performance-friendly},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {4},
  pages        = {16:1--16:35},
  year         = {2009},
  url          = {https://doi.org/10.1145/1498690.1498691},
  doi          = {10.1145/1498690.1498691},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/ChhabraRSP09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/JeonSH09,
  author       = {Jinseong Jeon and
                  Keoncheol Shin and
                  Hwansoo Han},
  title        = {Abstracting access patterns of dynamic memory using regular expressions},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {4},
  pages        = {18:1--18:28},
  year         = {2009},
  url          = {https://doi.org/10.1145/1498690.1498693},
  doi          = {10.1145/1498690.1498693},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/JeonSH09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/Jimenez09,
  author       = {Daniel A. Jim{\'{e}}nez},
  title        = {Generalizing neural branch prediction},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {4},
  pages        = {17:1--17:27},
  year         = {2009},
  url          = {https://doi.org/10.1145/1498690.1498692},
  doi          = {10.1145/1498690.1498692},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/Jimenez09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/ShobakiWH09,
  author       = {Ghassan Shobaki and
                  Kent D. Wilken and
                  Mark Heffernan},
  title        = {Optimal trace scheduling using enumeration},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {4},
  pages        = {19:1--19:32},
  year         = {2009},
  url          = {https://doi.org/10.1145/1498690.1498694},
  doi          = {10.1145/1498690.1498694},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/ShobakiWH09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/CalderT08,
  author       = {Brad Calder and
                  Dean M. Tullsen},
  title        = {Editorial},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {1},
  pages        = {1:1},
  year         = {2008},
  url          = {https://doi.org/10.1145/1369396.1369397},
  doi          = {10.1145/1369396.1369397},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/CalderT08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/CataniaPP08,
  author       = {Vincenzo Catania and
                  Maurizio Palesi and
                  Davide Patti},
  title        = {Reducing complexity of multiobjective design space exploration in
                  VLIW-based embedded systems},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {2},
  pages        = {11:1--11:33},
  year         = {2008},
  url          = {https://doi.org/10.1145/1400112.1400116},
  doi          = {10.1145/1400112.1400116},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/CataniaPP08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/GuoNB08,
  author       = {Zhi Guo and
                  Walid A. Najjar and
                  Betul Buyukkurt},
  title        = {Efficient hardware code generation for FPGAs},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {1},
  pages        = {6:1--6:26},
  year         = {2008},
  url          = {https://doi.org/10.1145/1369396.1369402},
  doi          = {10.1145/1369396.1369402},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/GuoNB08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/JoshiEBJ08,
  author       = {Ajay Joshi and
                  Lieven Eeckhout and
                  Robert H. Bell Jr. and
                  Lizy Kurian John},
  title        = {Distilling the essence of proprietary workloads into miniature benchmarks},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {2},
  pages        = {10:1--10:33},
  year         = {2008},
  url          = {https://doi.org/10.1145/1400112.1400115},
  doi          = {10.1145/1400112.1400115},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/JoshiEBJ08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/KotzmannWMRRC08,
  author       = {Thomas Kotzmann and
                  Christian Wimmer and
                  Hanspeter M{\"{o}}ssenb{\"{o}}ck and
                  Thomas Rodriguez and
                  Kenneth B. Russell and
                  David Cox},
  title        = {Design of the Java HotSpot{\texttrademark} client compiler for Java
                  6},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {1},
  pages        = {7:1--7:32},
  year         = {2008},
  url          = {https://doi.org/10.1145/1369396.1370017},
  doi          = {10.1145/1369396.1370017},
  timestamp    = {Sun, 22 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/taco/KotzmannWMRRC08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/LeverichASFHK08,
  author       = {Jacob Leverich and
                  Hideho Arakida and
                  Alex Solomatnikov and
                  Amin Firoozshahian and
                  Mark Horowitz and
                  Christos Kozyrakis},
  title        = {Comparative evaluation of memory models for chip multiprocessors},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {3},
  pages        = {12:1--12:30},
  year         = {2008},
  url          = {https://doi.org/10.1145/1455650.1455651},
  doi          = {10.1145/1455650.1455651},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/LeverichASFHK08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/LongMMM08,
  author       = {Jieyi Long and
                  Seda Ogrenci Memik and
                  Gokhan Memik and
                  Rajarshi Mukherjee},
  title        = {Thermal monitoring mechanisms for chip multiprocessors},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {2},
  pages        = {9:1--9:33},
  year         = {2008},
  url          = {https://doi.org/10.1145/1400112.1400114},
  doi          = {10.1145/1400112.1400114},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/LongMMM08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/MehraraA08,
  author       = {Mojtaba Mehrara and
                  Todd M. Austin},
  title        = {Exploiting selective placement for low-cost memory protection},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {3},
  pages        = {14:1--14:24},
  year         = {2008},
  url          = {https://doi.org/10.1145/1455650.1455653},
  doi          = {10.1145/1455650.1455653},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/MehraraA08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/MysoreANSSS08,
  author       = {Shashidhar Mysore and
                  Banit Agrawal and
                  Rodolfo Neuber and
                  Timothy Sherwood and
                  Nisheeth Shrivastava and
                  Subhash Suri},
  title        = {Formulating and implementing profiling over adaptive ranges},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {1},
  pages        = {2:1--2:32},
  year         = {2008},
  url          = {https://doi.org/10.1145/1369396.1369398},
  doi          = {10.1145/1369396.1369398},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/taco/MysoreANSSS08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/RanganVOA08,
  author       = {Ram Rangan and
                  Neil Vachharajani and
                  Guilherme Ottoni and
                  David I. August},
  title        = {Performance scalability of decoupled software pipelining},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {2},
  pages        = {8:1--8:25},
  year         = {2008},
  url          = {https://doi.org/10.1145/1400112.1400113},
  doi          = {10.1145/1400112.1400113},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/RanganVOA08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/ShahbahramiJV08,
  author       = {Asadollah Shahbahrami and
                  Ben H. H. Juurlink and
                  Stamatis Vassiliadis},
  title        = {Versatility of extended subwords and the matrix register file},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {1},
  pages        = {5:1--5:30},
  year         = {2008},
  url          = {https://doi.org/10.1145/1369396.1369401},
  doi          = {10.1145/1369396.1369401},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/ShahbahramiJV08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/SharkeyLP08,
  author       = {Joseph J. Sharkey and
                  Jason Loew and
                  Dmitry V. Ponomarev},
  title        = {Reducing register pressure in {SMT} processors through L2-miss-driven
                  early register release},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {3},
  pages        = {13:1--13:28},
  year         = {2008},
  url          = {https://doi.org/10.1145/1455650.1455652},
  doi          = {10.1145/1455650.1455652},
  timestamp    = {Thu, 25 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/taco/SharkeyLP08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/VandierendonckS08,
  author       = {Hans Vandierendonck and
                  Andr{\'{e}} Seznec},
  title        = {Speculative return address stack management revisited},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {3},
  pages        = {15:1--15:20},
  year         = {2008},
  url          = {https://doi.org/10.1145/1455650.1455654},
  doi          = {10.1145/1455650.1455654},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/VandierendonckS08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/WinterA08,
  author       = {Jonathan A. Winter and
                  David H. Albonesi},
  title        = {Addressing thermal nonuniformity in {SMT} workloads},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {1},
  pages        = {4:1--4:28},
  year         = {2008},
  url          = {https://doi.org/10.1145/1369396.1369400},
  doi          = {10.1145/1369396.1369400},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/WinterA08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/taco/ZhaiSCM08,
  author       = {Antonia Zhai and
                  J. Gregory Steffan and
                  Christopher B. Colohan and
                  Todd C. Mowry},
  title        = {Compiler and hardware support for reducing the synchronization of
                  speculative threads},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {5},
  number       = {1},
  pages        = {3:1--3:33},
  year         = {2008},
  url          = {https://doi.org/10.1145/1369396.1369399},
  doi          = {10.1145/1369396.1369399},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/ZhaiSCM08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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