Stop the war!
Остановите войну!
for scientists:
default search action
Search dblp for Publications
export results for "toc:db/journals/integration/integration3.bht:"
@article{DBLP:journals/integration/Annaratone85, author = {Marco Annaratone}, title = {{SPLASH:} {A} framework for chip design and layout}, journal = {Integr.}, volume = {3}, number = {4}, pages = {329--345}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90017-3}, doi = {10.1016/0167-9260(85)90017-3}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/Annaratone85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/CodenottiRL85, author = {Bruno Codenotti and Francesco Romani and Grazia Lotti}, title = {{VLSI} implementation of iterative methods for the solution of linear systems}, journal = {Integr.}, volume = {3}, number = {3}, pages = {211--221}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90005-7}, doi = {10.1016/0167-9260(85)90005-7}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/CodenottiRL85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/EvansM85, author = {R. A. Evans and J. D. Morison}, title = {Architectures for language recognition}, journal = {Integr.}, volume = {3}, number = {3}, pages = {175--187}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90003-3}, doi = {10.1016/0167-9260(85)90003-3}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/EvansM85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/GayRB85, author = {J. G. Gay and Roy Richter and B. J. Berne}, title = {Component placement in {VLSI} circuits using a constant pressure Monte Carlo method}, journal = {Integr.}, volume = {3}, number = {4}, pages = {271--282}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90014-8}, doi = {10.1016/0167-9260(85)90014-8}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/GayRB85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/Grass85, author = {Werner Grass}, title = {Some results on the design of regular structured sequential circuits}, journal = {Integr.}, volume = {3}, number = {3}, pages = {189--210}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90004-5}, doi = {10.1016/0167-9260(85)90004-5}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/Grass85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/Gullichsen85, author = {Eric Gullichsen}, title = {Heuristic circuit simulation using {PROLOG}}, journal = {Integr.}, volume = {3}, number = {4}, pages = {283--318}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90015-X}, doi = {10.1016/0167-9260(85)90015-X}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/Gullichsen85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/KanopoulosM85, author = {Nick Kanopoulos and Vassilios Makios}, title = {A single-chip adaptive delta modulator with optimum performance}, journal = {Integr.}, volume = {3}, number = {4}, pages = {319--328}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90016-1}, doi = {10.1016/0167-9260(85)90016-1}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/KanopoulosM85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/KraftH85, author = {Walter Kraft and Werner Hein}, title = {A router for channels of nonuniform width containing preplaced wiring and obstacles}, journal = {Integr.}, volume = {3}, number = {3}, pages = {223--244}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90006-9}, doi = {10.1016/0167-9260(85)90006-9}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/KraftH85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/KurtzbergY85, author = {Jerome M. Kurtzberg and Ellen J. Yoffa}, title = {{ACE:} {A} congestion estimator for wiring custom chips}, journal = {Integr.}, volume = {3}, number = {2}, pages = {113--127}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90028-8}, doi = {10.1016/0167-9260(85)90028-8}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/KurtzbergY85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/Lierop85, author = {Marloes L. P. van Lierop}, title = {A flexible bottom-up approach for layout generation}, journal = {Integr.}, volume = {3}, number = {1}, pages = {49--59}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90054-9}, doi = {10.1016/0167-9260(85)90054-9}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/Lierop85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/Luccio85, author = {Fabrizio Luccio}, title = {Access to rows and columns of a rectangular array in a concentricloop bubble memory}, journal = {Integr.}, volume = {3}, number = {4}, pages = {347--354}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90018-5}, doi = {10.1016/0167-9260(85)90018-5}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/Luccio85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/Luk85, author = {W. K. Luk}, title = {A greedy switch-box router}, journal = {Integr.}, volume = {3}, number = {2}, pages = {129--149}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90029-X}, doi = {10.1016/0167-9260(85)90029-X}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/Luk85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/NittaKH85, author = {Susumu Nitta and Masahiko Kawamura and Kanji Hirabayashi}, title = {Test generation by activation and defect-drive {(TEGAD)}}, journal = {Integr.}, volume = {3}, number = {1}, pages = {3--12}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90051-3}, doi = {10.1016/0167-9260(85)90051-3}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/NittaKH85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/RajopadhyeS85, author = {Sanjay V. Rajopadhye and P. A. Subrahmanyam}, title = {Formal semantics for a symbolic {IC} design technique: Examples and applications}, journal = {Integr.}, volume = {3}, number = {1}, pages = {13--32}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90052-5}, doi = {10.1016/0167-9260(85)90052-5}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/RajopadhyeS85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/RenovellCA85, author = {Michel Renovell and Gaston Cambon and Daniel Auvergne}, title = {{FSPICE:} a tool for fault modelling in {MOS} circuits}, journal = {Integr.}, volume = {3}, number = {3}, pages = {245--255}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90007-0}, doi = {10.1016/0167-9260(85)90007-0}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/RenovellCA85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/Schiele85, author = {Werner L. Schiele}, title = {Automatic design rule adaptation of leaf cell layouts}, journal = {Integr.}, volume = {3}, number = {2}, pages = {93--112}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90027-6}, doi = {10.1016/0167-9260(85)90027-6}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/Schiele85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/ShawS85, author = {David Elliot Shaw and Theodore Sabety}, title = {The multiple-processor {PPS} chip of the {NON-VON} 3 supercomputer}, journal = {Integr.}, volume = {3}, number = {3}, pages = {161--174}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90002-1}, doi = {10.1016/0167-9260(85)90002-1}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/ShawS85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/Spaanenburg85, author = {Lambert Spaanenburg}, title = {Editorial}, journal = {Integr.}, volume = {3}, number = {1}, pages = {1}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90050-1}, doi = {10.1016/0167-9260(85)90050-1}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/Spaanenburg85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/Spaanenburg85a, author = {Lambert Spaanenburg}, title = {Editorial}, journal = {Integr.}, volume = {3}, number = {2}, pages = {73}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90025-2}, doi = {10.1016/0167-9260(85)90025-2}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/Spaanenburg85a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/Spaanenburg85b, author = {Lambert Spaanenburg}, title = {Editorial}, journal = {Integr.}, volume = {3}, number = {3}, pages = {159}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90001-X}, doi = {10.1016/0167-9260(85)90001-X}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/Spaanenburg85b.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/Spaanenburg85c, author = {Lambert Spaanenburg}, title = {Editorial}, journal = {Integr.}, volume = {3}, number = {4}, pages = {269}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90013-6}, doi = {10.1016/0167-9260(85)90013-6}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/Spaanenburg85c.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/YuW85, author = {Qingjian Yu and Omar Wing}, title = {Interval-graph-based {PLA} folding}, journal = {Integr.}, volume = {3}, number = {1}, pages = {33--48}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90053-7}, doi = {10.1016/0167-9260(85)90053-7}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/YuW85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/YuschikK85, author = {Matthew Yuschik and Hideaki Kobayashi}, title = {Top-down design of a {VLSI} digital filter bank}, journal = {Integr.}, volume = {3}, number = {2}, pages = {75--91}, year = {1985}, url = {https://doi.org/10.1016/0167-9260(85)90026-4}, doi = {10.1016/0167-9260(85)90026-4}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/YuschikK85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.