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@article{DBLP:journals/icae/AbidICVRMDJ98, author = {Mohamed Abid and Tarek Ben Ismail and Adel Changuel and Carlos A. Valderrama and Mohamed Romdhani and Gilberto Fernandes Marchioro and Jean{-}Marc Daveau and Ahmed Amine Jerraya}, title = {Hardware/Software Co-Design Methodology for Design of Embedded Systems}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {1}, pages = {69--84}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5106}, doi = {10.3233/ICA-1998-5106}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/AbidICVRMDJ98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/Adeli98, author = {Hojjat Adeli}, title = {The First Five Years}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {1}, pages = {1--5}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5101}, doi = {10.3233/ICA-1998-5101}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/Adeli98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/BalboniFS98, author = {Alessandro Balboni and William Fornaciari and Donatella Sciuto}, title = {Partitioning of Hardware-Software Embedded Systems: {A} Metrics-based Approach}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {1}, pages = {39--56}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5104}, doi = {10.3233/ICA-1998-5104}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/BalboniFS98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/Ben-AbdallahL98, author = {Han{\^{e}}ne Ben{-}Abdallah and Insup Lee}, title = {A Graphical Language for Specifying and Analyzing Real-Time Systems}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {4}, pages = {279--302}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5401}, doi = {10.3233/ICA-1998-5401}, timestamp = {Thu, 26 Jan 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/icae/Ben-AbdallahL98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/BeniniBFM98, author = {Luca Benini and Alessandro Bogliolo and Michele Favalli and Giovanni De Micheli}, title = {Regression Models for Behavioral Power Estimation}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {2}, pages = {95--106}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5201}, doi = {10.3233/ICA-1998-5201}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/BeniniBFM98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/Bestavros98, author = {Azer Bestavros}, title = {Engineering Real-Time Robotics Software Systems Using {CLEOPATRA}}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {4}, pages = {349--368}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5405}, doi = {10.3233/ICA-1998-5405}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/Bestavros98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/BisdounisNK98, author = {Labros Bisdounis and Spiridon Nikolaidis and Odysseas G. Koufopavlou}, title = {Analytical Model for the {CMOS} Short-Circuit Power Dissipation}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {2}, pages = {129--140}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5204}, doi = {10.3233/ICA-1998-5204}, timestamp = {Tue, 04 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/BisdounisNK98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/BoutiAL98, author = {Abdelkader Bouti and Daoud Ait{-}Kadi and Pierre A. Lefran{\c{c}}ois}, title = {An Integrative Functional Approach for Automated Manufacturing Systems Modeling}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {4}, pages = {333--348}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5404}, doi = {10.3233/ICA-1998-5404}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/BoutiAL98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/BuonannoS98, author = {Giacomo Buonanno and Mariagiovanna Sami}, title = {Co-Testing: Granting Testability in a Codesign Environment}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {1}, pages = {7--18}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5102}, doi = {10.3233/ICA-1998-5102}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/BuonannoS98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/CarothersR98, author = {Jo Dale Carothers and Radjakichenin Radjassamy}, title = {Low Power {VLSI} Design Techniques - The Current State}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {2}, pages = {153--176}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5206}, doi = {10.3233/ICA-1998-5206}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/CarothersR98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/ChouR98, author = {Tan{-}Li Chou and Kaushik Roy}, title = {Power Estimation Under Uncertain Delays}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {2}, pages = {107--116}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5202}, doi = {10.3233/ICA-1998-5202}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/ChouR98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/CorporaalA98, author = {Henk Corporaal and Marnix Arnold}, title = {Using Transport Triggered Architectures for Embedded Processor Design}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {1}, pages = {19--38}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5103}, doi = {10.3233/ICA-1998-5103}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/CorporaalA98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/DonnayGS98, author = {St{\'{e}}phane Donnay and Georges G. E. Gielen and Willy M. C. Sansen}, title = {High-Level Power Minimization of Analog Sensor Interface Architectures}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {4}, pages = {303--314}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5402}, doi = {10.3233/ICA-1998-5402}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/DonnayGS98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/FurberGTDP98, author = {Stephen B. Furber and Jim D. Garside and Steve Temple and Paul Day and Nigel C. Paver}, title = {Asynchronous Embedded Control}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {1}, pages = {57--68}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5105}, doi = {10.3233/ICA-1998-5105}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/FurberGTDP98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/Gebotys98, author = {Catherine H. Gebotys}, title = {Network Flow Approach to Data Regeneration for Low Energy Embedded System Synthesis}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {2}, pages = {117--128}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5203}, doi = {10.3233/ICA-1998-5203}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/Gebotys98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/Koopman98, author = {Philip Koopman}, title = {Using {CAD} Tools for Embedded System Design: Obstacles Encountered in an Automotive Case Study}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {1}, pages = {85--94}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5107}, doi = {10.3233/ICA-1998-5107}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/Koopman98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/LeeLH98, author = {Victor C. S. Lee and Kam{-}yiu Lam and Sheung{-}lun Hung}, title = {Priority Assignment in Distributed Real-time Databases Supporting Temporal Consistency}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {3}, pages = {245--260}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5304}, doi = {10.3233/ICA-1998-5304}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/LeeLH98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/MarkowskiS98, author = {Michael J. Markowski and Adarshpal S. Sethi}, title = {Blocked and Free Access Real-Time Splitting Protocols}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {3}, pages = {207--226}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5302}, doi = {10.3233/ICA-1998-5302}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/MarkowskiS98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/MonteiroD98, author = {Jos{\'{e}} Monteiro and Srinivas Devadas}, title = {Power Estimation Under User-Specified Input Sequences and Programs}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {2}, pages = {177--185}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5207}, doi = {10.3233/ICA-1998-5207}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/MonteiroD98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/MusollC98, author = {Enric Musoll and Jordi Cortadella}, title = {Register-Transfer Level Transformations for Low-Power Data-Paths}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {4}, pages = {315--332}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5403}, doi = {10.3233/ICA-1998-5403}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/MusollC98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/PucholSM98, author = {Carlos Puchol and Douglas A. Stuart and Aloysius K. Mok}, title = {An Operational Semantics and Compiler for Real-Time Specifications}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {3}, pages = {187--206}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5301}, doi = {10.3233/ICA-1998-5301}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/PucholSM98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/RyuH98, author = {Minsoo Ryu and Seongsoo Hong}, title = {Toward Automatic Synthesis of Schedulable Real-Time Controllers}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {3}, pages = {261--277}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5305}, doi = {10.3233/ICA-1998-5305}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/RyuH98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/Vardanega98, author = {Tullio Vardanega}, title = {On the Construction of New-Generation On-Board Real-Time Systems}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {3}, pages = {227--244}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5303}, doi = {10.3233/ICA-1998-5303}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/Vardanega98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/icae/XieV98, author = {Hong{-}Yu Xie and Sarma B. K. Vrudhula}, title = {A Technique for Estimating Signal Activity in Logic Circuits}, journal = {Integr. Comput. Aided Eng.}, volume = {5}, number = {2}, pages = {141--152}, year = {1998}, url = {https://doi.org/10.3233/ica-1998-5205}, doi = {10.3233/ICA-1998-5205}, timestamp = {Fri, 10 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/icae/XieV98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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