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@inproceedings{DBLP:conf/vts/AitkenSDECM02,
author = {Robert C. Aitken and
Mustapha Slamani and
H. Ding and
William R. Eisenstadt and
Sanghoon Choi and
John McLaughlin},
title = {Wireless Test},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {173--174},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.2002.10011},
doi = {10.1109/VTS.2002.10011},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AitkenSDECM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Al-ArsG02,
author = {Zaid Al{-}Ars and
Ad J. van de Goor},
title = {Approximating Infinite Dynamic Behavior for {DRAM} Cell Defects},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {401--406},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011171},
doi = {10.1109/VTS.2002.1011171},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Al-ArsG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AmyeenPF02,
author = {M. Enamul Amyeen and
Irith Pomeranz and
W. Kent Fuchs},
title = {Theorems for Efficient Identification of Indistinguishable Fault Pairs
in Synchronous Sequential Circuits},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {181--186},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011136},
doi = {10.1109/VTS.2002.1011136},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AmyeenPF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Arabi02,
author = {Karim Arabi},
title = {Logic {BIST} and Scan Test Techniques for Multiple Identical Blocks},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {60--68},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011112},
doi = {10.1109/VTS.2002.1011112},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Arabi02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ArabiHKT02,
author = {Karim Arabi and
Klaus{-}Dieter Hilliges and
David C. Keezer and
Sassan Tabatabaei},
title = {Multi-GigaHertz Testing Challenges and Solutions},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {265--268},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011149},
doi = {10.1109/VTS.2002.1011149},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ArabiHKT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AttarhaN02,
author = {Amir Attarha and
Mehrdad Nourani},
title = {Test Pattern Generation for Signal Integrity Faults on Long Interconnects},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {336--344},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011162},
doi = {10.1109/VTS.2002.1011162},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AttarhaN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BarnettSGP02,
author = {Thomas S. Barnett and
Adit D. Singh and
Matt Grady and
Kathleen G. Purdy},
title = {Yield-Reliability Modeling: Experimental Verification and Application
to Burn-In Reduction},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {75--80},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011114},
doi = {10.1109/VTS.2002.1011114},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BarnettSGP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BeroulleBLN02,
author = {Vincent Beroulle and
Yves Bertrand and
Laurent Latorre and
Pascal Nouet},
title = {Evaluation of the Oscillation-based Test Methodology for Micro-Electro-Mechanical
Systems},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {439--444},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011177},
doi = {10.1109/VTS.2002.1011177},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BeroulleBLN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BerrojoGCSSEL02,
author = {Luis Berrojo and
Isabel Gonz{\'{a}}lez and
Fulvio Corno and
Matteo Sonza Reorda and
Giovanni Squillero and
Luis Entrena and
Celia L{\'{o}}pez},
title = {An Industrial Environment for High-Level Fault-Tolerant Structures
Insertion and Validation},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {229--236},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011143},
doi = {10.1109/VTS.2002.1011143},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BerrojoGCSSEL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BhavsarD02,
author = {Dilip K. Bhavsar and
Richard A. Davies},
title = {Scan Islands - {A} Scan Partitioning Architecture and its Implementation
on the Alpha 21364 Processor},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {16--24},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011105},
doi = {10.1109/VTS.2002.1011105},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BhavsarD02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BhuniaR02,
author = {Swarup Bhunia and
Kaushik Roy},
title = {Dynamic Supply Current Testing of Analog Circuits Using Wavelet Transform},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {302--310},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011158},
doi = {10.1109/VTS.2002.1011158},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BhuniaR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BorelRSHR02,
author = {J. Borel and
Anand Raghunathan and
Jim Sproch and
Michael Howells and
Janusz Rajski},
title = {Innovations in Test Automation},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {43--46},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011109},
doi = {10.1109/VTS.2002.1011109},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BorelRSHR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BottomsSPR02,
author = {Bill Bottoms and
Lee Song and
Paul Patton and
Wilhelm Radermacher},
title = {A Successful {DFT} Tester: What Will It Look Like? Is {DFT} Tester
a Logical Next Step in {ATE} Evolution?},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {129--132},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011123},
doi = {10.1109/VTS.2002.1011123},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BottomsSPR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/CalvanoAML02,
author = {Jos{\'{e}} Vicente Calvano and
Vladimir Castro Alves and
Antonio Carneiro de Mesquita Filho and
Marcelo Lubaszewski},
title = {Filters Designed for Testability Wrapped on the Mixed-Signal Test
Bus},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {201--206},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011139},
doi = {10.1109/VTS.2002.1011139},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/CalvanoAML02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChakravartyJ02,
author = {Sreejit Chakravarty and
Ankur Jain},
title = {Fault Models for Speed Failures Caused by Bridges and Opens},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {373--378},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011167},
doi = {10.1109/VTS.2002.1011167},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChakravartyJ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChakravartyKSCSZ02,
author = {Sreejit Chakravarty and
Kambiz Komeyli and
Eric W. Savage and
Michael J. Carruthers and
Bret T. Stastny and
Sujit T. Zachariah},
title = {Layout Analysis to Extract Open Nets Caused by Systematic Failure
Mechanisms},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {367--372},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011166},
doi = {10.1109/VTS.2002.1011166},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChakravartyKSCSZ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChandraCM02,
author = {Anshuman Chandra and
Krishnendu Chakrabarty and
Rafael A. Medina},
title = {How Effective are Compression Codes for Reducing Test Data Volume?},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {91--96},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011117},
doi = {10.1109/VTS.2002.1011117},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChandraCM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChenWS02,
author = {Hung{-}Kai Chen and
Chih{-}Hu Wang and
Chau{-}Chin Su},
title = {A Self Calibrated {ADC} {BIST} Methodology},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {117--122},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011121},
doi = {10.1109/VTS.2002.1011121},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChenWS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChengYWHW02,
author = {Kuo{-}Liang Cheng and
Jen{-}Chieh Yeh and
Chih{-}Wea Wang and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {{RAMSES-FT:} {A} Fault Simulator for Flash Memory Testing and Diagnostics},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {281--288},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011153},
doi = {10.1109/VTS.2002.1011153},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChengYWHW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChiaDKKK02,
author = {C.{-}H. Chia and
Sujit Dey and
Faraydon Karim and
Haluk Konuk and
Keesup Kim},
title = {Validation and Test of Network Processors and ASICs},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {407--410},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011172},
doi = {10.1109/VTS.2002.1011172},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChiaDKKK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/CourtoiF02,
author = {B. Courtoi and
Michael R. B. Forshaw},
title = {Beyond {CMOS}},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {315--316},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011159},
doi = {10.1109/VTS.2002.1011159},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/CourtoiF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DavidGLPV02,
author = {Ren{\'{e}} David and
Patrick Girard and
Christian Landrault and
Serge Pravossoudovitch and
Arnaud Virazel},
title = {On Using Efficient Test Sequences for {BIST}},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {145--152},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011126},
doi = {10.1109/VTS.2002.1011126},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DavidGLPV02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DwarakanatB02,
author = {Kumar N. Dwarakanath and
R. D. (Shawn) Blanton},
title = {Exploiting Dominance and Equivalence using Fault Tuples},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {269--274},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011151},
doi = {10.1109/VTS.2002.1011151},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DwarakanatB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/El-MalehA02,
author = {Aiman El{-}Maleh and
Ali Al{-}Suwaiyan},
title = {An Efficient Test Relaxation Technique for Combinational {\&}
Full-Scan Sequential Circuits},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {53--59},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011111},
doi = {10.1109/VTS.2002.1011111},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/El-MalehA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GoelM02,
author = {Sandeep Kumar Goel and
Erik Jan Marinissen},
title = {Cluster-Based Test Architecture Design for System-on-Chip},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {259--264},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011147},
doi = {10.1109/VTS.2002.1011147},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GoelM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GoesselSS02,
author = {Michael G{\"{o}}ssel and
Egor S. Sogomonyan and
Adit D. Singh},
title = {Scan-Path with Directly Duplicated and Inverted Duplicated Registers},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {47--52},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011110},
doi = {10.1109/VTS.2002.1011110},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GoesselSS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GonciariAN02,
author = {Paul Theo Gonciari and
Bashir M. Al{-}Hashimi and
Nicola Nicolici},
title = {Useless Memory Allocation in System-on-a-Chip Test: Problems and Solutions},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {423--432},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011175},
doi = {10.1109/VTS.2002.1011175},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GonciariAN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HalderCVR02,
author = {Achintya Halder and
Abhijit Chatterjee and
Pramodchandran N. Variyam and
John Ridley},
title = {Measuring Stray Capacitance on Tester Hardware},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {351--356},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011164},
doi = {10.1109/VTS.2002.1011164},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HalderCVR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HamdiouiAG02,
author = {Said Hamdioui and
Zaid Al{-}Ars and
Ad J. van de Goor},
title = {Testing Static and Dynamic Faults in Random Access Memories},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {395--400},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011170},
doi = {10.1109/VTS.2002.1011170},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HamdiouiAG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HosokawaDM02,
author = {Toshinori Hosokawa and
Hiroshi Date and
Michiaki Muraoka},
title = {A Test Generation Method Using a Compacted Test Table and a Test Generation
Method Using a Compacted Test Plan Table for {RTL} Data Path Circuits},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {328--335},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011161},
doi = {10.1109/VTS.2002.1011161},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HosokawaDM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Huang02,
author = {Shi{-}Yu Huang},
title = {Speeding Up The Byzantine Fault Diagnosis Using Symbolic Simulation},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {193--200},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011138},
doi = {10.1109/VTS.2002.1011138},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Huang02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/IyengarCM02,
author = {Vikram Iyengar and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {On Using Rectangle Packing for {SOC} Wrapper/TAM Co-Optimization},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {253--258},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011146},
doi = {10.1109/VTS.2002.1011146},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/IyengarCM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/IyerC02,
author = {Madhu K. Iyer and
Kwang{-}Ting Cheng},
title = {Software-Based Weighted Random Testing for {IP} Cores in Bus-Based
Programmable SoCs},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {139--144},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011125},
doi = {10.1109/VTS.2002.1011125},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/IyerC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JiangP02,
author = {Wanli Jiang and
Eric Peterson},
title = {Performance Comparison of VLV, ULV, and {ECR} Tests},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {31--36},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011107},
doi = {10.1109/VTS.2002.1011107},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/JiangP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KajiharaIM02,
author = {Seiji Kajihara and
Koji Ishida and
Kohei Miyase},
title = {Test Vector Modification for Power Reduction during Scan Testing},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {160--165},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011128},
doi = {10.1109/VTS.2002.1011128},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KajiharaIM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KasturiranganH02,
author = {Ganapathy Kasturirangan and
Michael S. Hsiao},
title = {Spectrum-Based {BIST} in Complex SOCs},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {111--116},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011120},
doi = {10.1109/VTS.2002.1011120},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KasturiranganH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KhocheVRM02,
author = {Ajay Khoche and
Erik H. Volkerink and
Jochen Rivoir and
Subhasish Mitra},
title = {Test Vector Compression Using {EDA-ATE} Synergies},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {97--102},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011118},
doi = {10.1109/VTS.2002.1011118},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KhocheVRM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KranitisPGZ02,
author = {Nektarios Kranitis and
Antonis M. Paschalis and
Dimitris Gizopoulos and
Yervant Zorian},
title = {Instruction-Based Self-Testing of Processor Cores},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {223--228},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011142},
doi = {10.1109/VTS.2002.1011142},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KranitisPGZ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KrishnamurthyBAA02,
author = {Narayanan Krishnamurthy and
Jayanta Bhadra and
Magdy S. Abadir and
Jacob A. Abraham},
title = {Is State Mapping Essential for Equivalence Checking Custom Memories
in Scan-Based Designs?},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {275--280},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011152},
doi = {10.1109/VTS.2002.1011152},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KrishnamurthyBAA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KunduB02,
author = {Rahul Kundu and
R. D. (Shawn) Blanton},
title = {Timed Test Generation Crosstalk Switch Failures in Domino {CMOS} Circuits},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {379--388},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011168},
doi = {10.1109/VTS.2002.1011168},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KunduB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LiM02,
author = {Chien{-}Mo James Li and
Edward J. McCluskey},
title = {Diagnosis of Sequence-Dependent Chips},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {187--192},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011137},
doi = {10.1109/VTS.2002.1011137},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LiM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LiTW02,
author = {Jin{-}Fu Li and
Ruey{-}Shing Tzeng and
Cheng{-}Wen Wu},
title = {Testing and Diagnosing Embedded Content Addressable Memories},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {389--394},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011169},
doi = {10.1109/VTS.2002.1011169},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/LiTW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MacDonaldT02,
author = {Eric W. MacDonald and
Nur A. Touba},
title = {Very Low Voltage Testing of {SOI} Integrated Circuits},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {25--30},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011106},
doi = {10.1109/VTS.2002.1011106},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MacDonaldT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MadgeRCD02,
author = {Robert Madge and
Manu Rehani and
Kevin Cota and
W. Robert Daasch},
title = {Statistical Post-Processing at Wafersort - An Alternative to Burn-in
and a Manufacturable Solution to Test Limit Setting for Sub-micron
Technologies},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {69--74},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011113},
doi = {10.1109/VTS.2002.1011113},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MadgeRCD02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/McCluskeMMMNR02,
author = {Edward J. McCluskey and
Subhasish Mitra and
Bob Madge and
Peter C. Maxwell and
Phil Nigh and
Mike Rodgers},
title = {Debating the Future of Burn-In},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {311--314},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.2002.10015},
doi = {10.1109/VTS.2002.10015},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/McCluskeMMMNR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MirBBKK02,
author = {Salvador Mir and
H. Bederr and
R. D. (Shawn) Blanton and
Hans G. Kerkhoff and
H. J. Klim},
title = {SoCs with MEMS? Can We Include {MEMS} in the SoCs Design and Test
Flow?},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {449--450},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011179},
doi = {10.1109/VTS.2002.1011179},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MirBBKK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MitraMM02,
author = {Subhasish Mitra and
Edward J. McCluskey and
Samy Makar},
title = {Design for Testability and Testing of {IEEE} 1149.1 Tap Controller},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {247--252},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011145},
doi = {10.1109/VTS.2002.1011145},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MitraMM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MuradaliRVDGKC02,
author = {Fidel Muradali and
Mike Ricchetti and
Bart Vermeulen and
Bulent I. Dervisoglu and
Bob Gottlieb and
Bernd Koenemann and
C. J. Clark},
title = {Reducing Time to Volume and Time to Market: Is Silicon Debug and Diagnosis
the Answer?},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {445--446},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011178},
doi = {10.1109/VTS.2002.1011178},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MuradaliRVDGKC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/NouraniC02,
author = {Mehrdad Nourani and
James Chin},
title = {Testing High-Speed SoCs Using Low-Speed ATEs},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {133--138},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011124},
doi = {10.1109/VTS.2002.1011124},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/NouraniC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/OhtakeFM02,
author = {Satoshi Ohtake and
Hideo Fujiwara and
Shunjiro Miwa},
title = {A Method of Test Generation for Path Delay Faults in Balanced Sequential
Circuits},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {321--327},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011160},
doi = {10.1109/VTS.2002.1011160},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/OhtakeFM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Okuda02,
author = {Yukio Okuda},
title = {Eigen-Signatures for Regularity-based {IDDQ} Testing},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {289--294},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011155},
doi = {10.1109/VTS.2002.1011155},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Okuda02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/OngC02,
author = {Chee{-}Kian Ong and
Kwang{-}Ting (Tim) Cheng},
title = {Self-Testing Second-Order Delta-Sigma Modulators Using Digital Stimulus},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {123--128},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011122},
doi = {10.1109/VTS.2002.1011122},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/OngC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/OsseiranWBTMPS02,
author = {Adam Osseiran and
William De Wilkins and
Barry Baril and
Sassan Tabatabaei and
Fidel Muradali and
Ken Posse and
Lee Song},
title = {Analog and Mixed Signal {BIST:} Too Much, Too Little, Too Late?},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {175--176},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011134},
doi = {10.1109/VTS.2002.1011134},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/OsseiranWBTMPS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/OzevO02,
author = {Sule Ozev and
Alex Orailoglu},
title = {Boosting the Accuracy of Analog Test Coverage Computation through
Statistical Tolerance Analysis},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {213--222},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011141},
doi = {10.1109/VTS.2002.1011141},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/OzevO02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PandeyP02,
author = {Amit R. Pandey and
Janak H. Patel},
title = {Reconfiguration Technique for Reducing Test Time and Test Data Volume
in Illinois Scan Architecture Based Designs},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {9--15},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011104},
doi = {10.1109/VTS.2002.1011104},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PandeyP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ReddyMKP02,
author = {Sudhakar M. Reddy and
Kohei Miyase and
Seiji Kajihara and
Irith Pomeranz},
title = {On Test Data Volume Reduction for Multiple Scan Chain Designs},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {103--110},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011119},
doi = {10.1109/VTS.2002.1011119},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ReddyMKP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Roberts02,
author = {G. Roberts},
title = {Challenges of Mixed-Signal Board Design and Test},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {317--320},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.2002.10012},
doi = {10.1109/VTS.2002.10012},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Roberts02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SabadeW02,
author = {Sagar S. Sabade and
D. M. H. Walker},
title = {Evaluation of Effectiveness of Median of Absolute Deviations Outlier
Rejection-based {IDDQ} Testing for Burn-in Reduction},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {81--86},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011115},
doi = {10.1109/VTS.2002.1011115},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SabadeW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SankaralingamT02,
author = {Ranganathan Sankaralingam and
Nur A. Touba},
title = {Controlling Peak Power During Scan Testing},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {153--159},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011127},
doi = {10.1109/VTS.2002.1011127},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SankaralingamT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SchuttertJK02,
author = {Rodger Schuttert and
Frans G. M. de Jong and
Ben Kup},
title = {Improved Test Monitor Circuit in Power Pin DfT},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {345--350},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011163},
doi = {10.1109/VTS.2002.1011163},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SchuttertJK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SegalSAEGMSV02,
author = {Julie Segal and
Rene Segers and
Rob Aitken and
S. Eichenberge and
A. Gattike and
M. Millegen and
R. Seger and
S. Venkataraman},
title = {Test as a Key Enabler for Faster Yield Ramp-Up},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {177--180},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011135},
doi = {10.1109/VTS.2002.1011135},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SegalSAEGMSV02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SeguraDK02,
author = {Jaume Segura and
Vivek De and
Ali Keshavarzi},
title = {Challenges in Nanometric Technology Scaling: Trends and Projections},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {447--448},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.2002.10014},
doi = {10.1109/VTS.2002.10014},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SeguraDK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SekarD02,
author = {Krishna Sekar and
Sujit Dey},
title = {{LI-BIST:} {A} Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {417--422},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011174},
doi = {10.1109/VTS.2002.1011174},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SekarD02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SinanogluBO02,
author = {Ozgur Sinanoglu and
Ismet Bayraktaroglu and
Alex Orailoglu},
title = {Test Power Reduction through Minimization of Scan Chain Transitions},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {166--172},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011129},
doi = {10.1109/VTS.2002.1011129},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SinanogluBO02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SinghPG02,
author = {Abhishek Singh and
Jim Plusquellic and
Anne E. Gattiker},
title = {Power Supply Transient Signal Analysis Under Real Process and Test
Hardware Models},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {357--366},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011165},
doi = {10.1109/VTS.2002.1011165},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SinghPG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SongGLW02,
author = {Lee Song and
Rudy Garcia and
Andrew Levy and
Donald L. Wheater},
title = {A Successful {DFT} Tester: What Will It Look Like? Is Revolution in
Test Approaches Required?},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {87--90},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011116},
doi = {10.1109/VTS.2002.1011116},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SongGLW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/TendolkarRWLSA02,
author = {Nandu Tendolkar and
Rajesh Raina and
Rick Woltenberg and
Xijiang Lin and
Bruce Swanson and
Greg Aldrich},
title = {Novel Techniques for Achieving High At-Speed Transition Fault Test
Coverage for Motorola's Microprocessors Based on PowerPC(tm) Instruction
Set Architecture},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {3--8},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011103},
doi = {10.1109/VTS.2002.1011103},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/TendolkarRWLSA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Thibeault02,
author = {Claude Thibeault},
title = {Speeding-Up {IDDQ} Measurements},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {295--301},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011157},
doi = {10.1109/VTS.2002.1011157},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Thibeault02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/TsengLM02,
author = {Chao{-}Wen Tseng and
James Li and
Edward J. McCluskey},
title = {Experimental Results for Slow-Speed Testing},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {37--42},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011108},
doi = {10.1109/VTS.2002.1011108},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/TsengLM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/VazquezHLRH02,
author = {Diego V{\'{a}}zquez and
Gloria Huertas and
Gildas L{\'{e}}ger and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {Practical Solutions for the Application of the Oscillation-Based-Test:
Start-Up and On-Chip Evaluation},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {433--438},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011176},
doi = {10.1109/VTS.2002.1011176},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/VazquezHLRH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/VedulaAB02,
author = {Vivekananda M. Vedula and
Jacob A. Abraham and
Jayanta Bhadra},
title = {Program Slicing for Hierarchical Test Generation},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {237--246},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011144},
doi = {10.1109/VTS.2002.1011144},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/VedulaAB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/VolkerinkKRH02,
author = {Erik H. Volkerink and
Ajay Khoche and
Jochen Rivoir and
Klaus{-}Dieter Hilliges},
title = {Test Economics for Multi-site Test with Modern Cost Reduction Techniques},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {411--416},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011173},
doi = {10.1109/VTS.2002.1011173},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/VolkerinkKRH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YamaguchiISMM02,
author = {Takahiro J. Yamaguchi and
Masahiro Ishida and
Mani Soma and
Louis Malarsie and
Hirobumi Musha},
title = {Timing Jitter Measurement of 10 Gbps Bit Clock Signals Using Frequency
Division},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {207--212},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011140},
doi = {10.1109/VTS.2002.1011140},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/YamaguchiISMM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vts/2002,
title = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://ieeexplore.ieee.org/xpl/conhome/7901/proceeding},
isbn = {0-7695-1570-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/2002.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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