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@inproceedings{DBLP:conf/vts/AbadirAHHNW97,
author = {Magdy S. Abadir and
Jacob A. Abraham and
Hong Hao and
C. Hunter and
Wayne M. Needham and
Ron G. Walther},
title = {Microprocessor Test and Validation: Any New Avenues?},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {458--464},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1997.10015},
doi = {10.1109/VTS.1997.10015},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AbadirAHHNW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AbderrahmanCK97,
author = {Abdessatar Abderrahman and
Eduard Cerny and
Bozena Kaminska},
title = {CLP-based Multifrequency Test Generation for Analog Circuits},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {158--165},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600241},
doi = {10.1109/VTEST.1997.600241},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AbderrahmanCK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AbrahamFLMPRT97,
author = {J. Abraham and
Phyllis G. Frankl and
Christian Landrault and
Meryem Marzouki and
Paolo Prinetto and
Chantal Robach and
Pascale Th{\'{e}}venod{-}Fosse},
title = {Hardware Test: Can We Learn from Software Testing?},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {320--321},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1997.10009},
doi = {10.1109/VTS.1997.10009},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AbrahamFLMPRT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AgrawalABFKWZ97,
author = {Vishwani D. Agrawal and
Robert C. Aitken and
J. Braden and
Joan Figueras and
S. Kumar and
Hans{-}Joachim Wunderlich and
Yervant Zorian},
title = {Power Dissipation During Testing: Should We Worry About it?},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {456--457},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1997.10012},
doi = {10.1109/VTS.1997.10012},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AgrawalABFKWZ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AitkenBGMN97,
author = {Phil Nigh and
Wayne M. Needham and
Kenneth M. Butler and
Peter C. Maxwell and
Robert C. Aitken},
title = {An experimental study comparing the relative effectiveness of functional,
scan, IDDq and delay-fault testing},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {459},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600334},
doi = {10.1109/VTEST.1997.600334},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AitkenBGMN97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AltetR97,
author = {Josep Altet and
Antonio Rubio},
title = {Differential Sensing Strategy for Dynamic Thermal Testing of ICs},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {434--439},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600328},
doi = {10.1109/VTEST.1997.600328},
timestamp = {Tue, 11 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/AltetR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ArabiK97,
author = {Karim Arabi and
Bozena Kaminska},
title = {Parametric and Catastrophic Fault Coverage of Analog Circuits in Oscillation-Test
Methodology},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {166--171},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600246},
doi = {10.1109/VTEST.1997.600246},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ArabiK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Bartlett97,
author = {W. D. Bartlett},
title = {Determination of coherence errors in {ADC} spectral domain testing},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {308},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600294},
doi = {10.1109/VTEST.1997.600294},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Bartlett97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BorelCMRZ97,
author = {J. Borel and
M. Cecchini and
C. Malipeddi and
Janusz Rajski and
Yervant Zorian},
title = {Systems On Silicon: Design and Test Challenges},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {184--185},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1997.10017},
doi = {10.1109/VTS.1997.10017},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BorelCMRZ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BreuerKMRW97,
author = {Melvin A. Breuer and
Bozena Kaminska and
John E. McDermid and
V. Rayapathi and
Donald L. Wheater},
title = {Will 0.1um Digital Circuits Require Mixed-Signal Testing},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {186--187},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1997.10011},
doi = {10.1109/VTS.1997.10011},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BreuerKMRW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BuonannoPS97,
author = {Giacomo Buonanno and
M. Pugassi and
Mariagiovanna Sami},
title = {A high-level synthesis approach to design of fault-tolerant systems},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {356--363},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600305},
doi = {10.1109/VTEST.1997.600305},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BuonannoPS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChangGB97,
author = {Yi{-}Shing Chang and
Sandeep K. Gupta and
Melvin A. Breuer},
title = {Analysis of Ground Bounce in Deep Sub-Micron Circuits},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {110--116},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599458},
doi = {10.1109/VTEST.1997.599458},
timestamp = {Thu, 21 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChangGB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChangLC97,
author = {Soon{-}Jyh Chang and
Chung{-}Len Lee and
Jwu E. Chen},
title = {Functional test pattern generation for {CMOS} operational amplifier},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {267--273},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600287},
doi = {10.1109/VTEST.1997.600287},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChangLC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChangM97,
author = {Jonathan T.{-}Y. Chang and
Edward J. McCluskey},
title = {SHOrt voltage elevation {(SHOVE)} test for weak {CMOS} ICs},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {446},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600331},
doi = {10.1109/VTEST.1997.600331},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChangM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChenGB97,
author = {Liang{-}Chi Chen and
Sandeep K. Gupta and
Melvin A. Breuer},
title = {High Quality Robust Tests for Path Delay Faults},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {88--93},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599447},
doi = {10.1109/VTEST.1997.599447},
timestamp = {Thu, 21 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChenGB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChenML97,
author = {Xiao{-}Tao Chen and
Fred J. Meyer and
Fabrizio Lombardi},
title = {On the Fault Coverage of Interconnect Diagnosis},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {101--109},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599450},
doi = {10.1109/VTEST.1997.599450},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChenML97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/CheungKNWW97,
author = {D. Cheung and
Bernd Koenemann and
S. Nishtala and
B. West and
D. Wu},
title = {{ATE} for {VLSI:} What Challenges Lie Ahead?},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {318--319},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1997.10008},
doi = {10.1109/VTS.1997.10008},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/CheungKNWW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChiangG97,
author = {Chen{-}Huan Chiang and
Sandeep K. Gupta},
title = {{BIST} TPGs for Faults in Board Level Interconnect via Boundary Scan},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {376--383},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600311},
doi = {10.1109/VTEST.1997.600311},
timestamp = {Fri, 22 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChiangG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChiusanoCPR97,
author = {Silvia Chiusano and
Fulvio Corno and
Paolo Prinetto and
Matteo Sonza Reorda},
title = {Cellular automata for deterministic sequential test pattern generation},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {60--67},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599442},
doi = {10.1109/VTEST.1997.599442},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChiusanoCPR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Dahlgren97,
author = {Peter Dahlgren},
title = {Switch-level modeling of feedback faults using global oscillation
control},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {117--122},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599460},
doi = {10.1109/VTEST.1997.599460},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Dahlgren97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/De97,
author = {Kaushik De},
title = {Test methodology for embedded cores which protects intellectual property},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {2--9},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599434},
doi = {10.1109/VTEST.1997.599434},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/De97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DufazaI97,
author = {Christian Dufaza and
Hassan Ihs},
title = {Test Synthesis for {DC} Test and Maximal Diagnosis of Switched-Capacitor
Circuits},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {252--260},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600284},
doi = {10.1109/VTEST.1997.600284},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DufazaI97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/FarinettiM97,
author = {Laura Farinetti and
Pier Luca Montessoro},
title = {The Dynamic Rollback Problem in Concurrent Event-Driven Fault Simulation},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {282--287},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600289},
doi = {10.1109/VTEST.1997.600289},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/FarinettiM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/FleischerB97,
author = {C. A. Fleischer and
Lee A. Belfore II},
title = {A new approach for testing artificial neural networks},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {245--251},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600282},
doi = {10.1109/VTEST.1997.600282},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/FleischerB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/FummiS97,
author = {Franco Fummi and
Donatella Sciuto},
title = {Implicit test pattern generation constrained to cellular automata
embedding},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {54--59},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599441},
doi = {10.1109/VTEST.1997.599441},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/FummiS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GirardLMP97,
author = {Patrick Girard and
Christian Landrault and
V. Moreda and
Serge Pravossoudovitch},
title = {An optimized {BIST} test pattern generator for delay testing},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {94--100},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599448},
doi = {10.1109/VTEST.1997.599448},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GirardLMP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GizopoulosPP97,
author = {Dimitris Gizopoulos and
Mihalis Psarakis and
Antonis M. Paschalis},
title = {Robust Sequential Fault Testing of Iterative Logic Arrays},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {238--244},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600280},
doi = {10.1109/VTEST.1997.600280},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GizopoulosPP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GodambeS97,
author = {Nihal J. Godambe and
C.{-}J. Richard Shi},
title = {Behavioral level noise modeling and jitter simulation of phase-locked
loops with faults using {VHDL-AMS}},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {177--183},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600251},
doi = {10.1109/VTEST.1997.600251},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GodambeS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GongC97,
author = {Yiming Gong and
Sreejit Chakravarty},
title = {Using fault sampling to compute I\({}_{\mbox{DDQ}}\) diagnostic test
set},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {74--79},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599444},
doi = {10.1109/VTEST.1997.599444},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GongC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GoorT97,
author = {Ad J. van de Goor and
Issam B. S. Tlili},
title = {Disturb Neighborhood Pattern Sensitive Fault},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {37--47},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599439},
doi = {10.1109/VTEST.1997.599439},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GoorT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GotoNI97,
author = {Hiroyuki Goto and
Shigeo Nakamura and
Kazuhiko Iwasaki},
title = {Experimental fault analysis of 1 Mb {SRAM} chips},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {31--36},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599438},
doi = {10.1109/VTEST.1997.599438},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GotoNI97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HartantoBPF97,
author = {Ismed Hartanto and
Vamsi Boppana and
Janak H. Patel and
W. Kent Fuchs},
title = {Diagnostic Test Pattern Generation for Sequential Circuits},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {196--202},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600264},
doi = {10.1109/VTEST.1997.600264},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HartantoBPF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HatayamaHMY97,
author = {Kazumi Hatayama and
Kazunori Hikone and
Takeshi Miyazaki and
Hiromichi Yamada},
title = {A practical approach to instruction-based test generation for functional
modules of {VLSI} processors},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {17--23},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599436},
doi = {10.1109/VTEST.1997.599436},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HatayamaHMY97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Haulin97,
author = {T. Haulin},
title = {Built-in parametric test for controlled impedance I/Os},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {123--129},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599461},
doi = {10.1109/VTEST.1997.599461},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Haulin97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HlawiczkaGS97,
author = {Andrzej Hlawiczka and
Michael G{\"{o}}ssel and
Egor S. Sogomonyan},
title = {A linear code-preserving signature analyzer {COPMISR}},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {350--355},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600303},
doi = {10.1109/VTEST.1997.600303},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HlawiczkaGS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HsiaoRP97,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Fast Algorithms for Static Compaction of Sequential Circuit Test Vectors},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {188--195},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600260},
doi = {10.1109/VTEST.1997.600260},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HsiaoRP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HuangCC97,
author = {Shi{-}Yu Huang and
Kuang{-}Chien Chen and
Kwang{-}Ting Cheng},
title = {Incremental logic rectification},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {143--149},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599466},
doi = {10.1109/VTEST.1997.599466},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HuangCC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JaworskiNK97,
author = {Zbigniew Jaworski and
Mariusz Niewczas and
Wieslaw Kuzmicz},
title = {Extension of Inductive Fault Analysis to Parametric Faults in Analog
Circuits with Application to Test Generation},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {172--176},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600249},
doi = {10.1109/VTEST.1997.600249},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/JaworskiNK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JayabharathiLA97,
author = {Rathish Jayabharathi and
Kyung Tek Lee and
Jacob A. Abraham},
title = {A Novel Solution for Chip-Level Functional Timing Verification},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {137--142},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599465},
doi = {10.1109/VTEST.1997.599465},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/JayabharathiLA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JeeF97,
author = {Alvin Jee and
F. Joel Ferguson},
title = {A methodolgy for characterizing cell testability},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {384--390},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600313},
doi = {10.1109/VTEST.1997.600313},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/JeeF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KallaC97,
author = {Priyank Kalla and
Maciej J. Ciesielski},
title = {Testability of Sequential Circuits with Multi-Cycle False Path},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {322--328},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600295},
doi = {10.1109/VTEST.1997.600295},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KallaC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KavousianosN97,
author = {Xrysovalantis Kavousianos and
Dimitris Nikolos},
title = {Self-exercising self testing k-order comparators},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {216--221},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600275},
doi = {10.1109/VTEST.1997.600275},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KavousianosN97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KeimMBDM97,
author = {Martin Keim and
Michael Martin and
Bernd Becker and
Rolf Drechsler and
Paul Molitor},
title = {Polynomial Formal Verification of Multipliers},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {150--157},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599468},
doi = {10.1109/VTEST.1997.599468},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KeimMBDM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KhocheB97,
author = {Ajay Khoche and
Erik Brunvand},
title = {Critical hazard free test generation for asynchronous circuits},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {203--209},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600270},
doi = {10.1109/VTEST.1997.600270},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KhocheB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KimC97,
author = {V. Kim and
T. Chen},
title = {Assessing {SRAM} test coverage for sub-micron {CMOS} technologies},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {24--30},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599437},
doi = {10.1109/VTEST.1997.599437},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KimC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KrishnaswamyRPB97,
author = {Dilip Krishnaswamy and
Elizabeth M. Rudnick and
Janak H. Patel and
Prithviraj Banerjee},
title = {{SPITFIRE:} scalable parallel algorithms for test set partitioned
fault simulation},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {274--281},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600663},
doi = {10.1109/VTEST.1997.600663},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KrishnaswamyRPB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MakaM97,
author = {Samy Makar and
Edward J. McCluskey},
title = {{ATPG} for scan chain latches and flip-flops},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {364--369},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600306},
doi = {10.1109/VTEST.1997.600306},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MakaM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MetraFR97,
author = {Cecilia Metra and
Michele Favalli and
Bruno Ricc{\`{o}}},
title = {Highly testable and compact single output comparator},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {210--215},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600272},
doi = {10.1109/VTEST.1997.600272},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MetraFR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/NorwoodM97,
author = {Robert B. Norwood and
Edward J. McCluskey},
title = {High-Level Synthesis for Orthogonal Sca},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {370--375},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600308},
doi = {10.1109/VTEST.1997.600308},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/NorwoodM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/OekmenKKB97,
author = {Can {\"{O}}kmen and
Martin Keim and
Rolf Krieger and
Bernd Becker},
title = {On Optimizing BIST-Architecture by Using OBDD-based Approaches and
Genetic Algorithms},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {426--433},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600327},
doi = {10.1109/VTEST.1997.600327},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/OekmenKKB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PeraliasRH97,
author = {Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {A {DFT} Technique for Analog-to-Digital Converters with digital correction},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {302--307},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600293},
doi = {10.1109/VTEST.1997.600293},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PeraliasRH97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PomeranzR97,
author = {Irith Pomeranz and
Sudhakar M. Reddy},
title = {{EXTEST:} a method to extend test sequences of synchronous sequential
circuits to increase the fault coverage},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {329--335},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600297},
doi = {10.1109/VTEST.1997.600297},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PomeranzR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PomeranzR97a,
author = {Irith Pomeranz and
Sudhakar M. Reddy},
title = {On n-detection test sequences for synchronous sequential circuits343},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {336--343},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600299},
doi = {10.1109/VTEST.1997.600299},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PomeranzR97a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PrepinD97,
author = {V. Prepin and
R. David},
title = {Fault coverage of a long random test sequence estimated from a short
simulation},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {391--398},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600315},
doi = {10.1109/VTEST.1997.600315},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PrepinD97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/RenovellFZ97,
author = {Michel Renovell and
Joan Figueras and
Yervant Zorian},
title = {Test of RAM-based {FPGA:} methodology and application to the interconnect},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {230--237},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600278},
doi = {10.1109/VTEST.1997.600278},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/RenovellFZ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Rodriguez-MontanesF97,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {Bridges in sequential {CMOS} circuits: current-voltage signatur},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {68--73},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599443},
doi = {10.1109/VTEST.1997.599443},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Rodriguez-MontanesF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Savir97,
author = {Jacob Savir},
title = {Random pattern testability of memory control logic},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {399--409},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600317},
doi = {10.1109/VTEST.1997.600317},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Savir97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Savir97a,
author = {Jacob Savir},
title = {Salvaging test windows in {BIST} diagnostic},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {416--425},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600321},
doi = {10.1109/VTEST.1997.600321},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Savir97a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/StroeleM97,
author = {Albrecht P. Stroele and
Frank Mayer},
title = {Methods to reduce test application time for accumulator-based self-test},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {48--53},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599440},
doi = {10.1109/VTEST.1997.599440},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/StroeleM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SzekelyRC97,
author = {Vladim{\'{\i}}r Sz{\'{e}}kely and
M{\'{a}}rta Rencz and
Bernard Courtois},
title = {Integrating on-chip temperature sensors into DfT schemes and {BIST}
architectures},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {440--445},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600330},
doi = {10.1109/VTEST.1997.600330},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SzekelyRC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Thibeault97,
author = {Claude Thibeault},
title = {A novel probabilistic approach for {IC} diagnosis based on differential
quiescent current signatures},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {80--87},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599445},
doi = {10.1109/VTEST.1997.599445},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Thibeault97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Touba97,
author = {Nur A. Touba},
title = {Obtaining High Fault Coverage with Circular {BIST} Via State Skipping},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {410--415},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600320},
doi = {10.1109/VTEST.1997.600320},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Touba97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ToubaP97,
author = {Nur A. Touba and
Bahram Pouya},
title = {Testing Embedded Cores Using Partial Isolation Rings},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {10--16},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599435},
doi = {10.1109/VTEST.1997.599435},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ToubaP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Vardanian97,
author = {Valery A. Vardanian},
title = {Exact probabilistic analysis of error detection for parity checkers},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {222--229},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600276},
doi = {10.1109/VTEST.1997.600276},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Vardanian97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/VariyamCN97,
author = {Pramodchandran N. Variyam and
Abhijit Chatterjee and
Naveena Nagi},
title = {Low-cost and efficient digital-compatible {BIST} for analog circuits
using pulse response sampling},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {261--266},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600285},
doi = {10.1109/VTEST.1997.600285},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/VariyamCN97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/VerhaegenPG97,
author = {Wim Verhaegen and
Geert Van der Plas and
Georges G. E. Gielen},
title = {Automated test pattern generation for analog integrated circuits},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {296--301},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600291},
doi = {10.1109/VTEST.1997.600291},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/VerhaegenPG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WohlW97,
author = {Peter Wohl and
John A. Waicukauski},
title = {Using {ATPG} for clock rules checking in complex scan design},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {130--136},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599463},
doi = {10.1109/VTEST.1997.599463},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/WohlW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YeandelTJ97,
author = {J. Yeandel and
D. Thulborn and
Simon Jones},
title = {An on-line testable {UART} implemented using {IFIS}},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {344--349},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600301},
doi = {10.1109/VTEST.1997.600301},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/YeandelTJ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ZhaoRP97,
author = {Jian{-}Kun Zhao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Static logic implication with application to redundancy identification},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {288--295},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600290},
doi = {10.1109/VTEST.1997.600290},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ZhaoRP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vts/1997,
title = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://ieeexplore.ieee.org/xpl/conhome/4653/proceeding},
isbn = {0-8186-7810-0},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/1997.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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