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@inproceedings{DBLP:conf/vlsid/0001JVS20,
author = {Binod Kumar and
Akshay Kumar Jaiswal and
V. S. Vineesh and
Rushikesh Shinde},
title = {Analyzing Hardware Security Properties of Processors through Model
Checking},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {107--112},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00036},
doi = {10.1109/VLSID49098.2020.00036},
timestamp = {Mon, 14 Nov 2022 15:28:08 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/0001JVS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/0001TBFS20,
author = {Binod Kumar and
Swapniel Thakur and
Kanad Basu and
Masahiro Fujita and
Virendra Singh},
title = {A Low Overhead Methodology for Validating Memory Consistency Models
in Chip Multiprocessors},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {101--106},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00035},
doi = {10.1109/VLSID49098.2020.00035},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/0001TBFS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Agrawal20,
author = {Vishwani D. Agrawal},
title = {Message from the Steering Committee Chair},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {i},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00008},
doi = {10.1109/VLSID49098.2020.00008},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Agrawal20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AminifarB20,
author = {Amir Aminifar and
Shabbir Batterywala},
title = {Message from the Tutorial Co-Chairs},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {i},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00007},
doi = {10.1109/VLSID49098.2020.00007},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AminifarB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AnikGDK20,
author = {Md Toufiq Hasan Anik and
Sylvain Guilley and
Jean{-}Luc Danger and
Naghmeh Karimi},
title = {On the Effect of Aging on Digital Sensors},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {189--194},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00050},
doi = {10.1109/VLSID49098.2020.00050},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AnikGDK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AryaSP020,
author = {Neelam Arya and
Teena Soni and
Manisha Pattanaik and
G. K. Sharma},
title = {Area and Energy Efficient Approximate Square Rooters for Error Resilient
Applications},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {90--95},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00033},
doi = {10.1109/VLSID49098.2020.00033},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AryaSP020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AtienzaMS20,
author = {David Atienza and
Subhasish Mitra and
Manan Suri},
title = {Message from the Technical Program Co-Chairs},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {i},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00006},
doi = {10.1109/VLSID49098.2020.00006},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AtienzaMS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhattaruK20,
author = {Purnendu Bhattaru and
Nagendra Krishnapura},
title = {A 36dB Gain Range, 0.5dB Gain Step Variable Gain Amplifier with 10
to 25MHz Bandwidth Third-Order Filter for Portable Ultrasound Systems},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {96--100},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00034},
doi = {10.1109/VLSID49098.2020.00034},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhattaruK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChauhanSMD20,
author = {Arjun Singh Chauhan and
Vineet Sahula and
A. S. Mandal and
Abhigyan Dutta},
title = {Intensifying Challenge Obfuscation by Cascading {FPGA} RO-PUFs for
Random Number Generation},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {195--200},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00051},
doi = {10.1109/VLSID49098.2020.00051},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChauhanSMD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DattaCP20,
author = {Piyali Datta and
Arpan Chakraborty and
Rajat Kumar Pal},
title = {A Design Optimization for Pin-Constrained Paper-based Digital Microfluidic
Biochips Integrating Fluid-Control Co-Design Issues},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {213--218},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00054},
doi = {10.1109/VLSID49098.2020.00054},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DattaCP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DevnathSM20,
author = {Joydeep Kumar Devnath and
Neelam Surana and
Joycee Mekie},
title = {A Mathematical Approach Towards Quantization of Floating Point Weights
in Low Power Neural Networks},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {177--182},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00048},
doi = {10.1109/VLSID49098.2020.00048},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DevnathSM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DharYZWKC20,
author = {Ashutosh Dhar and
Mang Yu and
Wei Zuo and
Xiaohao Wang and
Nam Sung Kim and
Deming Chen},
title = {Leveraging Dynamic Partial Reconfiguration with Scalable {ILP} Based
Task Scheduling},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {201--206},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00052},
doi = {10.1109/VLSID49098.2020.00052},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DharYZWKC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DuttaTBC20,
author = {Srijit Dutta and
Yaswanth Tavva and
Debjyoti Bhattacharjee and
Anupam Chattopadhyay},
title = {Efficient Quantum Circuits for Square-Root and Inverse Square-Root},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {55--60},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00027},
doi = {10.1109/VLSID49098.2020.00027},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/DuttaTBC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GesslerBS20,
author = {Fr{\'{e}}d{\'{e}}ric Gessler and
Philip Brisk and
Mirjana Stojilovic},
title = {A Shared-Memory Parallel Implementation of the RePlAce Global Cell
Placer},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {78--83},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00031},
doi = {10.1109/VLSID49098.2020.00031},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GesslerBS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GoswamiS20,
author = {Sumit Goswami and
Veeresh Shetty},
title = {Message from the General Co-Chairs},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {i},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00005},
doi = {10.1109/VLSID49098.2020.00005},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GoswamiS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuhaSC20,
author = {Krishnendu Guha and
Debasri Saha and
Amlan Chakrabarti},
title = {A Multi-Agent Co-operative Model to Facilitate Criticality based Reliability
for Mixed Critical Task Execution on {FPGA} based Cloud Environment},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {143--148},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00042},
doi = {10.1109/VLSID49098.2020.00042},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuhaSC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HosnyK20,
author = {Abdelrahman Hosny and
Andrew B. Kahng},
title = {Tutorial: Open-Source {EDA} and Machine Learning for {IC} Design:
{A} Live Update},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {1--14},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00016},
doi = {10.1109/VLSID49098.2020.00016},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HosnyK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JhaSNM20,
author = {Nandan Kumar Jha and
Rajat Saini and
Subhrajit Nag and
Sparsh Mittal},
title = {{E2GC:} Energy-efficient Group Convolution in Deep Neural Networks},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {155--160},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00044},
doi = {10.1109/VLSID49098.2020.00044},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JhaSNM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KadlimattiTB20,
author = {Venkatesh Kadlimatti and
Prudhvi Raj Thota and
Sumit Bhat},
title = {A Novel Methodology of {PWM/PFM} Mode Transition for Inverting Buck-Boost
and Boost Converter for {AMOLED} Display Applications},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {165--170},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00046},
doi = {10.1109/VLSID49098.2020.00046},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KadlimattiTB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KasarabadaV20,
author = {Yasaswy Kasarabada and
Ranga Vemuri},
title = {StateLock: State Transition Based Logic Locking for Sequential Circuits},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {171--176},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00047},
doi = {10.1109/VLSID49098.2020.00047},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KasarabadaV20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KelamBA20,
author = {Mounika Kelam and
Balaji Yadav Battu and
Zia Abbas},
title = {3.75ppm/\({}^{\mbox{{\textdegree}}}\)C, -91dB PSRR, 27nW, 0.9V {PVT}
Invariant Voltage Reference for Implantable Biomedical Applications},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {31--36},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00023},
doi = {10.1109/VLSID49098.2020.00023},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KelamBA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Kulkarni20,
author = {Prasad Kulkarni},
title = {Alternative Reduced Hardware {MASHI-I-I} Digital Delta Sigma Architecture},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {61--66},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00028},
doi = {10.1109/VLSID49098.2020.00028},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Kulkarni20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LaguduvaMAKK20,
author = {Vishalini R. Laguduva and
Shakil Mahmud and
Sathyanarayanan N. Aakur and
Robert Karam and
Srinivas Katkoori},
title = {Dissecting Convolutional Neural Networks for Efficient Implementation
on Constrained Platforms},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {149--154},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00043},
doi = {10.1109/VLSID49098.2020.00043},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LaguduvaMAKK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Lee20,
author = {Suk Lee},
title = {Keynote: Technology directions for a bright semiconductor future},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {1--8},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00015},
doi = {10.1109/VLSID49098.2020.00015},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Lee20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LohSR20,
author = {Felix Loh and
Kewal K. Saluja and
Parameswaran Ramanathan},
title = {Fault Tolerance through Invariant Checking for the Lanczos Eigensolver},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {13--18},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00020},
doi = {10.1109/VLSID49098.2020.00020},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LohSR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MahajanONDSP20,
author = {Yogesh Mahajan and
Shashank Obla and
Mini K. Namboothiripad and
Mandar J. Datar and
Niraj N. Sharma and
Sachin B. Patkar},
title = {FPGA-Based Acceleration of {LU} decomposition for Analog and {RF}
Circuit Simulation},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {131--136},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00040},
doi = {10.1109/VLSID49098.2020.00040},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MahajanONDSP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MaityGDB20,
author = {Srijeeta Maity and
Anirban Ghose and
Soumyajit Dey and
Swarnendu Biswas},
title = {Thermal Load-aware Adaptive Scheduling for Heterogeneous Platforms},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {125--130},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00039},
doi = {10.1109/VLSID49098.2020.00039},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MaityGDB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MettlerMS20,
author = {Marcel Mettler and
Daniel Mueller{-}Gritschneder and
Ulf Schlichtmann},
title = {Runtime Monitoring of Inter- and Intra-Thread Requirements on Embedded
MPSoCs},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {49--54},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00026},
doi = {10.1109/VLSID49098.2020.00026},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/MettlerMS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MohapatraM20,
author = {Satyajit Mohapatra and
Nihar Ranjan Mohapatra},
title = {The Design of Ultra Low Power {SAR} {ADC} for Implantable Cardioverter
Defibrillator {(ICD)}},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {72--77},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00030},
doi = {10.1109/VLSID49098.2020.00030},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MohapatraM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Panda020,
author = {Priyadarshini Panda and
Kaushik Roy},
title = {Invited Talk: Re-Engineering Computing with Neuro-Inspired Learning:
Devices, Circuits, and Systems},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {1--18},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00017},
doi = {10.1109/VLSID49098.2020.00017},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Panda020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PatilBS20,
author = {Amit Patil and
Sumit Bhat and
Abirmoya Santra},
title = {An Accurate, Power and Area Efficient 13.33x Charge Pump with Wide-Range
Programmability for Biomedical Sensors},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {219--224},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00055},
doi = {10.1109/VLSID49098.2020.00055},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PatilBS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PatilGP20,
author = {Vinay Patil and
Anuj Grover and
Anuj Parashar},
title = {Design of Sense Amplifier for Wide Voltage Range Operation of Split
Supply Memories in 22nm {HKMG} {CMOS} Technology},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {37--42},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00024},
doi = {10.1109/VLSID49098.2020.00024},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PatilGP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PoolakkalN20,
author = {Sreeni Poolakkal and
Nagarjuna Nallam},
title = {Enhancing the Phase-Noise-Figure-of-Merit of a Resonator using Frequency
Transformations},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {67--71},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00029},
doi = {10.1109/VLSID49098.2020.00029},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PoolakkalN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PunniyamurthyDG20,
author = {Kishore Punniyamurthy and
Shomit Das and
Andreas Gerstlauer},
title = {Cacheline Utilization-Aware Link Traffic Compression for Modular GPUs},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {137--142},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00041},
doi = {10.1109/VLSID49098.2020.00041},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PunniyamurthyDG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RaveendranJJDS20,
author = {Aneesh Raveendran and
Sandra Jean and
J. Mervin and
Vivian Desalphine and
David Selvakumar},
title = {A Novel Parametrized Fused Division and Square-Root {POSIT} Arithmetic
Architecture},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {207--212},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00053},
doi = {10.1109/VLSID49098.2020.00053},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RaveendranJJDS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Saadat0JP20,
author = {Hassaan Saadat and
Tuo Li and
Haris Javaid and
Sri Parameswaran},
title = {A Sub-Range Error Characterization based Selection Methodology for
Approximate Arithmetic Units},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {84--89},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00032},
doi = {10.1109/VLSID49098.2020.00032},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Saadat0JP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SanyalHDMSB20,
author = {Sayandeep Sanyal and
Aritra Hazra and
Pallab Dasgupta and
Scott Morrison and
Sudhakar Surendran and
Lakshmanan Balasubramanian},
title = {CoveRT: {A} Coverage Reporting Tool for Analog Mixed-Signal Designs},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {119--124},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00038},
doi = {10.1109/VLSID49098.2020.00038},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SanyalHDMSB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SarmaB20,
author = {Jitumani Sarma and
Rakesh Biswas},
title = {{VLSI} based Adaptive Power Management Architecture for {ECG} Monitoring
in {WBAN}},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {113--118},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00037},
doi = {10.1109/VLSID49098.2020.00037},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SarmaB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShahanR20,
author = {K. A. Shahan and
J. Sheeba Rani},
title = {{FPGA} based convolution and memory architecture for Convolutional
Neural Network},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {183--188},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00049},
doi = {10.1109/VLSID49098.2020.00049},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShahanR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShamsaKTPCRL20,
author = {Elham Shamsa and
Anil Kanduri and
Nima Taherinejad and
Alma Pr{\"{o}}bstl and
Samarjit Chakraborty and
Amir M. Rahmani and
Pasi Liljeberg},
title = {User-centric Resource Management for Embedded Multi-core Processors},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {43--48},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00025},
doi = {10.1109/VLSID49098.2020.00025},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShamsaKTPCRL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShylendraAST20,
author = {Ahish Shylendra and
Sina Haji Alizad and
Priyesh Shukla and
Amit Ranjan Trivedi},
title = {Non-parametric Statistical Density Function Synthesizer and Monte
Carlo Sampler in {CMOS}},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {19--24},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00021},
doi = {10.1109/VLSID49098.2020.00021},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShylendraAST20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SirugudiGV20,
author = {Harita Sirugudi and
Sharvani Gadgil and
Chetan Vudadha},
title = {A Novel Low Power Ternary Multiplier Design using CNFETs},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {25--30},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00022},
doi = {10.1109/VLSID49098.2020.00022},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/SirugudiGV20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ThotaWRBS20,
author = {Prudhvi Raj Thota and
Kiran Wadagavi and
Namani Rakesh and
Sumit Bhat and
Abirmoya Santra},
title = {A Low Noise, Low Power, Wide Range Programmable Output Reference Buffer
for Sensor Applications},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {161--164},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00045},
doi = {10.1109/VLSID49098.2020.00045},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ThotaWRBS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TyagiRCCP20,
author = {Vivek Tyagi and
Vikas Rana and
Laura Capecchi and
Marcella Carissimi and
Marco Pasotti},
title = {Power Efficient Sense Amplifier For Emerging Non Volatile Memories},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {7--12},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00019},
doi = {10.1109/VLSID49098.2020.00019},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TyagiRCCP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VermaS20,
author = {Anuj Verma and
Rahul Shrestha},
title = {A New Partially-Parallel VLSI-Architecture of Quasi-Cyclic {LDPC}
Decoder for 5G New-Radio},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00018},
doi = {10.1109/VLSID49098.2020.00018},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VermaS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsid/2020,
title = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
publisher = {{IEEE}},
year = {2020},
url = {https://ieeexplore.ieee.org/xpl/conhome/9102708/proceeding},
isbn = {978-1-7281-5701-6},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/2020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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