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@inproceedings{DBLP:conf/vlsid/AbercrombieKTV06,
author = {David Abercrombie and
Bernd Koenemann and
Nagesh Tamarapalli and
Srikanth Venkataraman},
title = {DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product
Yield},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {14},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.73},
doi = {10.1109/VLSID.2006.73},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AbercrombieKTV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AineCK06,
author = {Sandip Aine and
P. P. Chakrabarti and
Rajeev Kumar},
title = {Improving the Performance of {CAD} Optimization Algorithms Using On-Line
Meta-Level Control},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {683--688},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.105},
doi = {10.1109/VLSID.2006.105},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AineCK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AlsharqawiE06,
author = {Abdelhalim Alsharqawi and
Abdel Ejnioui},
title = {Clockless Pipelining for Coarse Grain Datapaths},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {749--753},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.60},
doi = {10.1109/VLSID.2006.60},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AlsharqawiE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AnanthakrishnaB06,
author = {Rohit Ananthakrishna and
Shabbir H. Batterywala},
title = {MoM - {A} Process Variation Aware Statistical Capacitance Extractor},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {135--140},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.119},
doi = {10.1109/VLSID.2006.119},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AnanthakrishnaB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Arvind06,
author = {Arvind},
title = {{UNUM:} {A} Tinker-Toy Approach to Building Multicore PowerPC Microarchitectures},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {39},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.164},
doi = {10.1109/VLSID.2006.164},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Arvind06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AshoueiCSDM06,
author = {Maryam Ashouei and
Abhijit Chatterjee and
Adit D. Singh and
Vivek De and
T. M. Mak},
title = {Statistical Estimation of Correlated Leakage Power Variation and Its
Application to Leakage-Aware Design},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {606--612},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.152},
doi = {10.1109/VLSID.2006.152},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AshoueiCSDM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BaikS06,
author = {Dong Hyun Baik and
Kewal K. Saluja},
title = {Test Cost Reduction Using Partitioned Grid Random Access Scan},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {169--174},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.157},
doi = {10.1109/VLSID.2006.157},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BaikS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BalakrishnanWC06,
author = {Kedarnath J. Balakrishnan and
Seongmoon Wang and
Srimat T. Chakradhar},
title = {{PIDISC:} Pattern Independent Design Independent Seed Compression
Technique},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {811--817},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.135},
doi = {10.1109/VLSID.2006.135},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BalakrishnanWC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BalasubramanianNFG06,
author = {Suresh Balasubramanian and
Narayanan Natarajan and
Olivier Franza and
Chris Gianos},
title = {Deterministic Low-Latency Data Transfer across Non-Integral Ratio
Clock Domains},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {781--785},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.71},
doi = {10.1109/VLSID.2006.71},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BalasubramanianNFG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BanerjeeCB06,
author = {Shibaji Banerjee and
Dipanwita Roy Chowdhury and
Bhargab B. Bhattacharya},
title = {An Efficient Scan Tree Design for Compact Test Pattern Set},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {175--180},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.43},
doi = {10.1109/VLSID.2006.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BanerjeeCB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BanikGB06,
author = {Subhadeep Banik and
Daibashish Gangopadhyay and
T. K. Bhattacharyya},
title = {A Low Power 1.8 {V} 4-Bit 400-MHz Flash {ADC} in 0.18{\(\mathrm{\mu}\)}
Digital {CMOS}},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {69--74},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.13},
doi = {10.1109/VLSID.2006.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BanikGB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BatterywalaALG06,
author = {Shabbir H. Batterywala and
Rohit Ananthakrishna and
Yansheng Luo and
Alex Gyure},
title = {A Statistical Method for Fast and Accurate Capacitance Extraction
in the Presence of Floating Dummy Fills},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {129--134},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.25},
doi = {10.1109/VLSID.2006.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BatterywalaALG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhaaskaranSE06,
author = {V. S. Kanchana Bhaaskaran and
S. Salivahanan and
D. S. Emmanuel},
title = {Semi-Custom Design of Adiabatic Adder Circuits},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {745--748},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.144},
doi = {10.1109/VLSID.2006.144},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhaaskaranSE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhaduriV06,
author = {Amitava Bhaduri and
Ranga Vemuri},
title = {Parasitic Aware Routing Methodology Based on Higher Order {RLCK} Moment
Metrics},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {141--146},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.129},
doi = {10.1109/VLSID.2006.129},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhaduriV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhatRJ06,
author = {M. S. Bhat and
S. Rekha and
H. S. Jamadagni},
title = {Extrinsic Analog Synthesis Using Piecewise Linear Current-Mode Circuits},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {51--56},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.88},
doi = {10.1109/VLSID.2006.88},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhatRJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhattacharyaNCN06,
author = {Soumendu Bhattacharya and
Vishwanath Natarajan and
Abhijit Chatterjee and
Sankar Nair},
title = {Efficient {DNA} Sensing with Fabricated Silicon Nanopores: Diagnosis
Methodology and Algorithms},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {729--733},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.80},
doi = {10.1109/VLSID.2006.80},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhattacharyaNCN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhattacharyyaMBB06,
author = {J. Bhattacharyya and
P. Mandal and
R. Banerjee and
Swapna Banerjee},
title = {Real Time Dynamic Receive Apodization for an Ultrasound Imaging System},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {534--537},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.138},
doi = {10.1109/VLSID.2006.138},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhattacharyyaMBB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhattacharyyaSML06,
author = {T. K. Bhattacharyya and
Shreyas Sen and
Debashis Mandal and
S. K. Lahiri},
title = {Development of a Wireless Integrated Toxic and Explosive {MEMS} Based
Gas Sensor},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {721--724},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.72},
doi = {10.1109/VLSID.2006.72},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhattacharyyaSML06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BiswasBDIP06,
author = {Partha Biswas and
Sudarshan Banerjee and
Nikil D. Dutt and
Paolo Ienne and
Laura Pozzi},
title = {Performance and Energy Benefits of Instruction Set Extensions in an
{FPGA} Soft Core},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {651--656},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.131},
doi = {10.1109/VLSID.2006.131},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BiswasBDIP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/CaputaS06,
author = {Peter Caputa and
Christer Svensson},
title = {A 3Gb/s/wire Global On-Chip Bus with Near Velocity-of-Light Latency},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {117--122},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.6},
doi = {10.1109/VLSID.2006.6},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/CaputaS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/CengizC06,
author = {Alkan Cengiz and
Tom W. Chen},
title = {A Progressive Two-Stage Global Routing for Macro-Cell Based Designs},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {777--780},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.22},
doi = {10.1109/VLSID.2006.22},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/CengizC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChakrabortyCMR06,
author = {Biman Chakraborty and
Ting Chen and
Tulika Mitra and
Abhik Roychoudhury},
title = {Handling Constraints in Multi-Objective {GA} for Embedded System Design},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {305--310},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.95},
doi = {10.1109/VLSID.2006.95},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChakrabortyCMR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChakrabortyRV06,
author = {Ritochit Chakraborty and
Mukesh Ranjan and
Ranga Vemuri},
title = {Symbolic Time-Domain Behavioral and Performance Modeling of Linear
Analog Circuits Using an Efficient Symbolic Newton-Iteration Algorithm
for Pole Extraction},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {689--694},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.153},
doi = {10.1109/VLSID.2006.153},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChakrabortyRV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Chang06,
author = {Yen{-}Jen Chang},
title = {An Alternative Real-Time Filter Scheme to Block Buffering},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {762--765},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.36},
doi = {10.1109/VLSID.2006.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Chang06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/CharyB06,
author = {Shweta Chary and
Michael L. Bushnell},
title = {Automatic Path-Delay Fault Test Generation for Combined Resistive
Vias, Resistive Bridges, and Capacitive Crosstalk Delay Faults},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {413--418},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.51},
doi = {10.1109/VLSID.2006.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/CharyB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/CharyB06a,
author = {Shweta Chary and
Michael L. Bushnell},
title = {Analog Macromodeling for Combined Resistive Vias, Resistive Bridges,
and Capacitive Crosstalk Delay Faults},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {818--823},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.47},
doi = {10.1109/VLSID.2006.47},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/CharyB06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChenLYW06,
author = {Jun Chen and
Rong Luo and
Huazhong Yang and
Hui Wang},
title = {A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset
Value Pipelined Accumulator},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {377--380},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.15},
doi = {10.1109/VLSID.2006.15},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChenLYW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChenRPR06,
author = {Gang Chen and
Sudhakar M. Reddy and
Irith Pomeranz and
Janusz Rajski},
title = {New Procedures to Identify Redundant Stuck-At Faults and Removal of
Redundant Logic},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {419--424},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.120},
doi = {10.1109/VLSID.2006.120},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChenRPR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChowdhuryNB06,
author = {Ahsan Raja Chowdhury and
Rumana Nazmul and
Hafiz Md. Hasan Babu},
title = {A New Approach to Synthesize Multiple-Output Functions Using Reversible
Programmable Logic Array},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {311--316},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.18},
doi = {10.1109/VLSID.2006.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChowdhuryNB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DasCD06,
author = {Samik Das and
P. P. Chakrabarti and
Pallab Dasgupta},
title = {Instruction-Set-Extension Exploration Using Decomposable Heuristic
Search},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {293--298},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.106},
doi = {10.1109/VLSID.2006.106},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DasCD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DasLC06,
author = {Koushik K. Das and
Shih{-}Hsien Lo and
Ching{-}Te Chuang},
title = {High Performance {MTCMOS} Technique for Leakage Reduction in Hybrid
SOI-Epitaxial Technologies with Enhanced-Mobility {PFET} Header},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {758--761},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.97},
doi = {10.1109/VLSID.2006.97},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DasLC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DasguptaY06,
author = {Parthasarathi Dasgupta and
Prashant Yadava},
title = {Linear Required-Arrival-Time Trees and their Construction},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {790--793},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.111},
doi = {10.1109/VLSID.2006.111},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DasguptaY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DastidarR06,
author = {Tathagato Rai Dastidar and
Partha Ray},
title = {A New Device Level Digital Simulator for Simulation and Functional
Verification of Large Semiconductor Memories},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {155--160},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.19},
doi = {10.1109/VLSID.2006.19},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DastidarR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DattaG06,
author = {Deepanjan Datta and
Samiran Ganguly},
title = {Design of Multi-bit {SET} Adder and Its Fault Simulation},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {549--552},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.69},
doi = {10.1109/VLSID.2006.69},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DattaG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DeK06,
author = {Koushik De and
Santiram Kal},
title = {A Low Power 6-Bit {A/D} Converter Achieving 10-Bit Resolution for
{MEMS} Sensor Interface Using Time-Interleaved Delta Modulation},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {75--80},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.14},
doi = {10.1109/VLSID.2006.14},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DeK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DebnathT06,
author = {Goutam Debnath and
Paul J. Thadikaran},
title = {Design Challenges for High Performance Nano-Technology},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {12--13},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.64},
doi = {10.1109/VLSID.2006.64},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DebnathT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DevanathanB06,
author = {Suresh Kumar Devanathan and
Michael L. Bushnell},
title = {Sequential Spectral {ATPG} Using the Wavelet Transform and Compaction},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {407--412},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.146},
doi = {10.1109/VLSID.2006.146},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DevanathanB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DeyB06,
author = {Sanjoy Kumar Dey and
Swapna Banerjee},
title = {An 8-Bit, 3.8GHz Dynamic BiCMOS Comparator for High-Performance {ADC}},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {593--598},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.35},
doi = {10.1109/VLSID.2006.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DeyB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DeyBMB06,
author = {Soumyajit Dey and
Susmit Biswas and
Arijit Mukhopadhyay and
Anupam Basu},
title = {An Approach to Architectural Enhancement for Embedded Speech Applications},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {371--376},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.37},
doi = {10.1109/VLSID.2006.37},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DeyBMB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DingV06,
author = {Mengmeng Ding and
Ranga Vemuri},
title = {Efficient Analog Performance Macromodeling via Sequential Design Space
Decomposition},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {553--556},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.77},
doi = {10.1109/VLSID.2006.77},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DingV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DongZMWL06,
author = {Mian Dong and
Chun Zhang and
Songping Mai and
Zhihua Wang and
Dongmei Li},
title = {A Wideband Frequency-Shift Keying Demodulator for Wireless Neural
Stimulation Microsystems},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {521--524},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.29},
doi = {10.1109/VLSID.2006.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DongZMWL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DrechslerFK06,
author = {Rolf Drechsler and
G{\"{o}}rschwin Fey and
Sebastian Kinder},
title = {An Integrated Approach for Combining {BDD} and {SAT} Provers},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {237--242},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.44},
doi = {10.1109/VLSID.2006.44},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DrechslerFK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DuttaUB06,
author = {Debashis Dutta and
Ritesh Ujjwal and
Swapna Banerjee},
title = {Design of Low-Voltage Low-Power Continuous-Time Filter for Hearing
Aid Application Using {CMOS} Current Conveyor Based Translinear Loop},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {587--592},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.68},
doi = {10.1109/VLSID.2006.68},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DuttaUB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/EmbanathV06,
author = {Siva Embanath and
Ramakrishnan Venkata},
title = {Exceptional {ASIC:} Through Automatic Timing Exception Generation
{(ATEG)}},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {503--506},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.86},
doi = {10.1109/VLSID.2006.86},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/EmbanathV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/FengM06,
author = {Yan Feng and
Dinesh P. Mehta},
title = {Heterogeneous Floorplanning for FPGAs},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {257--262},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.96},
doi = {10.1109/VLSID.2006.96},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/FengM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GargCSK06,
author = {Vivek Garg and
Vikram Chandrasekhar and
Milagros Sashik{\'{a}}nth and
V. Kamakoti},
title = {An Area and Configuration-Bit Optimized {CLB} Architecture and Timing-Driven
Packing for FPGAs},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {507--510},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.38},
doi = {10.1109/VLSID.2006.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GargCSK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GautamMKADKDB06,
author = {Anand Gautam and
A. Geeta Madhuri and
Priya Khandelwal and
K. Pratyush Aditya and
Meghana Desai and
Padma N. Krishna and
Malvika Dutt and
Reeti Bhatia},
title = {Novel Architecture of {EBC} for {JPEG2000}},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {530--533},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.121},
doi = {10.1109/VLSID.2006.121},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GautamMKADKDB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GirishankarT06,
author = {G. Girishankar and
Shitanshu Tiwari},
title = {Generating Scalable Polynomial Models: Key to Low Power High Performance
Designs},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {625--630},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.94},
doi = {10.1109/VLSID.2006.94},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GirishankarT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuptaK06,
author = {Puneet Gupta and
Andrew B. Kahng},
title = {Efficient Design and Analysis of Robust Power Distribution Meshes},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {337--342},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.79},
doi = {10.1109/VLSID.2006.79},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuptaK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HalderC06,
author = {Achintya Halder and
Abhijit Chatterjee},
title = {Low-Cost Production Testing of Wireless Transmitters},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {437--442},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.113},
doi = {10.1109/VLSID.2006.113},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HalderC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HanchateR06,
author = {Narender Hanchate and
Nagarajan Ranganathan},
title = {A Linear Time Algorithm for Wire Sizing with Simultaneous Optimization
of Interconnect Delay and Crosstalk Noise},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {283--290},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.11},
doi = {10.1109/VLSID.2006.11},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HanchateR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HollisM06,
author = {Simon Hollis and
Simon W. Moore},
title = {An Asynchronous Interconnect Architecture for Device Security Enhancement},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {209--215},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.40},
doi = {10.1109/VLSID.2006.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HollisM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Hu06,
author = {Jackson Hu},
title = {The Technological and Geographical Migration of the Semiconductor
Industry},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {35},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.161},
doi = {10.1109/VLSID.2006.161},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Hu06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/IchihashiT06,
author = {Motoi Ichihashi and
Haruki Toda},
title = {Performance Measurement and Improvement of Asymmetric Three-Tr. Cell
{(ATC)} {DRAM} toward 0.3V Memory Array Operation},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {487--490},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.132},
doi = {10.1109/VLSID.2006.132},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/IchihashiT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/IyerJCH06,
author = {Priya Iyer and
Shailendra Jain and
Bryan Casper and
Jason Howard},
title = {Testing High-Speed {IO} Links Using On-Die Circuitry},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {807--810},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.159},
doi = {10.1109/VLSID.2006.159},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/IyerJCH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainA06,
author = {Sanjeev K. Jain and
Pankaj Agarwal},
title = {A Low Leakage and {SNM} Free {SRAM} Cell Design in Deep Sub Micron
{CMOS} Technology},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {495--498},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.12},
doi = {10.1109/VLSID.2006.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainKVP06,
author = {Palkesh Jain and
D. Vinay Kumar and
J. M. Vasi and
Mahesh B. Patil},
title = {Evaluation of Non-Quasi-Static Effects during {SEU} in Deep-Submicron
{MOS} Devices and Circuits},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {188--193},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.85},
doi = {10.1109/VLSID.2006.85},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainKVP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JaveyD06,
author = {Ali Javey and
Hongjie Dai},
title = {Carbon Nanotube Electronics},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {453--458},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.57},
doi = {10.1109/VLSID.2006.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JaveyD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JiaV06,
author = {Xin Jia and
Ranga Vemuri},
title = {{CAD} Tools for a Globally Asynchronous Locally Synchronous {FPGA}
Architecture},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {251--256},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.54},
doi = {10.1109/VLSID.2006.54},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JiaV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JoshiDD06,
author = {Ajay Joshi and
Vinita V. Deodhar and
Jeffrey A. Davis},
title = {Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed
{(WPM)} Routing},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {773--776},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.112},
doi = {10.1109/VLSID.2006.112},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JoshiDD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Kantipudi06,
author = {Kalyana R. Kantipudi},
title = {On the Size and Generation of Minimal N-Detection Tests},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {425--430},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.125},
doi = {10.1109/VLSID.2006.125},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Kantipudi06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KhanATE06,
author = {Zahid Khan and
Tughrul Arslan and
John S. Thompson and
Ahmet T. Erdogan},
title = {Area and Power Efficient {VLSI} Architecture for Computing Pseudo
Inverse of Channel Matrix in a {MIMO} Wireless System},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {734--737},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.49},
doi = {10.1109/VLSID.2006.49},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KhanATE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KhanB06,
author = {Omar I. Khan and
Michael L. Bushnell},
title = {Aliasing Analysis of Spectral Statistical Response Compaction Techniques},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {801--806},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.33},
doi = {10.1109/VLSID.2006.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KhanB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KhanSTWM06,
author = {Qadeer Ahmad Khan and
G. K. Siddhartha and
Divya Tripathi and
Sanjay Kumar Wadhwa and
Kulbhushan Misri},
title = {Techniques for On-Chip Process Voltage and Temperature Detection and
Compensation},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {581--586},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.155},
doi = {10.1109/VLSID.2006.155},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KhanSTWM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KhanWM06,
author = {Qadeer Ahmad Khan and
Sanjay Kumar Wadhwa and
Kulbhushan Misri},
title = {A Single Supply Level Shifter for Multi-Voltage Systems},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {557--560},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.24},
doi = {10.1109/VLSID.2006.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KhanWM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KokradyPR06,
author = {Aman Kokrady and
Theo J. Powell and
S. Ramakrishnan},
title = {Reducing Design Verification Cycle Time through Testbench Redundancy},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {243--248},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.140},
doi = {10.1109/VLSID.2006.140},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KokradyPR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KonarBBB06,
author = {Rajan Konar and
Rajarshee P. Bharadwaj and
Dinesh Bhatia and
Poras T. Balsara},
title = {Exploring Logic Block Granularity in Leakage Tolerant {FPGA}},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {754--757},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.87},
doi = {10.1109/VLSID.2006.87},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KonarBBB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KosarajuVM06,
author = {Naga M. Kosaraju and
Murali R. Varanasi and
Saraju P. Mohanty},
title = {A High-Performance {VLSI} Architecture for Advanced Encryption Standard
{(AES)} Algorithm},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {481--484},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.9},
doi = {10.1109/VLSID.2006.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KosarajuVM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Kuehlmann06,
author = {Andreas Kuehlmann},
title = {Integrated Design Flows - {A} Battered {EDA} Slogan or True Challenge
for Tool Development and Algorithmic Research},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {41},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.107},
doi = {10.1109/VLSID.2006.107},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Kuehlmann06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarBRGSAMPG06,
author = {R. Raghavendra Kumar and
Ricky Bedi and
Ramadas Rajagopal and
N. Guruprasad and
K. Subbarangaiah and
Taher Abbasi and
D. V. R. Murthy and
P. Krishna Prasad and
D. R. Gude},
title = {A Comprehensive SoC Design Methodology for Nanometer Design Challenges},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {15--17},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.7},
doi = {10.1109/VLSID.2006.7},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarBRGSAMPG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarMMK06,
author = {Amit Kumar and
Noriyuki Miura and
Muhammad Muqsith and
Tadahiro Kuroda},
title = {Active Crosstalk Cancel for High-Density Inductive Inter-chip Wireless
Communication},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {271--276},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.31},
doi = {10.1109/VLSID.2006.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarMMK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarO06,
author = {M. Jagadesh Kumar and
Ali A. Orouji},
title = {Phase Change Memory Faults},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {108--112},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.134},
doi = {10.1109/VLSID.2006.134},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LacovaraV06,
author = {Robert C. Lacovara and
Dhadesugoor R. Vaman},
title = {Design of Embedded Systems with Novel Applications},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {21--22},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.66},
doi = {10.1109/VLSID.2006.66},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LacovaraV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LahiriABB06,
author = {Anirban Lahiri and
Saurabh Agarwal and
Anupam Basu and
Bhargab B. Bhattacharya},
title = {Recovery-Based Real-Time Static Scheduling for Battery Life Optimization},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {469--472},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.139},
doi = {10.1109/VLSID.2006.139},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LahiriABB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LekatsasHJC06,
author = {Haris Lekatsas and
J{\"{o}}rg Henkel and
Venkata Jakkula and
Srimat T. Chakradhar},
title = {Using Shiftable Content Addressable Memories to Double Memory Capacity
on Embedded Systems},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {639--644},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.166},
doi = {10.1109/VLSID.2006.166},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LekatsasHJC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LiYM06,
author = {Zhiyuan Li and
Mingyan Yu and
Jianguo Ma},
title = {A Rail-to-Rail {I/O} Operational Amplifier with 0.5{\%} gm Fluctuation
Using Double P-channel Differential Input Pairs},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {563--568},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.23},
doi = {10.1109/VLSID.2006.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LiYM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LingappanJ06,
author = {Loganathan Lingappan and
Niraj K. Jha},
title = {Improving the Performance of Automatic Sequential Test Generation
by Targeting Hard-to-Test Faults},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {431--436},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.104},
doi = {10.1109/VLSID.2006.104},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LingappanJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LuWP06,
author = {Ivan Siu{-}Chuang Lu and
Neil Weste and
Sri Parameswaran},
title = {{ADC} Precision Requirement for Digital Ultra-Wideband Receivers with
Sublinear Front-Ends: {A} Power and Performance Perspective},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {575--580},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.32},
doi = {10.1109/VLSID.2006.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LuWP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MahalingamR06,
author = {Venkataraman Mahalingam and
N. Ranganathan},
title = {An Efficient and Accurate Logarithmic Multiplier Based on Operand
Decomposition},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {393--398},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.42},
doi = {10.1109/VLSID.2006.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MahalingamR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MaharatnaTKG06,
author = {Koushik Maharatna and
Alfonso Troya and
Milos Krstic and
Eckhard Grass},
title = {On the Implementation of a Low-Power {IEEE} 802.11a Compliant Viterbi
Decoder},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {613--618},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.124},
doi = {10.1109/VLSID.2006.124},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MaharatnaTKG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MajumderB06,
author = {Subhashis Majumder and
Bhargab B. Bhattacharya},
title = {Solving Thermal Problems of Hot Chips Using Voronoi Diagrams},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {545--548},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.150},
doi = {10.1109/VLSID.2006.150},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MajumderB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MandalDPS06,
author = {Sushanta K. Mandal and
Arijit De and
Amit Patra and
Shamik Sural},
title = {A Wide-Band Lumped Element Compact {CAD} Model of Si-Based Planar
Spiral Inductor for {RFIC} Design},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {619--624},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.27},
doi = {10.1109/VLSID.2006.27},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/MandalDPS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MathurFBM06,
author = {Anmol Mathur and
Masahiro Fujita and
M. Balakrishnan and
Raj S. Mitra},
title = {Sequential Equivalence Checking},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {18--19},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.145},
doi = {10.1109/VLSID.2006.145},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MathurFBM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Mehendale06,
author = {Mahesh Mehendale},
title = {SoC - The Road Ahead},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {40},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.149},
doi = {10.1109/VLSID.2006.149},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Mehendale06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Miller06,
author = {Richard Miller},
title = {We Want It All, and We Want It Now!},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {29},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.170},
doi = {10.1109/VLSID.2006.170},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Miller06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MitraBSBZK06,
author = {Debasis Mitra and
Subhasis Bhattacharjee and
Susmita Sur{-}Kolay and
Bhargab B. Bhattacharya and
Sujit T. Zachariah and
Sandip Kundu},
title = {Test Pattern Generation for Power Supply Droop Faults},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {343--348},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.158},
doi = {10.1109/VLSID.2006.158},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MitraBSBZK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MohammadTA06,
author = {Mohammad Gh. Mohammad and
Laila Terkawi and
Muna Albasman},
title = {A Stimulus-Free Probabilistic Model for Single-Event-Upset Sensitivity},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {100--107},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.26},
doi = {10.1109/VLSID.2006.26},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MohammadTA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MohantyK06,
author = {Saraju P. Mohanty and
Elias Kougianos},
title = {Modeling and Reduction of Gate Leakage during Behavioral Synthesis
of NanoCMOS Circuits},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {83--88},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.118},
doi = {10.1109/VLSID.2006.118},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MohantyK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MoraPRL06,
author = {Higinio Mora Mora and
Jer{\'{o}}nimo Mora Pascual and
Jos{\'{e}}{-}Luis S{\'{a}}nchez{-}Romero and
Francisco Antonio Pujol L{\'{o}}pez},
title = {Partial Product Reduction Based on Look-Up Tables},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {399--404},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.130},
doi = {10.1109/VLSID.2006.130},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MoraPRL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Nagaraj06,
author = {N. S. Nagaraj},
title = {Interconnect Process Variations: Theory and Practice},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {11},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.108},
doi = {10.1109/VLSID.2006.108},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Nagaraj06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NarasimhaHN06,
author = {Usha Narasimha and
Anthony M. Hill and
N. S. Nagaraj},
title = {SmartExtract: Accurate Capacitance Extraction for {SOC} Designs},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {786--789},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.148},
doi = {10.1109/VLSID.2006.148},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NarasimhaHN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NarasimhanSS06,
author = {Ashok Narasimhan and
Bhooma Srinivasaraghavan and
Ramalingam Sridhar},
title = {A Low-Power Asymmetric Source Driver Level Converter Based Current-Mode
Signaling Scheme for Global Interconnects},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {491--494},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.16},
doi = {10.1109/VLSID.2006.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NarasimhanSS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NarasimhuluR06,
author = {K. Narasimhulu and
V. Ramgopal Rao},
title = {Embedded Tutorial: Analog Circuit Performance Issues with Aggressively
Scaled Gate Oxide {CMOS} Technologies},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {45--50},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.84},
doi = {10.1109/VLSID.2006.84},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NarasimhuluR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/OggA06,
author = {Simon Ogg and
Bashir M. Al{-}Hashimi},
title = {Improved Data Compression for Serial Interconnected Network on Chip
through Unused Significant Bit Removal},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {525--529},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.103},
doi = {10.1109/VLSID.2006.103},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/OggA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Orton06,
author = {David E. Orton},
title = {Small, Smart, Intelligent and Interactive Handheld Devices},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {25},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.147},
doi = {10.1109/VLSID.2006.147},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Orton06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/OrugantiR06,
author = {Aswath Oruganti and
Nagarajan Ranganathan},
title = {Leakage Power Reduction in Dual-Vdd and Dual-Vth Designs through Probabilistic
Analysis of Vth Variation},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {766--769},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.110},
doi = {10.1109/VLSID.2006.110},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/OrugantiR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PaniK06,
author = {Alok Kumar Pani and
Ratnam V. Raja Kumar},
title = {Optimized {VLIW} Architecture for Non-zero {IF} QAM-Modem Implementations},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {513--516},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.127},
doi = {10.1109/VLSID.2006.127},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PaniK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Patel06,
author = {Parimal Patel},
title = {Embedded Systems Design Using {FPGA}},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {20},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.83},
doi = {10.1109/VLSID.2006.83},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Patel06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PatrikarP06,
author = {Rajendra M. Patrikar and
Olivier Peyran},
title = {Design Planning for Uniform Thermal Distribution},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {541--544},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.70},
doi = {10.1109/VLSID.2006.70},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PatrikarP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PavanES06,
author = {Shanthi Pavan and
Prakash Easwaran and
C. Srinivasan},
title = {System Aspects of Analog to Digital Converter Designs},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {10},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.154},
doi = {10.1109/VLSID.2006.154},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PavanES06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PomeranzR06,
author = {Irith Pomeranz and
Sudhakar M. Reddy},
title = {The Cut Delay Fault Model for Guiding the Generation of n-Detection
Test Sets for Transition Faults},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {828--831},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.160},
doi = {10.1109/VLSID.2006.160},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PomeranzR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PotlapallyRRLJ06,
author = {Nachiketh R. Potlapally and
Srivaths Ravi and
Anand Raghunathan and
Ruby B. Lee and
Niraj K. Jha},
title = {Impact of Configurability and Extensibility on IPSec Protocol Execution
on Embedded Processors},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {299--304},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.102},
doi = {10.1109/VLSID.2006.102},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PotlapallyRRLJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Potts06,
author = {Henry Potts},
title = {IC/FPGA-Package-PCB Design Collaboration},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {31},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.101},
doi = {10.1109/VLSID.2006.101},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Potts06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PrabhaM06,
author = {Viswanathan Lakshmi Prabha and
Elwin Chandra Monie},
title = {Reinforcement Temporal Difference Learning Scheme for Dynamic Energy
Management in Embedded Systems},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {645--650},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.141},
doi = {10.1109/VLSID.2006.141},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PrabhaM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PrasadMN06,
author = {A. V. S. S. Prasad and
Jacob Mathews and
Nagi Naganathan},
title = {Low-Power Design Strategies for Mobile Computing},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {3--4},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.114},
doi = {10.1109/VLSID.2006.114},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PrasadMN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PuriKJ06,
author = {Ruchir Puri and
Tanay Karnik and
Rajiv V. Joshi},
title = {Technology Impacts on Sub-90nm {CMOS} Circuit Design and Design Methodologies},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {5--7},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.156},
doi = {10.1109/VLSID.2006.156},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PuriKJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/QiangSA06,
author = {Qiang Qiang and
Daniel G. Saab and
Jacob A. Abraham},
title = {Checking Nested Properties Using Bounded Model Checking and Sequential
{ATPG}},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {225--230},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.58},
doi = {10.1109/VLSID.2006.58},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/QiangSA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RadojevicSR06,
author = {Ivan Radojevic and
Zoran A. Salcic and
Partha S. Roop},
title = {Design of Heterogeneous Embedded Systems Using DFCharts Model of Computation},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {461--464},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.67},
doi = {10.1109/VLSID.2006.67},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RadojevicSR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RaghavendraM06,
author = {R. G. Raghavendra and
Pradip Mandal},
title = {An On-Chip Voltage Regulator with Improved Load Regulation and Light
Load Power Efficiency},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {331--336},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.46},
doi = {10.1109/VLSID.2006.46},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RaghavendraM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RajaB06,
author = {Gaurav Raja and
Basabi Bhaumik},
title = {16-Bit Segmented Type Current Steering {DAC} for Video Applications},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {63--68},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.1},
doi = {10.1109/VLSID.2006.1},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RajaB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RajagopalSASVDCFSW06,
author = {K. A. Rajagopal and
R. Sivakumar and
N. V. Arvind and
C. Sreeram and
Vish Visvanathan and
Shailendra Dhuri and
Roopesh Chander and
Patrick Fortner and
Subra Sripada and
Qiuyang Wu},
title = {A Comprehensive Solution for True Hierarchical Timing and Crosstalk
Delay Signoff},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {277--282},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.8},
doi = {10.1109/VLSID.2006.8},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RajagopalSASVDCFSW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RajaramanKVXI06,
author = {R. Rajaraman and
Jungsub Kim and
Narayanan Vijaykrishnan and
Yuan Xie and
Mary Jane Irwin},
title = {{SEAT-LA:} {A} Soft Error Analysis Tool for Combinational Logic},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {499--502},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.143},
doi = {10.1109/VLSID.2006.143},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RajaramanKVXI06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RamakrishnanB06,
author = {V. Ramakrishnan and
Poras T. Balsara},
title = {A Wide-Range, High-Resolution, Compact CMOS, Time to Digital Converter},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {197--202},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.28},
doi = {10.1109/VLSID.2006.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RamakrishnanB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ReddyM06,
author = {Subodh M. Reddy and
Rajeev Murgai},
title = {Accurate Substrate Noise Analysis Based on Library Module Characterization},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {355--362},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.30},
doi = {10.1109/VLSID.2006.30},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ReddyM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RejimonB06,
author = {Thara Rejimon and
Sanjukta Bhanja},
title = {Wide Limited Switch Dynamic Logic Circuit Implementations},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {94--99},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.171},
doi = {10.1109/VLSID.2006.171},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RejimonB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Rhodes06,
author = {Matthew Rhodes},
title = {Keynote Address},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {30},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.109},
doi = {10.1109/VLSID.2006.109},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Rhodes06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RichardsonNPVXDD06,
author = {Thomas D. Richardson and
Chrysostomos Nicopoulos and
Dongkook Park and
Narayanan Vijaykrishnan and
Yuan Xie and
Chita R. Das and
Vijay Degalahal},
title = {A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less
Buses and On-Chip Networks},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {657--664},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.10},
doi = {10.1109/VLSID.2006.10},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RichardsonNPVXDD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RoyJU06,
author = {Snehashis Roy and
Sukumar Jairam and
H. Udayakumar},
title = {A Methodology for Switching Activity Based {IO} Powerpad Optimisation},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {794--797},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.17},
doi = {10.1109/VLSID.2006.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RoyJU06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RoyMMABC06,
author = {Kaushik Roy and
Hamid Mahmoodi{-}Meimand and
Saibal Mukhopadhyay and
Hari Ananthan and
Aditya Bansal and
Tamer Cakici},
title = {Double-Gate {SOI} Devices for Low-Power and High-Performance Applications},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {445--452},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.74},
doi = {10.1109/VLSID.2006.74},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RoyMMABC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SadeghiEF06,
author = {K. Sadeghi and
M. Emadi and
Farzan Farbiz},
title = {Using Level Restoring Method for Dual Supply Voltage},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {601--605},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.165},
doi = {10.1109/VLSID.2006.165},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SadeghiEF06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SahaDPB06,
author = {Prabir K. Saha and
Ashudeb Dutta and
Amit Patra and
T. K. Bhattacharyya},
title = {Design of a 1 {V} Low Power 900 MHz {QVCO}},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {57--62},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.65},
doi = {10.1109/VLSID.2006.65},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SahaDPB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SairamanRS06,
author = {Viswanath Sairaman and
Nagarajan Ranganathan and
Neeta S. Singh},
title = {An Automatic Code Generation Tool for Partitioned Software in Distributed
Systems},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {477--480},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.41},
doi = {10.1109/VLSID.2006.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SairamanRS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SangireddyRG06,
author = {Rama Sangireddy and
Prabhu Rajamani and
Shwetha Gaddam},
title = {Performance Optimization with Scalable Reconfigurable Computing Systems},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {381--386},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.133},
doi = {10.1109/VLSID.2006.133},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SangireddyRG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SaraswatAN06,
author = {Dharmendra Saraswat and
Ramachandra Achar and
Michel S. Nakhla},
title = {Circuit Compatible Macromodeling of High-Speed {VLSI} Modules Characterized
by Scattering Parameters},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {667--671},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.59},
doi = {10.1109/VLSID.2006.59},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SaraswatAN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SarkarCK06,
author = {Arnab Sarkar and
P. P. Chakrabarti and
Rajeev Kumar},
title = {Frame Based Fair Multiprocessor Scheduler: {A} Fast Fair Algorithm
for Real-Time Embedded Systems},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {677--682},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.90},
doi = {10.1109/VLSID.2006.90},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SarkarCK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SethVSK06,
author = {Kavish Seth and
K. N. Viswajith and
S. Srinivasan and
V. Kamakoti},
title = {Ultra Folded High-Speed Architectures for Reed-Solomon Decoders},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {517--520},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.163},
doi = {10.1109/VLSID.2006.163},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SethVSK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Sevcik06,
author = {Richard Sevcik},
title = {Future {FPGA} Technologies, in Partnership with Universities},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {36},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.91},
doi = {10.1109/VLSID.2006.91},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Sevcik06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Shanbhag06,
author = {Supriya S. Shanbhag},
title = {{CMOS} Integrated Circuit for Sensing Applications},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {738--741},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.61},
doi = {10.1109/VLSID.2006.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Shanbhag06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShinhNANE06,
author = {Gurpreet Shinh and
Natalie Nakhla and
Ramachandra Achar and
Michel S. Nakhla and
Ihsan Erdin},
title = {Efficient and Accurate {EMC} Analysis of High-Frequency {VLSI} Subnetworks},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {672--676},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.78},
doi = {10.1109/VLSID.2006.78},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShinhNANE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SinghalCM06,
author = {Rohit Singhal and
Gwan S. Choi and
Rabi N. Mahapatra},
title = {Programmable {LDPC} Decoder Based on the Bubble-Sort Algorithm},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {203--208},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.137},
doi = {10.1109/VLSID.2006.137},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SinghalCM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SivagnanameNNMB06,
author = {Jayakumaran Sivagnaname and
Hung C. Ngo and
Kevin J. Nowka and
Robert K. Montoye and
Richard B. Brown},
title = {Gate-Induced Barrier Field Effect Transistor {(GBFET)} - {A} New Thin
Film Transistor for Active Matrix Liquid Crystal Display Systems},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {89--93},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.93},
doi = {10.1109/VLSID.2006.93},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SivagnanameNNMB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SridharanC06,
author = {Jayashree Sridharan and
Tom Chen},
title = {Gate Delay Modeling with Multiple Input Switching for Static (Statistical)
Timing Analysis},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {323--328},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.92},
doi = {10.1109/VLSID.2006.92},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SridharanC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/StanRZ06,
author = {Mircea R. Stan and
Garrett S. Rose and
Matthew M. Ziegler},
title = {Hybrid CMOS/Molecular Electronic Circuits},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {703--708},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.99},
doi = {10.1109/VLSID.2006.99},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/StanRZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/StefatosAKF06,
author = {Evangelos F. Stefatos and
Tughrul Arslan and
Didier Keymeulen and
Ian Ferguson},
title = {Custom Reconfigurable Architecture for Autonomous Fault-Recovery of
{MEMS} Vibratory Sensor Electronics},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {725--728},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.63},
doi = {10.1109/VLSID.2006.63},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/StefatosAKF06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SubramanianCHLMRV06,
author = {Vivek Subramanian and
Paul C. Chang and
Daniel C. Huang and
Josephine B. Lee and
Steven E. Molesa and
David R. Redinger and
Steven K. Volkman},
title = {All-Printed {RFID} Tags: Materials, Devices, and Circuit Implications},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {709--714},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.34},
doi = {10.1109/VLSID.2006.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SubramanianCHLMRV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SunRRJ06,
author = {Fei Sun and
Srivaths Ravi and
Anand Raghunathan and
Niraj K. Jha},
title = {Hybrid Custom Instruction and Co-Processor Synthesis Methodology for
Extensible Processors},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {473--476},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.100},
doi = {10.1109/VLSID.2006.100},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SunRRJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SundaramES06,
author = {Srikanth Sundaram and
Praveen Elakkumanan and
Ramalingam Sridhar},
title = {High Speed Robust Current Sense Amplifier for Nanoscale Memories:
- {A} Winner Take All Approach},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {569--574},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.98},
doi = {10.1109/VLSID.2006.98},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SundaramES06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SuriM06,
author = {Roopak Suri and
C. M. Markan},
title = {Threshold Trimming Based Design of a {CMOS} Programmable Operational
Amplifier},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {717--720},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.162},
doi = {10.1109/VLSID.2006.162},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SuriM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TangM06,
author = {Min Tang and
Jun{-}Fa Mao},
title = {Optimization of Global Interconnects in High Performance {VLSI} Circuits},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {123--128},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.126},
doi = {10.1109/VLSID.2006.126},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TangM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TaskerN06,
author = {Shiv Tasker and
Rishiyur S. Nikhil},
title = {Beyond {RTL:} Advanced Digital System Design},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {8--9},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.52},
doi = {10.1109/VLSID.2006.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TaskerN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Tekumalla06,
author = {Ramesh C. Tekumalla},
title = {An On-Chip Diagnosis Methodology for Embedded Cores with Replaceable
Modules},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {824--827},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.45},
doi = {10.1109/VLSID.2006.45},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Tekumalla06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TennantEAT06,
author = {Mark P. Tennant and
Ahmet T. Erdogan and
Tughrul Arslan and
John S. Thompson},
title = {A Novel Architecture Using the Decorrelating Transform for Low Power
Adaptive Filters},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {263--268},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.20},
doi = {10.1109/VLSID.2006.20},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TennantEAT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ThapliyalKS06,
author = {Himanshu Thapliyal and
Saurabh Kotiyal and
M. B. Srinivas},
title = {Novel {BCD} Adders and Their Reversible Logic Implementation for {IEEE}
754r Format},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {387--392},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.122},
doi = {10.1109/VLSID.2006.122},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ThapliyalKS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TiwariBM06,
author = {Praveen Tiwari and
Saptarshi Biswas and
Raj S. Mitra},
title = {Apriori Formal Coverage Analysis for Protocol Properties},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {231--236},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.48},
doi = {10.1109/VLSID.2006.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TiwariBM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TrivediDN06,
author = {Gaurav Trivedi and
Madhav P. Desai and
H. Narayanan},
title = {Fast {DC} Analysis and Its Application to Combinatorial Optimization
Problems},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {695--700},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.89},
doi = {10.1109/VLSID.2006.89},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TrivediDN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VallapenaniCXYC06,
author = {Venkat Rao Vallapenani and
Ravi Shankar Chevuri and
Bingxiong Xu and
Lun Ye and
Kanad Chakraborty},
title = {Efficient Techniques for Noise Characterization of Sequential Cells
and Macros},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {363--368},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.81},
doi = {10.1109/VLSID.2006.81},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VallapenaniCXYC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VenkatanarayananB06,
author = {Hari Vijay Venkatanarayanan and
Michael L. Bushnell},
title = {An Area Efficient Mixed-Signal Test Architecture for Systems-on-a-Chip},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {161--168},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.39},
doi = {10.1109/VLSID.2006.39},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VenkatanarayananB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WadhwaSG06,
author = {Sanjay Kumar Wadhwa and
G. K. Siddhartha and
Anand Gaurav},
title = {Zero Steady State Current Power on Reset Circuit with Brown-Out Detector},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {631--636},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.172},
doi = {10.1109/VLSID.2006.172},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WadhwaSG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WangM06,
author = {Baohua Wang and
Pinaki Mazumder},
title = {Bounding Supply Noise Induced Path Delay Variation Using a Relaxation
Approach},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {349--354},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.53},
doi = {10.1109/VLSID.2006.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WangM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06,
title = {Message from the General Chairs},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.115},
doi = {10.1109/VLSID.2006.115},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06a,
title = {Message from the Program Chairs},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.117},
doi = {10.1109/VLSID.2006.117},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06b,
title = {Message from the Organizing Chair},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.116},
doi = {10.1109/VLSID.2006.116},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06c,
title = {Conference Committee},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.62},
doi = {10.1109/VLSID.2006.62},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06c.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06d,
title = {Program Committee},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.136},
doi = {10.1109/VLSID.2006.136},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06d.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06e,
title = {Organizing Committee},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.128},
doi = {10.1109/VLSID.2006.128},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06e.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06f,
title = {{VLSI} Design 2005 Conference Awards},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.167},
doi = {10.1109/VLSID.2006.167},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06f.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06g,
title = {{VLSI} Design 2006 Conference Awards},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.168},
doi = {10.1109/VLSID.2006.168},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06g.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06h,
title = {Reviewers},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.142},
doi = {10.1109/VLSID.2006.142},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06h.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06i,
title = {{VLSI} Design Conference History},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.169},
doi = {10.1109/VLSID.2006.169},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06i.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06j,
title = {Embedded Systems Design Conference History},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.82},
doi = {10.1109/VLSID.2006.82},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06j.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06k,
title = {Call for Participation: {VLSI} Design 2007},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.56},
doi = {10.1109/VLSID.2006.56},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06k.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/X06l,
title = {Call for Participation: 10th {IEEE} {VLSI} Design {\&} Test Symposium},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.55},
doi = {10.1109/VLSID.2006.55},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/X06l.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/YanLC06,
author = {Jin{-}Tai Yan and
Chia{-}Fang Lee and
Yen{-}Hsiang Chen},
title = {Dynamic Tree Reconstruction with Application to Timing-Constrained
Congestion-Driven Global Routing},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {147--152},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.76},
doi = {10.1109/VLSID.2006.76},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/YanLC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ZaretskyMDB06,
author = {David Zaretsky and
Gaurav Mittal and
Robert P. Dick and
Prith Banerjee},
title = {Dynamic Template Generation for Resource Sharing in Control and Data
Flow Graphs},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {465--468},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.75},
doi = {10.1109/VLSID.2006.75},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ZaretskyMDB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ZhangJ06,
author = {Rui Zhang and
Niraj K. Jha},
title = {State Encoding of Finite-State Machines Targeting Threshold and Majority
Logic Based Implementations with Application to Nanotechnologies},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {317--322},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.151},
doi = {10.1109/VLSID.2006.151},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ZhangJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ZhouYY06,
author = {Tong Zhou and
Mingyan Yu and
Yizheng Ye},
title = {A Pipelined Switched-Current Chaotic System for the High-Speed Truly
Random Number Generation in Crypto Processor},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {216--221},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.21},
doi = {10.1109/VLSID.2006.21},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ZhouYY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ZouCRT06,
author = {Wei Zou and
Wu{-}Tung Cheng and
Sudhakar M. Reddy and
Huaxing Tang},
title = {On Methods to Improve Location Based Logic Diagnosis},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {181--187},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.123},
doi = {10.1109/VLSID.2006.123},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ZouCRT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsid/2006,
title = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://ieeexplore.ieee.org/xpl/conhome/10557/proceeding},
isbn = {0-7695-2502-4},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/2006.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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