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@inproceedings{DBLP:conf/ispd/AdyaM02,
  author       = {Saurabh N. Adya and
                  Igor L. Markov},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Consistent placement of macro-blocks using floorplanning and standard-cell
                  placement},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {12--17},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505392},
  doi          = {10.1145/505388.505392},
  timestamp    = {Tue, 06 Nov 2018 11:07:47 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/AdyaM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/AlpertCGHHKQ02,
  author       = {Charles J. Alpert and
                  Chris C. N. Chu and
                  Gopal Gandham and
                  Milos Hrkic and
                  Jiang Hu and
                  Chandramouli V. Kashyap and
                  Stephen T. Quay},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Simultaneous driver sizing and buffer insertion using a delay penalty
                  estimation technique},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {104--109},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505414},
  doi          = {10.1145/505388.505414},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/AlpertCGHHKQ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/BrennerR02,
  author       = {Ulrich Brenner and
                  Andr{\'{e}} Rohe},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {An effective congestion driven placement framework},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {6--11},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505391},
  doi          = {10.1145/505388.505391},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/BrennerR02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/ChangCP02,
  author       = {Chin{-}Chih Chang and
                  Jason Cong and
                  David Zhigang Pan},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Physical hierarchy generation with routing congestion control},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {36--41},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505399},
  doi          = {10.1145/505388.505399},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/ChangCP02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/ChangSLYLS02,
  author       = {H. Chang and
                  Eugene Shragowitz and
                  Jian Liu and
                  Habib Youssef and
                  Bing Lu and
                  Suphachai Sutanthavibul},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Net criticality revisited: an effective method to improve timing in
                  physical design},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {155--160},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505425},
  doi          = {10.1145/505388.505425},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/ChangSLYLS02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/Chen02,
  author       = {Chunhong Chen},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Physical design with multiple on-chip voltages},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {118--118},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505417},
  doi          = {10.1145/505388.505417},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/Chen02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/ChenKRZ02,
  author       = {Yu Chen and
                  Andrew B. Kahng and
                  Gabriel Robins and
                  Alexander Zelikovsky},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Closing the smoothness and uniformity gap in area fill synthesis},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {137--142},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505422},
  doi          = {10.1145/505388.505422},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/ChenKRZ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/ChenKTK02,
  author       = {Pinhong Chen and
                  Yuji Kukimoto and
                  Chin{-}Chi Teng and
                  Kurt Keutzer},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {On convergence of switching windows computation in presence of crosstalk
                  noise},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {84--89},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505410},
  doi          = {10.1145/505388.505410},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/ChenKTK02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/ChenM02,
  author       = {Lauren Hui Chen and
                  Malgorzata Marek{-}Sadowska},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Incremental delay change due to crosstalk noise},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {120--125},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505419},
  doi          = {10.1145/505388.505419},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/ChenM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/CheonW02,
  author       = {Yongseok Cheon and
                  D. F. Wong},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Design hierarchy guided multilevel circuit partitioning},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {30--35},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505398},
  doi          = {10.1145/505388.505398},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ispd/CheonW02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/Cong02,
  author       = {Jason Cong},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Timing closure based on physical hierarchy},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {170--174},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505429},
  doi          = {10.1145/505388.505429},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/Cong02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/CongW02,
  author       = {Jason Cong and
                  Chang Wu},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Global clustering-based performance-driven circuit partitioning},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {149--154},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505424},
  doi          = {10.1145/505388.505424},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/CongW02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/DanielOLLW02,
  author       = {Luca Daniel and
                  Chin Siong Ong and
                  Sok Chay Low and
                  Kwok Hong Lee and
                  Jacob White},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Geometrically parameterized interconnect performance models for interconnect
                  synthesis},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {202--207},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505436},
  doi          = {10.1145/505388.505436},
  timestamp    = {Sat, 29 Apr 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ispd/DanielOLLW02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/De02,
  author       = {Vivek De},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Leakage-tolerant design techniques for high performance processors},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {28--28},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505396},
  doi          = {10.1145/505388.505396},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/De02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/HashimotoTO02,
  author       = {Masanori Hashimoto and
                  Masao Takahashi and
                  Hidetoshi Onodera},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Crosstalk noise optimization by post-layout transistor sizing},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {126--130},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505420},
  doi          = {10.1145/505388.505420},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/HashimotoTO02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/HrkicL02,
  author       = {Milos Hrkic and
                  John Lillis},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Buffer tree synthesis with consideration of temporal locality, sink
                  polarity requirements, solution cost and blockages},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {98--103},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505413},
  doi          = {10.1145/505388.505413},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/HrkicL02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/HuAQG02,
  author       = {Jiang Hu and
                  Charles J. Alpert and
                  Stephen T. Quay and
                  Gopal Gandham},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Buffer insertion with adaptive blockage avoidance},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {92--97},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505412},
  doi          = {10.1145/505388.505412},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/HuAQG02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/HuM02,
  author       = {Bo Hu and
                  Malgorzata Marek{-}Sadowska},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {{FAR:} fixed-points addition {\&} relaxation based placement},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {161--166},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505426},
  doi          = {10.1145/505388.505426},
  timestamp    = {Wed, 11 Sep 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ispd/HuM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/Kahng02,
  author       = {Andrew B. Kahng},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {A roadmap and vision for physical design},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {112--117},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505416},
  doi          = {10.1145/505388.505416},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/Kahng02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/KahngMM02,
  author       = {Andrew B. Kahng and
                  Stefanus Mantik and
                  Igor L. Markov},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Min-max placement for large-scale timing optimization},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {143--148},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505423},
  doi          = {10.1145/505388.505423},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/KahngMM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/Kang02,
  author       = {Sung{-}Mo Kang},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {On-chip thermal engineering for peta-scale integration},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {76--76},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505407},
  doi          = {10.1145/505388.505407},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/Kang02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/LeeW02,
  author       = {Seokjin Lee and
                  D. F. Wong},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Timing-driven routing for FPGAs based on Lagrangian relaxation},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {176--181},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505431},
  doi          = {10.1145/505388.505431},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ispd/LeeW02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/MakY02,
  author       = {Wai{-}Kei Mak and
                  Evangeline F. Y. Young},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Temporal logic replication for dynamically reconfigurable {FPGA} partitioning},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {190--195},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505434},
  doi          = {10.1145/505388.505434},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/MakY02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/PandiniPS02,
  author       = {Davide Pandini and
                  Lawrence T. Pileggi and
                  Andrzej J. Strojwas},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Understanding and addressing the impact of wiring congestion during
                  technology mapping},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {131--136},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505421},
  doi          = {10.1145/505388.505421},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/PandiniPS02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/RafiqCYS02,
  author       = {Faran Rafiq and
                  Malgorzata Chrzanowska{-}Jeske and
                  Hannah Honghua Yang and
                  Naveed A. Sherwani},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Integrated floorplanning with buffer/channel insertion for bus-based
                  microprocessor designs},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {56--61},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505403},
  doi          = {10.1145/505388.505403},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/RafiqCYS02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/SaxenaG02,
  author       = {Prashant Saxena and
                  Satyanarayan Gupta},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Shield count minimization in congested regions},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {78--83},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505409},
  doi          = {10.1145/505388.505409},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/SaxenaG02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/ShamY02,
  author       = {Chiu{-}Wing Sham and
                  Evangeline F. Y. Young},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Routability driven floorplanner with buffer block planning},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {50--55},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505402},
  doi          = {10.1145/505388.505402},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/ShamY02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/SuSN02,
  author       = {Haihua Su and
                  Sachin S. Sapatnekar and
                  Sani R. Nassif},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {An algorithm for optimal decoupling capacitor sizing and placement
                  for standard cell layouts},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {68--73},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505405},
  doi          = {10.1145/505388.505405},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/SuSN02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/Teig02,
  author       = {Steven L. Teig},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Challenges and principles of physical design},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {3--4},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505389},
  doi          = {10.1145/505388.505389},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/Teig02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/XuRS02,
  author       = {Hui Xu and
                  Rob A. Rutenbar and
                  Karem A. Sakallah},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {sub-SAT: a formulation for relaxed boolean satisfiability with applications
                  in routing},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {182--187},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505432},
  doi          = {10.1145/505388.505432},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/XuRS02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/YangCS02,
  author       = {Xiaojian Yang and
                  Bo{-}Kyung Choi and
                  Majid Sarrafzadeh},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Routability driven white space allocation for fixed-die standard-cell
                  placement},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {42--47},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505400},
  doi          = {10.1145/505388.505400},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/YangCS02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/Yeap02,
  author       = {Geoffrey C.{-}F. Yeap},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Leakage current in low standby power and high performance devices:
                  trends and challenges},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {22--27},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505395},
  doi          = {10.1145/505388.505395},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/Yeap02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/YoungCS02,
  author       = {Evangeline F. Y. Young and
                  Chris C. N. Chu and
                  Zion Cien Shen},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Twin binary sequences: a non-redundant representation for general
                  non-slicing floorplan},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {196--201},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505435},
  doi          = {10.1145/505388.505435},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/YoungCS02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/ZhangD02,
  author       = {Shuo Zhang and
                  Wayne Wei{-}Ming Dai},
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {{TEG:} a new post-layout optimization method},
  booktitle    = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  pages        = {62--67},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388.505404},
  doi          = {10.1145/505388.505404},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/ZhangD02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/ispd/2002,
  editor       = {Sachin S. Sapatnekar and
                  Massoud Pedram},
  title        = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
                  2002, Del Mar, CA, USA, April 7-10, 2002},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/505388},
  doi          = {10.1145/505388},
  isbn         = {1-58113-460-6},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispd/2002.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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